470 lines
11 KiB
C
470 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Apple DART page table allocator.
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*
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* Copyright (C) 2022 The Asahi Linux Contributors
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*
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* Based on io-pgtable-arm.
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*
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* Copyright (C) 2014 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#define pr_fmt(fmt) "dart io-pgtable: " fmt
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#include <linux/atomic.h>
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/io-pgtable.h>
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#include <linux/kernel.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <asm/barrier.h>
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#define DART1_MAX_ADDR_BITS 36
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#define DART_MAX_TABLES 4
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#define DART_LEVELS 2
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/* Struct accessors */
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#define io_pgtable_to_data(x) \
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container_of((x), struct dart_io_pgtable, iop)
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#define io_pgtable_ops_to_data(x) \
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io_pgtable_to_data(io_pgtable_ops_to_pgtable(x))
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#define DART_GRANULE(d) \
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(sizeof(dart_iopte) << (d)->bits_per_level)
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#define DART_PTES_PER_TABLE(d) \
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(DART_GRANULE(d) >> ilog2(sizeof(dart_iopte)))
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#define APPLE_DART_PTE_SUBPAGE_START GENMASK_ULL(63, 52)
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#define APPLE_DART_PTE_SUBPAGE_END GENMASK_ULL(51, 40)
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#define APPLE_DART1_PADDR_MASK GENMASK_ULL(35, 12)
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#define APPLE_DART2_PADDR_MASK GENMASK_ULL(37, 10)
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#define APPLE_DART2_PADDR_SHIFT (4)
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/* Apple DART1 protection bits */
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#define APPLE_DART1_PTE_PROT_NO_READ BIT(8)
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#define APPLE_DART1_PTE_PROT_NO_WRITE BIT(7)
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#define APPLE_DART1_PTE_PROT_SP_DIS BIT(1)
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/* Apple DART2 protection bits */
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#define APPLE_DART2_PTE_PROT_NO_READ BIT(3)
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#define APPLE_DART2_PTE_PROT_NO_WRITE BIT(2)
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#define APPLE_DART2_PTE_PROT_NO_CACHE BIT(1)
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/* marks PTE as valid */
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#define APPLE_DART_PTE_VALID BIT(0)
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/* IOPTE accessors */
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#define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d))
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struct dart_io_pgtable {
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struct io_pgtable iop;
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int tbl_bits;
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int bits_per_level;
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void *pgd[DART_MAX_TABLES];
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};
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typedef u64 dart_iopte;
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static dart_iopte paddr_to_iopte(phys_addr_t paddr,
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struct dart_io_pgtable *data)
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{
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dart_iopte pte;
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if (data->iop.fmt == APPLE_DART)
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return paddr & APPLE_DART1_PADDR_MASK;
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/* format is APPLE_DART2 */
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pte = paddr >> APPLE_DART2_PADDR_SHIFT;
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pte &= APPLE_DART2_PADDR_MASK;
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return pte;
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}
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static phys_addr_t iopte_to_paddr(dart_iopte pte,
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struct dart_io_pgtable *data)
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{
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u64 paddr;
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if (data->iop.fmt == APPLE_DART)
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return pte & APPLE_DART1_PADDR_MASK;
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/* format is APPLE_DART2 */
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paddr = pte & APPLE_DART2_PADDR_MASK;
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paddr <<= APPLE_DART2_PADDR_SHIFT;
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return paddr;
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}
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static void *__dart_alloc_pages(size_t size, gfp_t gfp,
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struct io_pgtable_cfg *cfg)
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{
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int order = get_order(size);
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struct page *p;
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VM_BUG_ON((gfp & __GFP_HIGHMEM));
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p = alloc_pages(gfp | __GFP_ZERO, order);
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if (!p)
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return NULL;
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return page_address(p);
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}
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static int dart_init_pte(struct dart_io_pgtable *data,
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unsigned long iova, phys_addr_t paddr,
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dart_iopte prot, int num_entries,
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dart_iopte *ptep)
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{
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int i;
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dart_iopte pte = prot;
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size_t sz = data->iop.cfg.pgsize_bitmap;
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for (i = 0; i < num_entries; i++)
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if (ptep[i] & APPLE_DART_PTE_VALID) {
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/* We require an unmap first */
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WARN_ON(ptep[i] & APPLE_DART_PTE_VALID);
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return -EEXIST;
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}
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/* subpage protection: always allow access to the entire page */
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pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_START, 0);
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pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_END, 0xfff);
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pte |= APPLE_DART1_PTE_PROT_SP_DIS;
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pte |= APPLE_DART_PTE_VALID;
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for (i = 0; i < num_entries; i++)
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ptep[i] = pte | paddr_to_iopte(paddr + i * sz, data);
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return 0;
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}
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static dart_iopte dart_install_table(dart_iopte *table,
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dart_iopte *ptep,
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dart_iopte curr,
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struct dart_io_pgtable *data)
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{
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dart_iopte old, new;
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new = paddr_to_iopte(__pa(table), data) | APPLE_DART_PTE_VALID;
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/*
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* Ensure the table itself is visible before its PTE can be.
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* Whilst we could get away with cmpxchg64_release below, this
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* doesn't have any ordering semantics when !CONFIG_SMP.
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*/
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dma_wmb();
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old = cmpxchg64_relaxed(ptep, curr, new);
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return old;
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}
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static int dart_get_table(struct dart_io_pgtable *data, unsigned long iova)
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{
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return (iova >> (3 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) &
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((1 << data->tbl_bits) - 1);
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}
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static int dart_get_l1_index(struct dart_io_pgtable *data, unsigned long iova)
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{
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return (iova >> (2 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) &
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((1 << data->bits_per_level) - 1);
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}
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static int dart_get_l2_index(struct dart_io_pgtable *data, unsigned long iova)
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{
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return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) &
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((1 << data->bits_per_level) - 1);
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}
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static dart_iopte *dart_get_l2(struct dart_io_pgtable *data, unsigned long iova)
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{
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dart_iopte pte, *ptep;
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int tbl = dart_get_table(data, iova);
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ptep = data->pgd[tbl];
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if (!ptep)
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return NULL;
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ptep += dart_get_l1_index(data, iova);
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pte = READ_ONCE(*ptep);
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/* Valid entry? */
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if (!pte)
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return NULL;
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/* Deref to get level 2 table */
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return iopte_deref(pte, data);
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}
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static dart_iopte dart_prot_to_pte(struct dart_io_pgtable *data,
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int prot)
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{
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dart_iopte pte = 0;
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if (data->iop.fmt == APPLE_DART) {
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if (!(prot & IOMMU_WRITE))
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pte |= APPLE_DART1_PTE_PROT_NO_WRITE;
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if (!(prot & IOMMU_READ))
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pte |= APPLE_DART1_PTE_PROT_NO_READ;
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}
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if (data->iop.fmt == APPLE_DART2) {
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if (!(prot & IOMMU_WRITE))
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pte |= APPLE_DART2_PTE_PROT_NO_WRITE;
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if (!(prot & IOMMU_READ))
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pte |= APPLE_DART2_PTE_PROT_NO_READ;
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if (!(prot & IOMMU_CACHE))
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pte |= APPLE_DART2_PTE_PROT_NO_CACHE;
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}
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return pte;
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}
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static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova,
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phys_addr_t paddr, size_t pgsize, size_t pgcount,
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int iommu_prot, gfp_t gfp, size_t *mapped)
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{
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struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops);
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struct io_pgtable_cfg *cfg = &data->iop.cfg;
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size_t tblsz = DART_GRANULE(data);
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int ret = 0, tbl, num_entries, max_entries, map_idx_start;
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dart_iopte pte, *cptep, *ptep;
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dart_iopte prot;
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if (WARN_ON(pgsize != cfg->pgsize_bitmap))
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return -EINVAL;
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if (WARN_ON(paddr >> cfg->oas))
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return -ERANGE;
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/* If no access, then nothing to do */
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if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE)))
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return 0;
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tbl = dart_get_table(data, iova);
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ptep = data->pgd[tbl];
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ptep += dart_get_l1_index(data, iova);
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pte = READ_ONCE(*ptep);
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/* no L2 table present */
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if (!pte) {
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cptep = __dart_alloc_pages(tblsz, gfp, cfg);
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if (!cptep)
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return -ENOMEM;
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pte = dart_install_table(cptep, ptep, 0, data);
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if (pte)
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free_pages((unsigned long)cptep, get_order(tblsz));
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/* L2 table is present (now) */
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pte = READ_ONCE(*ptep);
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}
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ptep = iopte_deref(pte, data);
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/* install a leaf entries into L2 table */
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prot = dart_prot_to_pte(data, iommu_prot);
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map_idx_start = dart_get_l2_index(data, iova);
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max_entries = DART_PTES_PER_TABLE(data) - map_idx_start;
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num_entries = min_t(int, pgcount, max_entries);
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ptep += map_idx_start;
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ret = dart_init_pte(data, iova, paddr, prot, num_entries, ptep);
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if (!ret && mapped)
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*mapped += num_entries * pgsize;
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/*
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* Synchronise all PTE updates for the new mapping before there's
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* a chance for anything to kick off a table walk for the new iova.
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*/
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wmb();
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return ret;
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}
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static size_t dart_unmap_pages(struct io_pgtable_ops *ops, unsigned long iova,
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size_t pgsize, size_t pgcount,
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struct iommu_iotlb_gather *gather)
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{
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struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops);
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struct io_pgtable_cfg *cfg = &data->iop.cfg;
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int i = 0, num_entries, max_entries, unmap_idx_start;
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dart_iopte pte, *ptep;
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if (WARN_ON(pgsize != cfg->pgsize_bitmap || !pgcount))
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return 0;
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ptep = dart_get_l2(data, iova);
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/* Valid L2 IOPTE pointer? */
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if (WARN_ON(!ptep))
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return 0;
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unmap_idx_start = dart_get_l2_index(data, iova);
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ptep += unmap_idx_start;
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max_entries = DART_PTES_PER_TABLE(data) - unmap_idx_start;
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num_entries = min_t(int, pgcount, max_entries);
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while (i < num_entries) {
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pte = READ_ONCE(*ptep);
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if (WARN_ON(!pte))
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break;
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/* clear pte */
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*ptep = 0;
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if (!iommu_iotlb_gather_queued(gather))
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io_pgtable_tlb_add_page(&data->iop, gather,
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iova + i * pgsize, pgsize);
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ptep++;
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i++;
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}
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return i * pgsize;
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}
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static phys_addr_t dart_iova_to_phys(struct io_pgtable_ops *ops,
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unsigned long iova)
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{
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struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops);
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dart_iopte pte, *ptep;
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ptep = dart_get_l2(data, iova);
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/* Valid L2 IOPTE pointer? */
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if (!ptep)
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return 0;
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ptep += dart_get_l2_index(data, iova);
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pte = READ_ONCE(*ptep);
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/* Found translation */
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if (pte) {
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iova &= (data->iop.cfg.pgsize_bitmap - 1);
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return iopte_to_paddr(pte, data) | iova;
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}
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/* Ran out of page tables to walk */
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return 0;
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}
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static struct dart_io_pgtable *
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dart_alloc_pgtable(struct io_pgtable_cfg *cfg)
|
||
|
|
{
|
||
|
|
struct dart_io_pgtable *data;
|
||
|
|
int tbl_bits, bits_per_level, va_bits, pg_shift;
|
||
|
|
|
||
|
|
pg_shift = __ffs(cfg->pgsize_bitmap);
|
||
|
|
bits_per_level = pg_shift - ilog2(sizeof(dart_iopte));
|
||
|
|
|
||
|
|
va_bits = cfg->ias - pg_shift;
|
||
|
|
|
||
|
|
tbl_bits = max_t(int, 0, va_bits - (bits_per_level * DART_LEVELS));
|
||
|
|
if ((1 << tbl_bits) > DART_MAX_TABLES)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
data = kzalloc(sizeof(*data), GFP_KERNEL);
|
||
|
|
if (!data)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
data->tbl_bits = tbl_bits;
|
||
|
|
data->bits_per_level = bits_per_level;
|
||
|
|
|
||
|
|
data->iop.ops = (struct io_pgtable_ops) {
|
||
|
|
.map_pages = dart_map_pages,
|
||
|
|
.unmap_pages = dart_unmap_pages,
|
||
|
|
.iova_to_phys = dart_iova_to_phys,
|
||
|
|
};
|
||
|
|
|
||
|
|
return data;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct io_pgtable *
|
||
|
|
apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
|
||
|
|
{
|
||
|
|
struct dart_io_pgtable *data;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
if (!cfg->coherent_walk)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
if (cfg->oas != 36 && cfg->oas != 42)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
if (cfg->ias > cfg->oas)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
if (!(cfg->pgsize_bitmap == SZ_4K || cfg->pgsize_bitmap == SZ_16K))
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
data = dart_alloc_pgtable(cfg);
|
||
|
|
if (!data)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
cfg->apple_dart_cfg.n_ttbrs = 1 << data->tbl_bits;
|
||
|
|
|
||
|
|
for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i) {
|
||
|
|
data->pgd[i] = __dart_alloc_pages(DART_GRANULE(data), GFP_KERNEL,
|
||
|
|
cfg);
|
||
|
|
if (!data->pgd[i])
|
||
|
|
goto out_free_data;
|
||
|
|
cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]);
|
||
|
|
}
|
||
|
|
|
||
|
|
return &data->iop;
|
||
|
|
|
||
|
|
out_free_data:
|
||
|
|
while (--i >= 0)
|
||
|
|
free_pages((unsigned long)data->pgd[i],
|
||
|
|
get_order(DART_GRANULE(data)));
|
||
|
|
kfree(data);
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void apple_dart_free_pgtable(struct io_pgtable *iop)
|
||
|
|
{
|
||
|
|
struct dart_io_pgtable *data = io_pgtable_to_data(iop);
|
||
|
|
dart_iopte *ptep, *end;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) {
|
||
|
|
ptep = data->pgd[i];
|
||
|
|
end = (void *)ptep + DART_GRANULE(data);
|
||
|
|
|
||
|
|
while (ptep != end) {
|
||
|
|
dart_iopte pte = *ptep++;
|
||
|
|
|
||
|
|
if (pte) {
|
||
|
|
unsigned long page =
|
||
|
|
(unsigned long)iopte_deref(pte, data);
|
||
|
|
|
||
|
|
free_pages(page, get_order(DART_GRANULE(data)));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
free_pages((unsigned long)data->pgd[i],
|
||
|
|
get_order(DART_GRANULE(data)));
|
||
|
|
}
|
||
|
|
|
||
|
|
kfree(data);
|
||
|
|
}
|
||
|
|
|
||
|
|
struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = {
|
||
|
|
.alloc = apple_dart_alloc_pgtable,
|
||
|
|
.free = apple_dart_free_pgtable,
|
||
|
|
};
|