497 lines
11 KiB
C
497 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
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* ATBM8830, ATBM8831
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*
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* Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
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*/
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#include <asm/div64.h>
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#include <media/dvb_frontend.h>
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#include "atbm8830.h"
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#include "atbm8830_priv.h"
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#define dprintk(args...) \
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do { \
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if (debug) \
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printk(KERN_DEBUG "atbm8830: " args); \
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} while (0)
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static int debug;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
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static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
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{
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int ret = 0;
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u8 dev_addr;
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u8 buf1[] = { reg >> 8, reg & 0xFF };
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u8 buf2[] = { data };
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struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
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struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
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dev_addr = priv->config->demod_address;
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msg1.addr = dev_addr;
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msg2.addr = dev_addr;
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if (debug >= 2)
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dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
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ret = i2c_transfer(priv->i2c, &msg1, 1);
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if (ret != 1)
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return -EIO;
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ret = i2c_transfer(priv->i2c, &msg2, 1);
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return (ret != 1) ? -EIO : 0;
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}
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static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
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{
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int ret;
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u8 dev_addr;
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u8 buf1[] = { reg >> 8, reg & 0xFF };
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u8 buf2[] = { 0 };
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struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
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struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
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dev_addr = priv->config->demod_address;
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msg1.addr = dev_addr;
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msg2.addr = dev_addr;
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ret = i2c_transfer(priv->i2c, &msg1, 1);
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if (ret != 1) {
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dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
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return -EIO;
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}
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ret = i2c_transfer(priv->i2c, &msg2, 1);
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if (ret != 1)
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return -EIO;
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*p_data = buf2[0];
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if (debug >= 2)
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dprintk("%s: reg=0x%04X, data=0x%02X\n",
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__func__, reg, buf2[0]);
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return 0;
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}
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/* Lock register latch so that multi-register read is atomic */
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static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
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{
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return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
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}
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static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
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{
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u32 val;
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u64 t;
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/* 0x100000 * freq / 30.4MHz */
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t = (u64)0x100000 * freq;
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do_div(t, 30400);
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val = t;
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atbm8830_write_reg(priv, REG_OSC_CLK, val);
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atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
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atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
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return 0;
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}
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static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
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{
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u32 fs = priv->config->osc_clk_freq;
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u64 t;
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u32 val;
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u8 dat;
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if (freq != 0) {
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/* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
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t = (u64) 2 * 31416 * (freq - fs);
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t <<= 22;
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do_div(t, fs);
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do_div(t, 1000);
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val = t;
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atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
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atbm8830_write_reg(priv, REG_IF_FREQ, val);
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atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
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atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
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atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
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dat &= 0xFC;
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atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
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} else {
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/* Zero IF */
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atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
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atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
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dat &= 0xFC;
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dat |= 0x02;
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atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
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if (priv->config->zif_swap_iq)
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atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
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else
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atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
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}
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return 0;
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}
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static int is_locked(struct atbm_state *priv, u8 *locked)
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{
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u8 status;
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atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
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if (locked != NULL)
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*locked = (status == 1);
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return 0;
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}
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static int set_agc_config(struct atbm_state *priv,
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u8 min, u8 max, u8 hold_loop)
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{
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/* no effect if both min and max are zero */
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if (!min && !max)
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return 0;
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atbm8830_write_reg(priv, REG_AGC_MIN, min);
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atbm8830_write_reg(priv, REG_AGC_MAX, max);
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atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
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return 0;
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}
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static int set_static_channel_mode(struct atbm_state *priv)
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{
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int i;
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for (i = 0; i < 5; i++)
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atbm8830_write_reg(priv, 0x099B + i, 0x08);
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atbm8830_write_reg(priv, 0x095B, 0x7F);
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atbm8830_write_reg(priv, 0x09CB, 0x01);
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atbm8830_write_reg(priv, 0x09CC, 0x7F);
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atbm8830_write_reg(priv, 0x09CD, 0x7F);
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atbm8830_write_reg(priv, 0x0E01, 0x20);
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/* For single carrier */
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atbm8830_write_reg(priv, 0x0B03, 0x0A);
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atbm8830_write_reg(priv, 0x0935, 0x10);
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atbm8830_write_reg(priv, 0x0936, 0x08);
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atbm8830_write_reg(priv, 0x093E, 0x08);
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atbm8830_write_reg(priv, 0x096E, 0x06);
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/* frame_count_max0 */
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atbm8830_write_reg(priv, 0x0B09, 0x00);
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/* frame_count_max1 */
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atbm8830_write_reg(priv, 0x0B0A, 0x08);
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return 0;
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}
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static int set_ts_config(struct atbm_state *priv)
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{
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const struct atbm8830_config *cfg = priv->config;
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/*Set parallel/serial ts mode*/
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atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
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atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
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/*Set ts sampling edge*/
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atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
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cfg->ts_sampling_edge ? 1 : 0);
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/*Set ts clock freerun*/
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atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
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cfg->ts_clk_gated ? 0 : 1);
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return 0;
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}
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static int atbm8830_init(struct dvb_frontend *fe)
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{
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struct atbm_state *priv = fe->demodulator_priv;
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const struct atbm8830_config *cfg = priv->config;
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/*Set oscillator frequency*/
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set_osc_freq(priv, cfg->osc_clk_freq);
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/*Set IF frequency*/
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set_if_freq(priv, cfg->if_freq);
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/*Set AGC Config*/
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set_agc_config(priv, cfg->agc_min, cfg->agc_max,
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cfg->agc_hold_loop);
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/*Set static channel mode*/
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set_static_channel_mode(priv);
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set_ts_config(priv);
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/*Turn off DSP reset*/
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atbm8830_write_reg(priv, 0x000A, 0);
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/*SW version test*/
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atbm8830_write_reg(priv, 0x020C, 11);
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/* Run */
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atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
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return 0;
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}
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static void atbm8830_release(struct dvb_frontend *fe)
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{
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struct atbm_state *state = fe->demodulator_priv;
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dprintk("%s\n", __func__);
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kfree(state);
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}
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static int atbm8830_set_fe(struct dvb_frontend *fe)
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{
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struct atbm_state *priv = fe->demodulator_priv;
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int i;
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u8 locked = 0;
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dprintk("%s\n", __func__);
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/* set frequency */
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if (fe->ops.tuner_ops.set_params) {
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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fe->ops.tuner_ops.set_params(fe);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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}
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/* start auto lock */
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for (i = 0; i < 10; i++) {
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mdelay(100);
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dprintk("Try %d\n", i);
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is_locked(priv, &locked);
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if (locked != 0) {
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dprintk("ATBM8830 locked!\n");
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break;
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}
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}
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return 0;
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}
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static int atbm8830_get_fe(struct dvb_frontend *fe,
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struct dtv_frontend_properties *c)
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{
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dprintk("%s\n", __func__);
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/* TODO: get real readings from device */
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/* inversion status */
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c->inversion = INVERSION_OFF;
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/* bandwidth */
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c->bandwidth_hz = 8000000;
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c->code_rate_HP = FEC_AUTO;
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c->code_rate_LP = FEC_AUTO;
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c->modulation = QAM_AUTO;
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/* transmission mode */
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c->transmission_mode = TRANSMISSION_MODE_AUTO;
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/* guard interval */
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c->guard_interval = GUARD_INTERVAL_AUTO;
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/* hierarchy */
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c->hierarchy = HIERARCHY_NONE;
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return 0;
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}
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static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
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struct dvb_frontend_tune_settings *fesettings)
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{
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fesettings->min_delay_ms = 0;
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fesettings->step_size = 0;
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fesettings->max_drift = 0;
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return 0;
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}
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static int atbm8830_read_status(struct dvb_frontend *fe,
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enum fe_status *fe_status)
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{
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struct atbm_state *priv = fe->demodulator_priv;
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u8 locked = 0;
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u8 agc_locked = 0;
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dprintk("%s\n", __func__);
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*fe_status = 0;
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is_locked(priv, &locked);
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if (locked) {
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*fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
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}
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dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
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atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
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dprintk("AGC Lock: %d\n", agc_locked);
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return 0;
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}
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static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
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{
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struct atbm_state *priv = fe->demodulator_priv;
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u32 frame_err;
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u8 t;
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dprintk("%s\n", __func__);
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atbm8830_reglatch_lock(priv, 1);
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atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
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frame_err = t & 0x7F;
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frame_err <<= 8;
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atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
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frame_err |= t;
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atbm8830_reglatch_lock(priv, 0);
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*ber = frame_err * 100 / 32767;
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dprintk("%s: ber=0x%x\n", __func__, *ber);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
|
||
|
|
{
|
||
|
|
struct atbm_state *priv = fe->demodulator_priv;
|
||
|
|
u32 pwm;
|
||
|
|
u8 t;
|
||
|
|
|
||
|
|
dprintk("%s\n", __func__);
|
||
|
|
atbm8830_reglatch_lock(priv, 1);
|
||
|
|
|
||
|
|
atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
|
||
|
|
pwm = t & 0x03;
|
||
|
|
pwm <<= 8;
|
||
|
|
atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
|
||
|
|
pwm |= t;
|
||
|
|
|
||
|
|
atbm8830_reglatch_lock(priv, 0);
|
||
|
|
|
||
|
|
dprintk("AGC PWM = 0x%02X\n", pwm);
|
||
|
|
pwm = 0x400 - pwm;
|
||
|
|
|
||
|
|
*signal = pwm * 0x10000 / 0x400;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
|
||
|
|
{
|
||
|
|
dprintk("%s\n", __func__);
|
||
|
|
*snr = 0;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
|
||
|
|
{
|
||
|
|
dprintk("%s\n", __func__);
|
||
|
|
*ucblocks = 0;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
|
||
|
|
{
|
||
|
|
struct atbm_state *priv = fe->demodulator_priv;
|
||
|
|
|
||
|
|
return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct dvb_frontend_ops atbm8830_ops = {
|
||
|
|
.delsys = { SYS_DTMB },
|
||
|
|
.info = {
|
||
|
|
.name = "AltoBeam ATBM8830/8831 DMB-TH",
|
||
|
|
.frequency_min_hz = 474 * MHz,
|
||
|
|
.frequency_max_hz = 858 * MHz,
|
||
|
|
.frequency_stepsize_hz = 10 * kHz,
|
||
|
|
.caps =
|
||
|
|
FE_CAN_FEC_AUTO |
|
||
|
|
FE_CAN_QAM_AUTO |
|
||
|
|
FE_CAN_TRANSMISSION_MODE_AUTO |
|
||
|
|
FE_CAN_GUARD_INTERVAL_AUTO
|
||
|
|
},
|
||
|
|
|
||
|
|
.release = atbm8830_release,
|
||
|
|
|
||
|
|
.init = atbm8830_init,
|
||
|
|
.sleep = NULL,
|
||
|
|
.write = NULL,
|
||
|
|
.i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
|
||
|
|
|
||
|
|
.set_frontend = atbm8830_set_fe,
|
||
|
|
.get_frontend = atbm8830_get_fe,
|
||
|
|
.get_tune_settings = atbm8830_get_tune_settings,
|
||
|
|
|
||
|
|
.read_status = atbm8830_read_status,
|
||
|
|
.read_ber = atbm8830_read_ber,
|
||
|
|
.read_signal_strength = atbm8830_read_signal_strength,
|
||
|
|
.read_snr = atbm8830_read_snr,
|
||
|
|
.read_ucblocks = atbm8830_read_ucblocks,
|
||
|
|
};
|
||
|
|
|
||
|
|
struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
|
||
|
|
struct i2c_adapter *i2c)
|
||
|
|
{
|
||
|
|
struct atbm_state *priv = NULL;
|
||
|
|
u8 data = 0;
|
||
|
|
|
||
|
|
dprintk("%s()\n", __func__);
|
||
|
|
|
||
|
|
if (config == NULL || i2c == NULL)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
|
||
|
|
if (priv == NULL)
|
||
|
|
goto error_out;
|
||
|
|
|
||
|
|
priv->config = config;
|
||
|
|
priv->i2c = i2c;
|
||
|
|
|
||
|
|
/* check if the demod is there */
|
||
|
|
if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
|
||
|
|
dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
|
||
|
|
__func__, priv->config->demod_address);
|
||
|
|
goto error_out;
|
||
|
|
}
|
||
|
|
dprintk("atbm8830 chip id: 0x%02X\n", data);
|
||
|
|
|
||
|
|
memcpy(&priv->frontend.ops, &atbm8830_ops,
|
||
|
|
sizeof(struct dvb_frontend_ops));
|
||
|
|
priv->frontend.demodulator_priv = priv;
|
||
|
|
|
||
|
|
atbm8830_init(&priv->frontend);
|
||
|
|
|
||
|
|
atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
|
||
|
|
|
||
|
|
return &priv->frontend;
|
||
|
|
|
||
|
|
error_out:
|
||
|
|
dprintk("%s() error_out\n", __func__);
|
||
|
|
kfree(priv);
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL(atbm8830_attach);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
|
||
|
|
MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
|
||
|
|
MODULE_LICENSE("GPL");
|