365 lines
9.6 KiB
C
365 lines
9.6 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* netup_unidvb_i2c.c
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*
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* Internal I2C bus driver for NetUP Universal Dual DVB-CI
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*
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* Copyright (C) 2014 NetUP Inc.
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* Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
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* Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include "netup_unidvb.h"
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#define NETUP_I2C_BUS0_ADDR 0x4800
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#define NETUP_I2C_BUS1_ADDR 0x4840
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#define NETUP_I2C_TIMEOUT 1000
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/* twi_ctrl0_stat reg bits */
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#define TWI_IRQEN_COMPL 0x1
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#define TWI_IRQEN_ANACK 0x2
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#define TWI_IRQEN_DNACK 0x4
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#define TWI_IRQ_COMPL (TWI_IRQEN_COMPL << 8)
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#define TWI_IRQ_ANACK (TWI_IRQEN_ANACK << 8)
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#define TWI_IRQ_DNACK (TWI_IRQEN_DNACK << 8)
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#define TWI_IRQ_TX 0x800
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#define TWI_IRQ_RX 0x1000
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#define TWI_IRQEN (TWI_IRQEN_COMPL | TWI_IRQEN_ANACK | TWI_IRQEN_DNACK)
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/* twi_addr_ctrl1 reg bits*/
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#define TWI_TRANSFER 0x100
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#define TWI_NOSTOP 0x200
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#define TWI_SOFT_RESET 0x2000
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/* twi_clkdiv reg value */
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#define TWI_CLKDIV 156
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/* fifo_stat_ctrl reg bits */
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#define FIFO_IRQEN 0x8000
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#define FIFO_RESET 0x4000
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/* FIFO size */
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#define FIFO_SIZE 16
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struct netup_i2c_fifo_regs {
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union {
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__u8 data8;
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__le16 data16;
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__le32 data32;
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};
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__u8 padding[4];
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__le16 stat_ctrl;
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} __packed __aligned(1);
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struct netup_i2c_regs {
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__le16 clkdiv;
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__le16 twi_ctrl0_stat;
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__le16 twi_addr_ctrl1;
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__le16 length;
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__u8 padding1[8];
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struct netup_i2c_fifo_regs tx_fifo;
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__u8 padding2[6];
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struct netup_i2c_fifo_regs rx_fifo;
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} __packed __aligned(1);
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irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c)
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{
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u16 reg, tmp;
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unsigned long flags;
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irqreturn_t iret = IRQ_HANDLED;
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spin_lock_irqsave(&i2c->lock, flags);
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reg = readw(&i2c->regs->twi_ctrl0_stat);
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writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat);
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dev_dbg(i2c->adap.dev.parent,
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"%s(): twi_ctrl0_state 0x%x\n", __func__, reg);
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if ((reg & TWI_IRQEN_COMPL) != 0 && (reg & TWI_IRQ_COMPL)) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): TWI_IRQEN_COMPL\n", __func__);
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i2c->state = STATE_DONE;
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goto irq_ok;
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}
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if ((reg & TWI_IRQEN_ANACK) != 0 && (reg & TWI_IRQ_ANACK)) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): TWI_IRQEN_ANACK\n", __func__);
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i2c->state = STATE_ERROR;
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goto irq_ok;
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}
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if ((reg & TWI_IRQEN_DNACK) != 0 && (reg & TWI_IRQ_DNACK)) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): TWI_IRQEN_DNACK\n", __func__);
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i2c->state = STATE_ERROR;
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goto irq_ok;
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}
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if ((reg & TWI_IRQ_RX) != 0) {
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tmp = readw(&i2c->regs->rx_fifo.stat_ctrl);
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writew(tmp & ~FIFO_IRQEN, &i2c->regs->rx_fifo.stat_ctrl);
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i2c->state = STATE_WANT_READ;
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dev_dbg(i2c->adap.dev.parent,
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"%s(): want read\n", __func__);
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goto irq_ok;
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}
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if ((reg & TWI_IRQ_TX) != 0) {
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tmp = readw(&i2c->regs->tx_fifo.stat_ctrl);
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writew(tmp & ~FIFO_IRQEN, &i2c->regs->tx_fifo.stat_ctrl);
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i2c->state = STATE_WANT_WRITE;
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dev_dbg(i2c->adap.dev.parent,
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"%s(): want write\n", __func__);
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goto irq_ok;
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}
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dev_warn(&i2c->adap.dev, "%s(): not mine interrupt\n", __func__);
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iret = IRQ_NONE;
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irq_ok:
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spin_unlock_irqrestore(&i2c->lock, flags);
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if (iret == IRQ_HANDLED)
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wake_up(&i2c->wq);
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return iret;
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}
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static void netup_i2c_reset(struct netup_i2c *i2c)
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{
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dev_dbg(i2c->adap.dev.parent, "%s()\n", __func__);
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i2c->state = STATE_DONE;
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writew(TWI_SOFT_RESET, &i2c->regs->twi_addr_ctrl1);
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writew(TWI_CLKDIV, &i2c->regs->clkdiv);
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writew(FIFO_RESET, &i2c->regs->tx_fifo.stat_ctrl);
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writew(FIFO_RESET, &i2c->regs->rx_fifo.stat_ctrl);
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writew(0x800, &i2c->regs->tx_fifo.stat_ctrl);
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writew(0x800, &i2c->regs->rx_fifo.stat_ctrl);
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}
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static void netup_i2c_fifo_tx(struct netup_i2c *i2c)
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{
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u8 data;
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u32 fifo_space = FIFO_SIZE -
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(readw(&i2c->regs->tx_fifo.stat_ctrl) & 0x3f);
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u32 msg_length = i2c->msg->len - i2c->xmit_size;
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msg_length = (msg_length < fifo_space ? msg_length : fifo_space);
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while (msg_length--) {
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data = i2c->msg->buf[i2c->xmit_size++];
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writeb(data, &i2c->regs->tx_fifo.data8);
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dev_dbg(i2c->adap.dev.parent,
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"%s(): write 0x%02x\n", __func__, data);
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}
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if (i2c->xmit_size < i2c->msg->len) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): TX IRQ enabled\n", __func__);
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writew(readw(&i2c->regs->tx_fifo.stat_ctrl) | FIFO_IRQEN,
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&i2c->regs->tx_fifo.stat_ctrl);
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}
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}
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static void netup_i2c_fifo_rx(struct netup_i2c *i2c)
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{
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u8 data;
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u32 fifo_size = readw(&i2c->regs->rx_fifo.stat_ctrl) & 0x3f;
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dev_dbg(i2c->adap.dev.parent,
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"%s(): RX fifo size %d\n", __func__, fifo_size);
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while (fifo_size--) {
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data = readb(&i2c->regs->rx_fifo.data8);
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if ((i2c->msg->flags & I2C_M_RD) != 0 &&
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i2c->xmit_size < i2c->msg->len) {
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i2c->msg->buf[i2c->xmit_size++] = data;
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dev_dbg(i2c->adap.dev.parent,
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"%s(): read 0x%02x\n", __func__, data);
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}
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}
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if (i2c->xmit_size < i2c->msg->len) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): RX IRQ enabled\n", __func__);
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writew(readw(&i2c->regs->rx_fifo.stat_ctrl) | FIFO_IRQEN,
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&i2c->regs->rx_fifo.stat_ctrl);
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}
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}
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static void netup_i2c_start_xfer(struct netup_i2c *i2c)
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{
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u16 rdflag = ((i2c->msg->flags & I2C_M_RD) ? 1 : 0);
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u16 reg = readw(&i2c->regs->twi_ctrl0_stat);
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writew(TWI_IRQEN | reg, &i2c->regs->twi_ctrl0_stat);
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writew(i2c->msg->len, &i2c->regs->length);
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writew(TWI_TRANSFER | (i2c->msg->addr << 1) | rdflag,
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&i2c->regs->twi_addr_ctrl1);
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dev_dbg(i2c->adap.dev.parent,
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"%s(): length %d twi_addr_ctrl1 0x%x twi_ctrl0_stat 0x%x\n",
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__func__, readw(&i2c->regs->length),
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readw(&i2c->regs->twi_addr_ctrl1),
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readw(&i2c->regs->twi_ctrl0_stat));
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i2c->state = STATE_WAIT;
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i2c->xmit_size = 0;
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if (!rdflag)
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netup_i2c_fifo_tx(i2c);
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else
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writew(FIFO_IRQEN | readw(&i2c->regs->rx_fifo.stat_ctrl),
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&i2c->regs->rx_fifo.stat_ctrl);
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}
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static int netup_i2c_xfer(struct i2c_adapter *adap,
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struct i2c_msg *msgs, int num)
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{
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unsigned long flags;
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int i, trans_done, res = num;
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struct netup_i2c *i2c = i2c_get_adapdata(adap);
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u16 reg;
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spin_lock_irqsave(&i2c->lock, flags);
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if (i2c->state != STATE_DONE) {
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dev_dbg(i2c->adap.dev.parent,
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"%s(): i2c->state == %d, resetting I2C\n",
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__func__, i2c->state);
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netup_i2c_reset(i2c);
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}
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dev_dbg(i2c->adap.dev.parent, "%s() num %d\n", __func__, num);
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for (i = 0; i < num; i++) {
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i2c->msg = &msgs[i];
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netup_i2c_start_xfer(i2c);
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trans_done = 0;
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while (!trans_done) {
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spin_unlock_irqrestore(&i2c->lock, flags);
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if (wait_event_timeout(i2c->wq,
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i2c->state != STATE_WAIT,
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msecs_to_jiffies(NETUP_I2C_TIMEOUT))) {
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spin_lock_irqsave(&i2c->lock, flags);
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switch (i2c->state) {
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case STATE_WANT_READ:
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netup_i2c_fifo_rx(i2c);
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break;
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case STATE_WANT_WRITE:
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netup_i2c_fifo_tx(i2c);
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break;
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case STATE_DONE:
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if ((i2c->msg->flags & I2C_M_RD) != 0 &&
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i2c->xmit_size != i2c->msg->len)
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netup_i2c_fifo_rx(i2c);
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dev_dbg(i2c->adap.dev.parent,
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"%s(): msg %d OK\n",
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__func__, i);
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trans_done = 1;
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break;
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case STATE_ERROR:
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res = -EIO;
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dev_dbg(i2c->adap.dev.parent,
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"%s(): error state\n",
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__func__);
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goto done;
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default:
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dev_dbg(i2c->adap.dev.parent,
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"%s(): invalid state %d\n",
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__func__, i2c->state);
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res = -EINVAL;
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goto done;
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}
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if (!trans_done) {
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i2c->state = STATE_WAIT;
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reg = readw(
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&i2c->regs->twi_ctrl0_stat);
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writew(TWI_IRQEN | reg,
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&i2c->regs->twi_ctrl0_stat);
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}
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spin_unlock_irqrestore(&i2c->lock, flags);
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} else {
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spin_lock_irqsave(&i2c->lock, flags);
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dev_dbg(i2c->adap.dev.parent,
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"%s(): wait timeout\n", __func__);
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res = -ETIMEDOUT;
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goto done;
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}
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spin_lock_irqsave(&i2c->lock, flags);
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}
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}
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done:
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spin_unlock_irqrestore(&i2c->lock, flags);
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dev_dbg(i2c->adap.dev.parent, "%s(): result %d\n", __func__, res);
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return res;
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}
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static u32 netup_i2c_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm netup_i2c_algorithm = {
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.master_xfer = netup_i2c_xfer,
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.functionality = netup_i2c_func,
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};
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static const struct i2c_adapter netup_i2c_adapter = {
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.owner = THIS_MODULE,
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.name = NETUP_UNIDVB_NAME,
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.class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
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.algo = &netup_i2c_algorithm,
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};
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static int netup_i2c_init(struct netup_unidvb_dev *ndev, int bus_num)
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{
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int ret;
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struct netup_i2c *i2c;
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if (bus_num < 0 || bus_num > 1) {
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dev_err(&ndev->pci_dev->dev,
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"%s(): invalid bus_num %d\n", __func__, bus_num);
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return -EINVAL;
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}
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i2c = &ndev->i2c[bus_num];
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spin_lock_init(&i2c->lock);
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init_waitqueue_head(&i2c->wq);
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i2c->regs = (struct netup_i2c_regs __iomem *)(ndev->bmmio0 +
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(bus_num == 0 ? NETUP_I2C_BUS0_ADDR : NETUP_I2C_BUS1_ADDR));
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netup_i2c_reset(i2c);
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i2c->adap = netup_i2c_adapter;
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i2c->adap.dev.parent = &ndev->pci_dev->dev;
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i2c_set_adapdata(&i2c->adap, i2c);
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ret = i2c_add_adapter(&i2c->adap);
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if (ret)
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return ret;
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dev_info(&ndev->pci_dev->dev,
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"%s(): registered I2C bus %d at 0x%x\n",
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|
__func__,
|
||
|
|
bus_num, (bus_num == 0 ?
|
||
|
|
NETUP_I2C_BUS0_ADDR :
|
||
|
|
NETUP_I2C_BUS1_ADDR));
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void netup_i2c_remove(struct netup_unidvb_dev *ndev, int bus_num)
|
||
|
|
{
|
||
|
|
struct netup_i2c *i2c;
|
||
|
|
|
||
|
|
if (bus_num < 0 || bus_num > 1) {
|
||
|
|
dev_err(&ndev->pci_dev->dev,
|
||
|
|
"%s(): invalid bus number %d\n", __func__, bus_num);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
i2c = &ndev->i2c[bus_num];
|
||
|
|
netup_i2c_reset(i2c);
|
||
|
|
/* remove adapter */
|
||
|
|
i2c_del_adapter(&i2c->adap);
|
||
|
|
dev_info(&ndev->pci_dev->dev,
|
||
|
|
"netup_i2c_remove: unregistered I2C bus %d\n", bus_num);
|
||
|
|
}
|
||
|
|
|
||
|
|
int netup_i2c_register(struct netup_unidvb_dev *ndev)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ret = netup_i2c_init(ndev, 0);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
ret = netup_i2c_init(ndev, 1);
|
||
|
|
if (ret) {
|
||
|
|
netup_i2c_remove(ndev, 0);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void netup_i2c_unregister(struct netup_unidvb_dev *ndev)
|
||
|
|
{
|
||
|
|
netup_i2c_remove(ndev, 0);
|
||
|
|
netup_i2c_remove(ndev, 1);
|
||
|
|
}
|
||
|
|
|