425 lines
11 KiB
C
425 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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// SPI to CAN driver for the Texas Instruments TCAN4x5x
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// Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/
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#include "tcan4x5x.h"
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#define TCAN4X5X_EXT_CLK_DEF 40000000
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#define TCAN4X5X_DEV_ID0 0x00
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#define TCAN4X5X_DEV_ID1 0x04
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#define TCAN4X5X_REV 0x08
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#define TCAN4X5X_STATUS 0x0C
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#define TCAN4X5X_ERROR_STATUS_MASK 0x10
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#define TCAN4X5X_CONTROL 0x14
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#define TCAN4X5X_CONFIG 0x800
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#define TCAN4X5X_TS_PRESCALE 0x804
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#define TCAN4X5X_TEST_REG 0x808
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#define TCAN4X5X_INT_FLAGS 0x820
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#define TCAN4X5X_MCAN_INT_REG 0x824
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#define TCAN4X5X_INT_EN 0x830
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/* Interrupt bits */
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#define TCAN4X5X_CANBUSTERMOPEN_INT_EN BIT(30)
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#define TCAN4X5X_CANHCANL_INT_EN BIT(29)
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#define TCAN4X5X_CANHBAT_INT_EN BIT(28)
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#define TCAN4X5X_CANLGND_INT_EN BIT(27)
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#define TCAN4X5X_CANBUSOPEN_INT_EN BIT(26)
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#define TCAN4X5X_CANBUSGND_INT_EN BIT(25)
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#define TCAN4X5X_CANBUSBAT_INT_EN BIT(24)
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#define TCAN4X5X_UVSUP_INT_EN BIT(22)
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#define TCAN4X5X_UVIO_INT_EN BIT(21)
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#define TCAN4X5X_TSD_INT_EN BIT(19)
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#define TCAN4X5X_ECCERR_INT_EN BIT(16)
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#define TCAN4X5X_CANINT_INT_EN BIT(15)
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#define TCAN4X5X_LWU_INT_EN BIT(14)
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#define TCAN4X5X_CANSLNT_INT_EN BIT(10)
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#define TCAN4X5X_CANDOM_INT_EN BIT(8)
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#define TCAN4X5X_CANBUS_ERR_INT_EN BIT(5)
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#define TCAN4X5X_BUS_FAULT BIT(4)
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#define TCAN4X5X_MCAN_INT BIT(1)
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#define TCAN4X5X_ENABLE_TCAN_INT \
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(TCAN4X5X_MCAN_INT | TCAN4X5X_BUS_FAULT | \
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TCAN4X5X_CANBUS_ERR_INT_EN | TCAN4X5X_CANINT_INT_EN)
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/* MCAN Interrupt bits */
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#define TCAN4X5X_MCAN_IR_ARA BIT(29)
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#define TCAN4X5X_MCAN_IR_PED BIT(28)
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#define TCAN4X5X_MCAN_IR_PEA BIT(27)
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#define TCAN4X5X_MCAN_IR_WD BIT(26)
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#define TCAN4X5X_MCAN_IR_BO BIT(25)
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#define TCAN4X5X_MCAN_IR_EW BIT(24)
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#define TCAN4X5X_MCAN_IR_EP BIT(23)
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#define TCAN4X5X_MCAN_IR_ELO BIT(22)
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#define TCAN4X5X_MCAN_IR_BEU BIT(21)
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#define TCAN4X5X_MCAN_IR_BEC BIT(20)
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#define TCAN4X5X_MCAN_IR_DRX BIT(19)
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#define TCAN4X5X_MCAN_IR_TOO BIT(18)
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#define TCAN4X5X_MCAN_IR_MRAF BIT(17)
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#define TCAN4X5X_MCAN_IR_TSW BIT(16)
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#define TCAN4X5X_MCAN_IR_TEFL BIT(15)
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#define TCAN4X5X_MCAN_IR_TEFF BIT(14)
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#define TCAN4X5X_MCAN_IR_TEFW BIT(13)
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#define TCAN4X5X_MCAN_IR_TEFN BIT(12)
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#define TCAN4X5X_MCAN_IR_TFE BIT(11)
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#define TCAN4X5X_MCAN_IR_TCF BIT(10)
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#define TCAN4X5X_MCAN_IR_TC BIT(9)
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#define TCAN4X5X_MCAN_IR_HPM BIT(8)
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#define TCAN4X5X_MCAN_IR_RF1L BIT(7)
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#define TCAN4X5X_MCAN_IR_RF1F BIT(6)
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#define TCAN4X5X_MCAN_IR_RF1W BIT(5)
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#define TCAN4X5X_MCAN_IR_RF1N BIT(4)
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#define TCAN4X5X_MCAN_IR_RF0L BIT(3)
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#define TCAN4X5X_MCAN_IR_RF0F BIT(2)
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#define TCAN4X5X_MCAN_IR_RF0W BIT(1)
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#define TCAN4X5X_MCAN_IR_RF0N BIT(0)
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#define TCAN4X5X_ENABLE_MCAN_INT \
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(TCAN4X5X_MCAN_IR_TC | TCAN4X5X_MCAN_IR_RF0N | \
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TCAN4X5X_MCAN_IR_RF1N | TCAN4X5X_MCAN_IR_RF0F | \
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TCAN4X5X_MCAN_IR_RF1F)
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#define TCAN4X5X_MRAM_START 0x8000
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#define TCAN4X5X_MCAN_OFFSET 0x1000
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#define TCAN4X5X_CLEAR_ALL_INT 0xffffffff
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#define TCAN4X5X_SET_ALL_INT 0xffffffff
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#define TCAN4X5X_MODE_SEL_MASK (BIT(7) | BIT(6))
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#define TCAN4X5X_MODE_SLEEP 0x00
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#define TCAN4X5X_MODE_STANDBY BIT(6)
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#define TCAN4X5X_MODE_NORMAL BIT(7)
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#define TCAN4X5X_DISABLE_WAKE_MSK (BIT(31) | BIT(30))
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#define TCAN4X5X_DISABLE_INH_MSK BIT(9)
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#define TCAN4X5X_SW_RESET BIT(2)
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#define TCAN4X5X_MCAN_CONFIGURED BIT(5)
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#define TCAN4X5X_WATCHDOG_EN BIT(3)
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#define TCAN4X5X_WD_60_MS_TIMER 0
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#define TCAN4X5X_WD_600_MS_TIMER BIT(28)
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#define TCAN4X5X_WD_3_S_TIMER BIT(29)
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#define TCAN4X5X_WD_6_S_TIMER (BIT(28) | BIT(29))
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static inline struct tcan4x5x_priv *cdev_to_priv(struct m_can_classdev *cdev)
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{
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return container_of(cdev, struct tcan4x5x_priv, cdev);
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}
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static void tcan4x5x_check_wake(struct tcan4x5x_priv *priv)
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{
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int wake_state = 0;
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if (priv->device_state_gpio)
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wake_state = gpiod_get_value(priv->device_state_gpio);
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if (priv->device_wake_gpio && wake_state) {
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gpiod_set_value(priv->device_wake_gpio, 0);
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usleep_range(5, 50);
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gpiod_set_value(priv->device_wake_gpio, 1);
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}
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}
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static int tcan4x5x_reset(struct tcan4x5x_priv *priv)
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{
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int ret = 0;
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if (priv->reset_gpio) {
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gpiod_set_value(priv->reset_gpio, 1);
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/* tpulse_width minimum 30us */
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usleep_range(30, 100);
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gpiod_set_value(priv->reset_gpio, 0);
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} else {
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ret = regmap_write(priv->regmap, TCAN4X5X_CONFIG,
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TCAN4X5X_SW_RESET);
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if (ret)
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return ret;
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}
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usleep_range(700, 1000);
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return ret;
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}
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static u32 tcan4x5x_read_reg(struct m_can_classdev *cdev, int reg)
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{
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struct tcan4x5x_priv *priv = cdev_to_priv(cdev);
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u32 val;
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regmap_read(priv->regmap, TCAN4X5X_MCAN_OFFSET + reg, &val);
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return val;
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}
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static int tcan4x5x_read_fifo(struct m_can_classdev *cdev, int addr_offset,
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void *val, size_t val_count)
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{
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struct tcan4x5x_priv *priv = cdev_to_priv(cdev);
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return regmap_bulk_read(priv->regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count);
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}
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static int tcan4x5x_write_reg(struct m_can_classdev *cdev, int reg, int val)
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{
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struct tcan4x5x_priv *priv = cdev_to_priv(cdev);
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return regmap_write(priv->regmap, TCAN4X5X_MCAN_OFFSET + reg, val);
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}
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static int tcan4x5x_write_fifo(struct m_can_classdev *cdev,
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int addr_offset, const void *val, size_t val_count)
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{
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struct tcan4x5x_priv *priv = cdev_to_priv(cdev);
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return regmap_bulk_write(priv->regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count);
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}
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static int tcan4x5x_power_enable(struct regulator *reg, int enable)
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{
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if (IS_ERR_OR_NULL(reg))
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return 0;
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if (enable)
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return regulator_enable(reg);
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else
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return regulator_disable(reg);
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}
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static int tcan4x5x_write_tcan_reg(struct m_can_classdev *cdev,
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int reg, int val)
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{
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struct tcan4x5x_priv *priv = cdev_to_priv(cdev);
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return regmap_write(priv->regmap, reg, val);
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}
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static int tcan4x5x_clear_interrupts(struct m_can_classdev *cdev)
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{
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int ret;
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ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_STATUS,
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TCAN4X5X_CLEAR_ALL_INT);
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if (ret)
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return ret;
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return tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_INT_FLAGS,
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TCAN4X5X_CLEAR_ALL_INT);
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}
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static int tcan4x5x_init(struct m_can_classdev *cdev)
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{
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struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);
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int ret;
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tcan4x5x_check_wake(tcan4x5x);
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ret = tcan4x5x_clear_interrupts(cdev);
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if (ret)
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return ret;
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ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_INT_EN,
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TCAN4X5X_ENABLE_TCAN_INT);
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if (ret)
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return ret;
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ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_ERROR_STATUS_MASK,
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TCAN4X5X_CLEAR_ALL_INT);
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if (ret)
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return ret;
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ret = regmap_update_bits(tcan4x5x->regmap, TCAN4X5X_CONFIG,
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TCAN4X5X_MODE_SEL_MASK, TCAN4X5X_MODE_NORMAL);
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if (ret)
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return ret;
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return ret;
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}
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static int tcan4x5x_disable_wake(struct m_can_classdev *cdev)
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{
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struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);
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return regmap_update_bits(tcan4x5x->regmap, TCAN4X5X_CONFIG,
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TCAN4X5X_DISABLE_WAKE_MSK, 0x00);
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}
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static int tcan4x5x_disable_state(struct m_can_classdev *cdev)
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{
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struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);
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return regmap_update_bits(tcan4x5x->regmap, TCAN4X5X_CONFIG,
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TCAN4X5X_DISABLE_INH_MSK, 0x01);
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}
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static int tcan4x5x_get_gpios(struct m_can_classdev *cdev)
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{
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struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);
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int ret;
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tcan4x5x->device_wake_gpio = devm_gpiod_get(cdev->dev, "device-wake",
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GPIOD_OUT_HIGH);
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if (IS_ERR(tcan4x5x->device_wake_gpio)) {
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if (PTR_ERR(tcan4x5x->device_wake_gpio) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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tcan4x5x_disable_wake(cdev);
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}
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tcan4x5x->reset_gpio = devm_gpiod_get_optional(cdev->dev, "reset",
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GPIOD_OUT_LOW);
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if (IS_ERR(tcan4x5x->reset_gpio))
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tcan4x5x->reset_gpio = NULL;
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ret = tcan4x5x_reset(tcan4x5x);
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if (ret)
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return ret;
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tcan4x5x->device_state_gpio = devm_gpiod_get_optional(cdev->dev,
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"device-state",
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GPIOD_IN);
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if (IS_ERR(tcan4x5x->device_state_gpio)) {
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tcan4x5x->device_state_gpio = NULL;
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tcan4x5x_disable_state(cdev);
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}
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return 0;
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}
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static struct m_can_ops tcan4x5x_ops = {
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.init = tcan4x5x_init,
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.read_reg = tcan4x5x_read_reg,
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.write_reg = tcan4x5x_write_reg,
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.write_fifo = tcan4x5x_write_fifo,
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.read_fifo = tcan4x5x_read_fifo,
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.clear_interrupts = tcan4x5x_clear_interrupts,
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};
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static int tcan4x5x_can_probe(struct spi_device *spi)
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{
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struct tcan4x5x_priv *priv;
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struct m_can_classdev *mcan_class;
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int freq, ret;
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mcan_class = m_can_class_allocate_dev(&spi->dev,
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sizeof(struct tcan4x5x_priv));
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if (!mcan_class)
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return -ENOMEM;
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priv = cdev_to_priv(mcan_class);
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priv->power = devm_regulator_get_optional(&spi->dev, "vsup");
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if (PTR_ERR(priv->power) == -EPROBE_DEFER) {
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ret = -EPROBE_DEFER;
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goto out_m_can_class_free_dev;
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} else {
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priv->power = NULL;
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}
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m_can_class_get_clocks(mcan_class);
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|
if (IS_ERR(mcan_class->cclk)) {
|
||
|
|
dev_err(&spi->dev, "no CAN clock source defined\n");
|
||
|
|
freq = TCAN4X5X_EXT_CLK_DEF;
|
||
|
|
} else {
|
||
|
|
freq = clk_get_rate(mcan_class->cclk);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Sanity check */
|
||
|
|
if (freq < 20000000 || freq > TCAN4X5X_EXT_CLK_DEF) {
|
||
|
|
ret = -ERANGE;
|
||
|
|
goto out_m_can_class_free_dev;
|
||
|
|
}
|
||
|
|
|
||
|
|
priv->spi = spi;
|
||
|
|
|
||
|
|
mcan_class->pm_clock_support = 0;
|
||
|
|
mcan_class->can.clock.freq = freq;
|
||
|
|
mcan_class->dev = &spi->dev;
|
||
|
|
mcan_class->ops = &tcan4x5x_ops;
|
||
|
|
mcan_class->is_peripheral = true;
|
||
|
|
mcan_class->net->irq = spi->irq;
|
||
|
|
|
||
|
|
spi_set_drvdata(spi, priv);
|
||
|
|
|
||
|
|
/* Configure the SPI bus */
|
||
|
|
spi->bits_per_word = 8;
|
||
|
|
ret = spi_setup(spi);
|
||
|
|
if (ret)
|
||
|
|
goto out_m_can_class_free_dev;
|
||
|
|
|
||
|
|
ret = tcan4x5x_regmap_init(priv);
|
||
|
|
if (ret)
|
||
|
|
goto out_m_can_class_free_dev;
|
||
|
|
|
||
|
|
ret = tcan4x5x_power_enable(priv->power, 1);
|
||
|
|
if (ret)
|
||
|
|
goto out_m_can_class_free_dev;
|
||
|
|
|
||
|
|
ret = tcan4x5x_get_gpios(mcan_class);
|
||
|
|
if (ret)
|
||
|
|
goto out_power;
|
||
|
|
|
||
|
|
ret = tcan4x5x_init(mcan_class);
|
||
|
|
if (ret)
|
||
|
|
goto out_power;
|
||
|
|
|
||
|
|
ret = m_can_class_register(mcan_class);
|
||
|
|
if (ret)
|
||
|
|
goto out_power;
|
||
|
|
|
||
|
|
netdev_info(mcan_class->net, "TCAN4X5X successfully initialized.\n");
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
out_power:
|
||
|
|
tcan4x5x_power_enable(priv->power, 0);
|
||
|
|
out_m_can_class_free_dev:
|
||
|
|
m_can_class_free_dev(mcan_class->net);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void tcan4x5x_can_remove(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
struct tcan4x5x_priv *priv = spi_get_drvdata(spi);
|
||
|
|
|
||
|
|
m_can_class_unregister(&priv->cdev);
|
||
|
|
|
||
|
|
tcan4x5x_power_enable(priv->power, 0);
|
||
|
|
|
||
|
|
m_can_class_free_dev(priv->cdev.net);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct of_device_id tcan4x5x_of_match[] = {
|
||
|
|
{
|
||
|
|
.compatible = "ti,tcan4x5x",
|
||
|
|
}, {
|
||
|
|
/* sentinel */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, tcan4x5x_of_match);
|
||
|
|
|
||
|
|
static const struct spi_device_id tcan4x5x_id_table[] = {
|
||
|
|
{
|
||
|
|
.name = "tcan4x5x",
|
||
|
|
}, {
|
||
|
|
/* sentinel */
|
||
|
|
},
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(spi, tcan4x5x_id_table);
|
||
|
|
|
||
|
|
static struct spi_driver tcan4x5x_can_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = KBUILD_MODNAME,
|
||
|
|
.of_match_table = tcan4x5x_of_match,
|
||
|
|
.pm = NULL,
|
||
|
|
},
|
||
|
|
.id_table = tcan4x5x_id_table,
|
||
|
|
.probe = tcan4x5x_can_probe,
|
||
|
|
.remove = tcan4x5x_can_remove,
|
||
|
|
};
|
||
|
|
module_spi_driver(tcan4x5x_can_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
|
||
|
|
MODULE_DESCRIPTION("Texas Instruments TCAN4x5x CAN driver");
|
||
|
|
MODULE_LICENSE("GPL v2");
|