417 lines
11 KiB
C
417 lines
11 KiB
C
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/*
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* Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "common.h"
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/* VSC8211 PHY specific registers. */
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enum {
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VSC8211_SIGDET_CTRL = 19,
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VSC8211_EXT_CTRL = 23,
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VSC8211_INTR_ENABLE = 25,
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VSC8211_INTR_STATUS = 26,
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VSC8211_LED_CTRL = 27,
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VSC8211_AUX_CTRL_STAT = 28,
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VSC8211_EXT_PAGE_AXS = 31,
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};
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enum {
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VSC_INTR_RX_ERR = 1 << 0,
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VSC_INTR_MS_ERR = 1 << 1, /* master/slave resolution error */
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VSC_INTR_CABLE = 1 << 2, /* cable impairment */
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VSC_INTR_FALSE_CARR = 1 << 3, /* false carrier */
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VSC_INTR_MEDIA_CHG = 1 << 4, /* AMS media change */
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VSC_INTR_RX_FIFO = 1 << 5, /* Rx FIFO over/underflow */
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VSC_INTR_TX_FIFO = 1 << 6, /* Tx FIFO over/underflow */
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VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
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VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */
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VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
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VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
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VSC_INTR_DPLX_CHG = 1 << 12, /* duplex change */
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VSC_INTR_LINK_CHG = 1 << 13, /* link change */
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VSC_INTR_SPD_CHG = 1 << 14, /* speed change */
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VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
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};
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enum {
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VSC_CTRL_CLAUSE37_VIEW = 1 << 4, /* Switch to Clause 37 view */
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VSC_CTRL_MEDIA_MODE_HI = 0xf000 /* High part of media mode select */
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};
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#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
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VSC_INTR_DPLX_CHG | VSC_INTR_SPD_CHG | \
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VSC_INTR_NEG_DONE)
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#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
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VSC_INTR_ENABLE)
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/* PHY specific auxiliary control & status register fields */
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#define S_ACSR_ACTIPHY_TMR 0
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#define M_ACSR_ACTIPHY_TMR 0x3
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#define V_ACSR_ACTIPHY_TMR(x) ((x) << S_ACSR_ACTIPHY_TMR)
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#define S_ACSR_SPEED 3
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#define M_ACSR_SPEED 0x3
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#define G_ACSR_SPEED(x) (((x) >> S_ACSR_SPEED) & M_ACSR_SPEED)
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#define S_ACSR_DUPLEX 5
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#define F_ACSR_DUPLEX (1 << S_ACSR_DUPLEX)
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#define S_ACSR_ACTIPHY 6
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#define F_ACSR_ACTIPHY (1 << S_ACSR_ACTIPHY)
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/*
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* Reset the PHY. This PHY completes reset immediately so we never wait.
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*/
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static int vsc8211_reset(struct cphy *cphy, int wait)
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{
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return t3_phy_reset(cphy, MDIO_DEVAD_NONE, 0);
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}
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static int vsc8211_intr_enable(struct cphy *cphy)
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{
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return t3_mdio_write(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_ENABLE,
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INTR_MASK);
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}
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static int vsc8211_intr_disable(struct cphy *cphy)
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{
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return t3_mdio_write(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_ENABLE, 0);
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}
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static int vsc8211_intr_clear(struct cphy *cphy)
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{
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u32 val;
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/* Clear PHY interrupts by reading the register. */
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return t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_STATUS, &val);
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}
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static int vsc8211_autoneg_enable(struct cphy *cphy)
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{
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return t3_mdio_change_bits(cphy, MDIO_DEVAD_NONE, MII_BMCR,
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BMCR_PDOWN | BMCR_ISOLATE,
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BMCR_ANENABLE | BMCR_ANRESTART);
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}
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static int vsc8211_autoneg_restart(struct cphy *cphy)
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{
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return t3_mdio_change_bits(cphy, MDIO_DEVAD_NONE, MII_BMCR,
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BMCR_PDOWN | BMCR_ISOLATE,
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BMCR_ANRESTART);
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}
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static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
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int *speed, int *duplex, int *fc)
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{
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unsigned int bmcr, status, lpa, adv;
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int err, sp = -1, dplx = -1, pause = 0;
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMCR, &bmcr);
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if (!err)
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR, &status);
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if (err)
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return err;
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if (link_ok) {
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/*
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* BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
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* once more to get the current link state.
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*/
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if (!(status & BMSR_LSTATUS))
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR,
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&status);
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if (err)
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return err;
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*link_ok = (status & BMSR_LSTATUS) != 0;
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}
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if (!(bmcr & BMCR_ANENABLE)) {
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dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
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if (bmcr & BMCR_SPEED1000)
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sp = SPEED_1000;
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else if (bmcr & BMCR_SPEED100)
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sp = SPEED_100;
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else
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sp = SPEED_10;
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} else if (status & BMSR_ANEGCOMPLETE) {
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_AUX_CTRL_STAT,
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&status);
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if (err)
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return err;
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dplx = (status & F_ACSR_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF;
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sp = G_ACSR_SPEED(status);
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if (sp == 0)
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sp = SPEED_10;
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else if (sp == 1)
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sp = SPEED_100;
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else
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sp = SPEED_1000;
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if (fc && dplx == DUPLEX_FULL) {
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_LPA,
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&lpa);
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if (!err)
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE,
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MII_ADVERTISE, &adv);
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if (err)
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return err;
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if (lpa & adv & ADVERTISE_PAUSE_CAP)
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pause = PAUSE_RX | PAUSE_TX;
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else if ((lpa & ADVERTISE_PAUSE_CAP) &&
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(lpa & ADVERTISE_PAUSE_ASYM) &&
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(adv & ADVERTISE_PAUSE_ASYM))
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pause = PAUSE_TX;
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else if ((lpa & ADVERTISE_PAUSE_ASYM) &&
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(adv & ADVERTISE_PAUSE_CAP))
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pause = PAUSE_RX;
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}
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}
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if (speed)
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*speed = sp;
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if (duplex)
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*duplex = dplx;
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if (fc)
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*fc = pause;
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return 0;
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}
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static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
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int *speed, int *duplex, int *fc)
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{
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unsigned int bmcr, status, lpa, adv;
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int err, sp = -1, dplx = -1, pause = 0;
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMCR, &bmcr);
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if (!err)
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR, &status);
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if (err)
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return err;
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if (link_ok) {
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/*
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* BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
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* once more to get the current link state.
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*/
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if (!(status & BMSR_LSTATUS))
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_BMSR,
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&status);
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if (err)
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return err;
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*link_ok = (status & BMSR_LSTATUS) != 0;
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}
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if (!(bmcr & BMCR_ANENABLE)) {
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dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
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if (bmcr & BMCR_SPEED1000)
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sp = SPEED_1000;
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else if (bmcr & BMCR_SPEED100)
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sp = SPEED_100;
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else
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sp = SPEED_10;
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} else if (status & BMSR_ANEGCOMPLETE) {
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_LPA, &lpa);
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if (!err)
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, MII_ADVERTISE,
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&adv);
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if (err)
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return err;
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if (adv & lpa & ADVERTISE_1000XFULL) {
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dplx = DUPLEX_FULL;
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sp = SPEED_1000;
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} else if (adv & lpa & ADVERTISE_1000XHALF) {
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dplx = DUPLEX_HALF;
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sp = SPEED_1000;
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}
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if (fc && dplx == DUPLEX_FULL) {
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if (lpa & adv & ADVERTISE_1000XPAUSE)
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pause = PAUSE_RX | PAUSE_TX;
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else if ((lpa & ADVERTISE_1000XPAUSE) &&
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(adv & lpa & ADVERTISE_1000XPSE_ASYM))
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pause = PAUSE_TX;
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else if ((lpa & ADVERTISE_1000XPSE_ASYM) &&
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(adv & ADVERTISE_1000XPAUSE))
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pause = PAUSE_RX;
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}
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}
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if (speed)
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*speed = sp;
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if (duplex)
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*duplex = dplx;
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if (fc)
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*fc = pause;
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return 0;
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}
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#ifdef UNUSED
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/*
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* Enable/disable auto MDI/MDI-X in forced link speed mode.
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*/
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static int vsc8211_set_automdi(struct cphy *phy, int enable)
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{
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int err;
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err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0x52b5);
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if (err)
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return err;
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err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 18, 0x12);
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if (err)
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return err;
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err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 17, enable ? 0x2803 : 0x3003);
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if (err)
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return err;
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err = t3_mdio_write(phy, MDIO_DEVAD_NONE, 16, 0x87fa);
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if (err)
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return err;
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err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0);
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if (err)
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return err;
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return 0;
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}
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int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex)
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{
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int err;
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err = t3_set_phy_speed_duplex(phy, speed, duplex);
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if (!err)
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err = vsc8211_set_automdi(phy, 1);
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return err;
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}
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#endif /* UNUSED */
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static int vsc8211_power_down(struct cphy *cphy, int enable)
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{
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return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
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enable ? BMCR_PDOWN : 0);
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}
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static int vsc8211_intr_handler(struct cphy *cphy)
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{
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unsigned int cause;
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int err, cphy_cause = 0;
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err = t3_mdio_read(cphy, MDIO_DEVAD_NONE, VSC8211_INTR_STATUS, &cause);
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if (err)
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return err;
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cause &= INTR_MASK;
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if (cause & CFG_CHG_INTR_MASK)
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cphy_cause |= cphy_cause_link_change;
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if (cause & (VSC_INTR_RX_FIFO | VSC_INTR_TX_FIFO))
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cphy_cause |= cphy_cause_fifo_error;
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return cphy_cause;
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}
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static const struct cphy_ops vsc8211_ops = {
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.reset = vsc8211_reset,
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.intr_enable = vsc8211_intr_enable,
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.intr_disable = vsc8211_intr_disable,
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.intr_clear = vsc8211_intr_clear,
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.intr_handler = vsc8211_intr_handler,
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.autoneg_enable = vsc8211_autoneg_enable,
|
||
|
|
.autoneg_restart = vsc8211_autoneg_restart,
|
||
|
|
.advertise = t3_phy_advertise,
|
||
|
|
.set_speed_duplex = t3_set_phy_speed_duplex,
|
||
|
|
.get_link_status = vsc8211_get_link_status,
|
||
|
|
.power_down = vsc8211_power_down,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct cphy_ops vsc8211_fiber_ops = {
|
||
|
|
.reset = vsc8211_reset,
|
||
|
|
.intr_enable = vsc8211_intr_enable,
|
||
|
|
.intr_disable = vsc8211_intr_disable,
|
||
|
|
.intr_clear = vsc8211_intr_clear,
|
||
|
|
.intr_handler = vsc8211_intr_handler,
|
||
|
|
.autoneg_enable = vsc8211_autoneg_enable,
|
||
|
|
.autoneg_restart = vsc8211_autoneg_restart,
|
||
|
|
.advertise = t3_phy_advertise_fiber,
|
||
|
|
.set_speed_duplex = t3_set_phy_speed_duplex,
|
||
|
|
.get_link_status = vsc8211_get_link_status_fiber,
|
||
|
|
.power_down = vsc8211_power_down,
|
||
|
|
};
|
||
|
|
|
||
|
|
int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
|
||
|
|
int phy_addr, const struct mdio_ops *mdio_ops)
|
||
|
|
{
|
||
|
|
int err;
|
||
|
|
unsigned int val;
|
||
|
|
|
||
|
|
cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
|
||
|
|
SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
|
||
|
|
SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
|
||
|
|
SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
|
||
|
|
msleep(20); /* PHY needs ~10ms to start responding to MDIO */
|
||
|
|
|
||
|
|
err = t3_mdio_read(phy, MDIO_DEVAD_NONE, VSC8211_EXT_CTRL, &val);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
if (val & VSC_CTRL_MEDIA_MODE_HI) {
|
||
|
|
/* copper interface, just need to configure the LEDs */
|
||
|
|
return t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_LED_CTRL,
|
||
|
|
0x100);
|
||
|
|
}
|
||
|
|
|
||
|
|
phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
|
||
|
|
SUPPORTED_MII | SUPPORTED_FIBRE | SUPPORTED_IRQ;
|
||
|
|
phy->desc = "1000BASE-X";
|
||
|
|
phy->ops = &vsc8211_fiber_ops;
|
||
|
|
|
||
|
|
err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 1);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_SIGDET_CTRL, 1);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_PAGE_AXS, 0);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
err = t3_mdio_write(phy, MDIO_DEVAD_NONE, VSC8211_EXT_CTRL,
|
||
|
|
val | VSC_CTRL_CLAUSE37_VIEW);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
err = vsc8211_reset(phy, 0);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
udelay(5); /* delay after reset before next SMI */
|
||
|
|
return 0;
|
||
|
|
}
|