118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2012-2014, 2018-2019 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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*/
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#ifndef __iwl_fw_api_config_h__
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#define __iwl_fw_api_config_h__
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/*
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* struct iwl_dqa_enable_cmd
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* @cmd_queue: the TXQ number of the command queue
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*/
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struct iwl_dqa_enable_cmd {
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__le32 cmd_queue;
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} __packed; /* DQA_CONTROL_CMD_API_S_VER_1 */
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/*
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* struct iwl_tx_ant_cfg_cmd
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* @valid: valid antenna configuration
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*/
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struct iwl_tx_ant_cfg_cmd {
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__le32 valid;
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} __packed;
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/**
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* struct iwl_calib_ctrl - Calibration control struct.
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* Sent as part of the phy configuration command.
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* @flow_trigger: bitmap for which calibrations to perform according to
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* flow triggers, using &enum iwl_calib_cfg
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* @event_trigger: bitmap for which calibrations to perform according to
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* event triggers, using &enum iwl_calib_cfg
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*/
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struct iwl_calib_ctrl {
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__le32 flow_trigger;
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__le32 event_trigger;
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} __packed;
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/* This enum defines the bitmap of various calibrations to enable in both
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* init ucode and runtime ucode through CALIBRATION_CFG_CMD.
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*/
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enum iwl_calib_cfg {
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IWL_CALIB_CFG_XTAL_IDX = BIT(0),
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IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
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IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
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IWL_CALIB_CFG_PAPD_IDX = BIT(3),
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IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
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IWL_CALIB_CFG_DC_IDX = BIT(5),
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IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
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IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
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IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
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IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
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IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
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IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
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IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
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IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
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IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
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IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
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IWL_CALIB_CFG_DAC_IDX = BIT(16),
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IWL_CALIB_CFG_ABS_IDX = BIT(17),
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IWL_CALIB_CFG_AGC_IDX = BIT(18),
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};
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/**
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* struct iwl_phy_specific_cfg - specific PHY filter configuration
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*
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* Sent as part of the phy configuration command (v3) to configure specific FW
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* defined PHY filters that can be applied to each antenna.
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*
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* @filter_cfg_chain_a: filter config id for LMAC1 chain A
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* @filter_cfg_chain_b: filter config id for LMAC1 chain B
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* @filter_cfg_chain_c: filter config id for LMAC2 chain A
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* @filter_cfg_chain_d: filter config id for LMAC2 chain B
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* values: 0 - no filter; 0xffffffff - reserved; otherwise - filter id
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*/
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struct iwl_phy_specific_cfg {
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__le32 filter_cfg_chain_a;
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__le32 filter_cfg_chain_b;
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__le32 filter_cfg_chain_c;
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__le32 filter_cfg_chain_d;
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} __packed; /* PHY_SPECIFIC_CONFIGURATION_API_VER_1*/
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/**
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* struct iwl_phy_cfg_cmd - Phy configuration command
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*
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* @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
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* @calib_control: calibration control data
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*/
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struct iwl_phy_cfg_cmd_v1 {
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__le32 phy_cfg;
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struct iwl_calib_ctrl calib_control;
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} __packed;
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/**
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* struct iwl_phy_cfg_cmd_v3 - Phy configuration command (v3)
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*
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* @phy_cfg: PHY configuration value, uses &enum iwl_fw_phy_cfg
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* @calib_control: calibration control data
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* @phy_specific_cfg: configure predefined PHY filters
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*/
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struct iwl_phy_cfg_cmd_v3 {
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__le32 phy_cfg;
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struct iwl_calib_ctrl calib_control;
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struct iwl_phy_specific_cfg phy_specific_cfg;
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} __packed; /* PHY_CONFIGURATION_CMD_API_S_VER_3 */
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/*
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* enum iwl_dc2dc_config_id - flag ids
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*
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* Ids of dc2dc configuration flags
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*/
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enum iwl_dc2dc_config_id {
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DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */
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DCDC_FREQ_TUNE_SET = 0x2,
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}; /* MARKER_ID_API_E_VER_1 */
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#endif /* __iwl_fw_api_config_h__ */
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