275 lines
7.1 KiB
C
275 lines
7.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2005-2014, 2018-2021 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016 Intel Deutschland GmbH
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*/
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#ifndef __iwl_fw_img_h__
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#define __iwl_fw_img_h__
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#include <linux/types.h>
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#include "api/dbg-tlv.h"
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#include "file.h"
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#include "error-dump.h"
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/**
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* enum iwl_ucode_type
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*
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* The type of ucode.
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*
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* @IWL_UCODE_REGULAR: Normal runtime ucode
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* @IWL_UCODE_INIT: Initial ucode
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* @IWL_UCODE_WOWLAN: Wake on Wireless enabled ucode
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* @IWL_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
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*/
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enum iwl_ucode_type {
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IWL_UCODE_REGULAR,
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IWL_UCODE_INIT,
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IWL_UCODE_WOWLAN,
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IWL_UCODE_REGULAR_USNIFFER,
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IWL_UCODE_TYPE_MAX,
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};
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/*
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* enumeration of ucode section.
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* This enumeration is used directly for older firmware (before 16.0).
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* For new firmware, there can be up to 4 sections (see below) but the
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* first one packaged into the firmware file is the DATA section and
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* some debugging code accesses that.
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*/
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enum iwl_ucode_sec {
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IWL_UCODE_SECTION_DATA,
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IWL_UCODE_SECTION_INST,
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};
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struct iwl_ucode_capabilities {
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u32 max_probe_length;
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u32 n_scan_channels;
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u32 standard_phy_calibration_size;
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u32 flags;
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u32 error_log_addr;
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u32 error_log_size;
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u32 num_stations;
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unsigned long _api[BITS_TO_LONGS(NUM_IWL_UCODE_TLV_API)];
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unsigned long _capa[BITS_TO_LONGS(NUM_IWL_UCODE_TLV_CAPA)];
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const struct iwl_fw_cmd_version *cmd_versions;
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u32 n_cmd_versions;
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};
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static inline bool
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fw_has_api(const struct iwl_ucode_capabilities *capabilities,
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iwl_ucode_tlv_api_t api)
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{
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return test_bit((__force long)api, capabilities->_api);
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}
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static inline bool
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fw_has_capa(const struct iwl_ucode_capabilities *capabilities,
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iwl_ucode_tlv_capa_t capa)
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{
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return test_bit((__force long)capa, capabilities->_capa);
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}
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/* one for each uCode image (inst/data, init/runtime/wowlan) */
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struct fw_desc {
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const void *data; /* vmalloc'ed data */
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u32 len; /* size in bytes */
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u32 offset; /* offset in the device */
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};
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struct fw_img {
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struct fw_desc *sec;
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int num_sec;
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bool is_dual_cpus;
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u32 paging_mem_size;
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};
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/*
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* Block paging calculations
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*/
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#define PAGE_2_EXP_SIZE 12 /* 4K == 2^12 */
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#define FW_PAGING_SIZE BIT(PAGE_2_EXP_SIZE) /* page size is 4KB */
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#define PAGE_PER_GROUP_2_EXP_SIZE 3
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/* 8 pages per group */
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#define NUM_OF_PAGE_PER_GROUP BIT(PAGE_PER_GROUP_2_EXP_SIZE)
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/* don't change, support only 32KB size */
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#define PAGING_BLOCK_SIZE (NUM_OF_PAGE_PER_GROUP * FW_PAGING_SIZE)
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/* 32K == 2^15 */
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#define BLOCK_2_EXP_SIZE (PAGE_2_EXP_SIZE + PAGE_PER_GROUP_2_EXP_SIZE)
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/*
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* Image paging calculations
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*/
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#define BLOCK_PER_IMAGE_2_EXP_SIZE 5
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/* 2^5 == 32 blocks per image */
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#define NUM_OF_BLOCK_PER_IMAGE BIT(BLOCK_PER_IMAGE_2_EXP_SIZE)
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/* maximum image size 1024KB */
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#define MAX_PAGING_IMAGE_SIZE (NUM_OF_BLOCK_PER_IMAGE * PAGING_BLOCK_SIZE)
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/* Virtual address signature */
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#define PAGING_ADDR_SIG 0xAA000000
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#define PAGING_CMD_IS_SECURED BIT(9)
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#define PAGING_CMD_IS_ENABLED BIT(8)
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#define PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS 0
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#define PAGING_TLV_SECURE_MASK 1
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/* FW MSB Mask for regions/cache_control */
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#define FW_ADDR_CACHE_CONTROL 0xC0000000UL
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/**
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* struct iwl_fw_paging
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* @fw_paging_phys: page phy pointer
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* @fw_paging_block: pointer to the allocated block
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* @fw_paging_size: page size
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* @fw_offs: offset in the device
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*/
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struct iwl_fw_paging {
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dma_addr_t fw_paging_phys;
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struct page *fw_paging_block;
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u32 fw_paging_size;
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u32 fw_offs;
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};
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/**
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* enum iwl_fw_type - iwlwifi firmware type
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* @IWL_FW_DVM: DVM firmware
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* @IWL_FW_MVM: MVM firmware
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*/
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enum iwl_fw_type {
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IWL_FW_DVM,
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IWL_FW_MVM,
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};
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/**
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* struct iwl_fw_dbg - debug data
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*
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* @dest_tlv: points to debug destination TLV (typically SRAM or DRAM)
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* @n_dest_reg: num of reg_ops in dest_tlv
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* @conf_tlv: array of pointers to configuration HCMDs
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* @trigger_tlv: array of pointers to triggers TLVs
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* @trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
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* @mem_tlv: Runtime addresses to dump
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* @n_mem_tlv: number of runtime addresses
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* @dump_mask: bitmask of dump regions
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*/
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struct iwl_fw_dbg {
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struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv;
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u8 n_dest_reg;
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struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX];
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struct iwl_fw_dbg_trigger_tlv *trigger_tlv[FW_DBG_TRIGGER_MAX];
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size_t trigger_tlv_len[FW_DBG_TRIGGER_MAX];
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struct iwl_fw_dbg_mem_seg_tlv *mem_tlv;
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size_t n_mem_tlv;
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u32 dump_mask;
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};
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struct iwl_dump_exclude {
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u32 addr, size;
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};
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/**
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* struct iwl_fw - variables associated with the firmware
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*
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* @ucode_ver: ucode version from the ucode file
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* @fw_version: firmware version string
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* @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
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* @iml_len: length of the image loader image
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* @iml: image loader fw image
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* @ucode_capa: capabilities parsed from the ucode file.
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* @enhance_sensitivity_table: device can do enhanced sensitivity.
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* @init_evtlog_ptr: event log offset for init ucode.
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* @init_evtlog_size: event log size for init ucode.
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* @init_errlog_ptr: error log offfset for init ucode.
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* @inst_evtlog_ptr: event log offset for runtime ucode.
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* @inst_evtlog_size: event log size for runtime ucode.
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* @inst_errlog_ptr: error log offfset for runtime ucode.
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* @type: firmware type (&enum iwl_fw_type)
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* @human_readable: human readable version
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* we get the ALIVE from the uCode
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* @phy_integration_ver: PHY integration version string
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* @phy_integration_ver_len: length of @phy_integration_ver
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* @dump_excl: image dump exclusion areas for RT image
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* @dump_excl_wowlan: image dump exclusion areas for WoWLAN image
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*/
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struct iwl_fw {
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u32 ucode_ver;
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char fw_version[64];
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/* ucode images */
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struct fw_img img[IWL_UCODE_TYPE_MAX];
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size_t iml_len;
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u8 *iml;
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struct iwl_ucode_capabilities ucode_capa;
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bool enhance_sensitivity_table;
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u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
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u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
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struct iwl_tlv_calib_ctrl default_calib[IWL_UCODE_TYPE_MAX];
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u32 phy_config;
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u8 valid_tx_ant;
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u8 valid_rx_ant;
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enum iwl_fw_type type;
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u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
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struct iwl_fw_dbg dbg;
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u8 *phy_integration_ver;
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u32 phy_integration_ver_len;
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struct iwl_dump_exclude dump_excl[2], dump_excl_wowlan[2];
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};
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static inline const char *get_fw_dbg_mode_string(int mode)
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{
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switch (mode) {
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case SMEM_MODE:
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return "SMEM";
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case EXTERNAL_MODE:
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return "EXTERNAL_DRAM";
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case MARBH_MODE:
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return "MARBH";
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case MIPI_MODE:
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return "MIPI";
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default:
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return "UNKNOWN";
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}
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}
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static inline bool
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iwl_fw_dbg_conf_usniffer(const struct iwl_fw *fw, u8 id)
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{
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const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg.conf_tlv[id];
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if (!conf_tlv)
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return false;
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return conf_tlv->usniffer;
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}
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static inline const struct fw_img *
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iwl_get_ucode_image(const struct iwl_fw *fw, enum iwl_ucode_type ucode_type)
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{
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if (ucode_type >= IWL_UCODE_TYPE_MAX)
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return NULL;
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return &fw->img[ucode_type];
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}
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u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u32 cmd_id, u8 def);
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u8 iwl_fw_lookup_notif_ver(const struct iwl_fw *fw, u8 grp, u8 cmd, u8 def);
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const char *iwl_fw_lookup_assert_desc(u32 num);
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#define FW_SYSASSERT_CPU_MASK 0xf0000000
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#define FW_SYSASSERT_PNVM_MISSING 0x0010070d
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#endif /* __iwl_fw_img_h__ */
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