393 lines
8.9 KiB
C
393 lines
8.9 KiB
C
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/* SPDX-License-Identifier: ISC */
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/* Copyright (C) 2020 MediaTek Inc. */
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#ifndef __MT76_CONNAC_H
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#define __MT76_CONNAC_H
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#include "mt76.h"
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#define MT76_CONNAC_SCAN_IE_LEN 600
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#define MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL 10
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#define MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL U16_MAX
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#define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10
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#define MT76_CONNAC_MAX_SCAN_MATCH 16
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#define MT76_CONNAC_MAX_WMM_SETS 4
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#define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20)
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#define MT76_CONNAC_COREDUMP_SZ (1300 * 1024)
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#define MT_TXD_SIZE (8 * 4)
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#define MT_USB_TXD_SIZE (MT_TXD_SIZE + 8 * 4)
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#define MT_USB_HDR_SIZE 4
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#define MT_USB_TAIL_SIZE 4
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#define MT_SDIO_TXD_SIZE (MT_TXD_SIZE + 8 * 4)
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#define MT_SDIO_TAIL_SIZE 8
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#define MT_SDIO_HDR_SIZE 4
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#define MT_MSDU_ID_VALID BIT(15)
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#define MT_TXD_LEN_LAST BIT(15)
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#define MT_TXD_LEN_MASK GENMASK(11, 0)
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#define MT_TXD_LEN_MSDU_LAST BIT(14)
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#define MT_TXD_LEN_AMSDU_LAST BIT(15)
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enum {
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CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20,
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CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40,
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CMD_CBW_80MHZ = IEEE80211_STA_RX_BW_80,
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CMD_CBW_160MHZ = IEEE80211_STA_RX_BW_160,
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CMD_CBW_10MHZ,
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CMD_CBW_5MHZ,
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CMD_CBW_8080MHZ,
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CMD_CBW_320MHZ,
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CMD_HE_MCS_BW80 = 0,
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CMD_HE_MCS_BW160,
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CMD_HE_MCS_BW8080,
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CMD_HE_MCS_BW_NUM
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};
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enum {
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HW_BSSID_0 = 0x0,
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HW_BSSID_1,
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HW_BSSID_2,
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HW_BSSID_3,
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HW_BSSID_MAX = HW_BSSID_3,
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EXT_BSSID_START = 0x10,
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EXT_BSSID_1,
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EXT_BSSID_15 = 0x1f,
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EXT_BSSID_MAX = EXT_BSSID_15,
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REPEATER_BSSID_START = 0x20,
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REPEATER_BSSID_MAX = 0x3f,
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};
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struct mt76_connac_reg_map {
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u32 phys;
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u32 maps;
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u32 size;
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};
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struct mt76_connac_pm {
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bool enable:1;
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bool enable_user:1;
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bool ds_enable:1;
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bool ds_enable_user:1;
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bool suspended:1;
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spinlock_t txq_lock;
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struct {
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struct mt76_wcid *wcid;
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struct sk_buff *skb;
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} tx_q[IEEE80211_NUM_ACS];
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struct work_struct wake_work;
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wait_queue_head_t wait;
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struct {
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spinlock_t lock;
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u32 count;
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} wake;
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struct mutex mutex;
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struct delayed_work ps_work;
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unsigned long last_activity;
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unsigned long idle_timeout;
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struct {
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unsigned long last_wake_event;
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unsigned long awake_time;
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unsigned long last_doze_event;
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unsigned long doze_time;
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unsigned int lp_wake;
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} stats;
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};
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struct mt76_connac_coredump {
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struct sk_buff_head msg_list;
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struct delayed_work work;
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unsigned long last_activity;
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};
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struct mt76_connac_sta_key_conf {
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s8 keyidx;
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u8 key[16];
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};
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#define MT_TXP_MAX_BUF_NUM 6
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struct mt76_connac_fw_txp {
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__le16 flags;
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__le16 token;
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u8 bss_idx;
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__le16 rept_wds_wcid;
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u8 nbuf;
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__le32 buf[MT_TXP_MAX_BUF_NUM];
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__le16 len[MT_TXP_MAX_BUF_NUM];
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} __packed __aligned(4);
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#define MT_HW_TXP_MAX_MSDU_NUM 4
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#define MT_HW_TXP_MAX_BUF_NUM 4
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struct mt76_connac_txp_ptr {
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__le32 buf0;
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__le16 len0;
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__le16 len1;
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__le32 buf1;
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} __packed __aligned(4);
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struct mt76_connac_hw_txp {
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__le16 msdu_id[MT_HW_TXP_MAX_MSDU_NUM];
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struct mt76_connac_txp_ptr ptr[MT_HW_TXP_MAX_BUF_NUM / 2];
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} __packed __aligned(4);
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struct mt76_connac_txp_common {
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union {
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struct mt76_connac_fw_txp fw;
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struct mt76_connac_hw_txp hw;
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};
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};
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struct mt76_connac_tx_free {
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__le16 rx_byte_cnt;
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__le16 ctrl;
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__le32 txd;
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} __packed __aligned(4);
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extern const struct wiphy_wowlan_support mt76_connac_wowlan_support;
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static inline bool is_mt7922(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7922;
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}
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static inline bool is_mt7921(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7961 || is_mt7922(dev);
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}
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static inline bool is_mt7663(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7663;
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}
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static inline bool is_mt7915(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7915;
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}
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static inline bool is_mt7916(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7906;
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}
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static inline bool is_mt7986(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7986;
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}
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static inline bool is_mt7996(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7990;
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}
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static inline bool is_mt7622(struct mt76_dev *dev)
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{
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if (!IS_ENABLED(CONFIG_MT7622_WMAC))
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return false;
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return mt76_chip(dev) == 0x7622;
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}
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static inline bool is_mt7615(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
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}
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static inline bool is_mt7611(struct mt76_dev *dev)
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{
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return mt76_chip(dev) == 0x7611;
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}
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static inline bool is_connac_v1(struct mt76_dev *dev)
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{
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return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev);
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}
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static inline bool is_mt76_fw_txp(struct mt76_dev *dev)
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{
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switch (mt76_chip(dev)) {
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case 0x7961:
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case 0x7922:
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case 0x7663:
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case 0x7622:
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return false;
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default:
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return true;
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}
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}
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static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef)
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{
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static const u8 width_to_bw[] = {
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[NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ,
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[NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ,
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[NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ,
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[NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ,
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[NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ,
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[NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ,
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[NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ,
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[NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ,
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[NL80211_CHAN_WIDTH_320] = CMD_CBW_320MHZ,
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};
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if (chandef->width >= ARRAY_SIZE(width_to_bw))
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return 0;
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return width_to_bw[chandef->width];
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}
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static inline u8 mt76_connac_lmac_mapping(u8 ac)
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{
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/* LMAC uses the reverse order of mac80211 AC indexes */
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return 3 - ac;
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}
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static inline void *
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mt76_connac_txwi_to_txp(struct mt76_dev *dev, struct mt76_txwi_cache *t)
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{
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u8 *txwi;
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if (!t)
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return NULL;
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txwi = mt76_get_txwi_ptr(dev, t);
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return (void *)(txwi + MT_TXD_SIZE);
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}
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static inline u8 mt76_connac_spe_idx(u8 antenna_mask)
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{
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static const u8 ant_to_spe[] = {0, 0, 1, 0, 3, 2, 4, 0,
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9, 8, 6, 10, 16, 12, 18, 0};
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if (antenna_mask >= sizeof(ant_to_spe))
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return 0;
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return ant_to_spe[antenna_mask];
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}
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int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm);
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void mt76_connac_power_save_sched(struct mt76_phy *phy,
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struct mt76_connac_pm *pm);
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void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,
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struct mt76_wcid *wcid);
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static inline void mt76_connac_tx_cleanup(struct mt76_dev *dev)
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{
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dev->queue_ops->tx_cleanup(dev, dev->q_mcu[MT_MCUQ_WM], false);
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dev->queue_ops->tx_cleanup(dev, dev->q_mcu[MT_MCUQ_WA], false);
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}
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static inline bool
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mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm)
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{
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bool ret = false;
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spin_lock_bh(&pm->wake.lock);
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if (test_bit(MT76_STATE_PM, &phy->state))
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goto out;
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pm->wake.count++;
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ret = true;
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out:
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spin_unlock_bh(&pm->wake.lock);
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return ret;
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}
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static inline void
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mt76_connac_pm_unref(struct mt76_phy *phy, struct mt76_connac_pm *pm)
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{
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spin_lock_bh(&pm->wake.lock);
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pm->last_activity = jiffies;
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if (--pm->wake.count == 0 &&
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test_bit(MT76_STATE_MCU_RUNNING, &phy->state))
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mt76_connac_power_save_sched(phy, pm);
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spin_unlock_bh(&pm->wake.lock);
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}
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static inline bool
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mt76_connac_skip_fw_pmctrl(struct mt76_phy *phy, struct mt76_connac_pm *pm)
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{
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struct mt76_dev *dev = phy->dev;
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bool ret;
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if (dev->token_count)
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return true;
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spin_lock_bh(&pm->wake.lock);
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ret = pm->wake.count || test_and_set_bit(MT76_STATE_PM, &phy->state);
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spin_unlock_bh(&pm->wake.lock);
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return ret;
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}
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static inline void
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mt76_connac_mutex_acquire(struct mt76_dev *dev, struct mt76_connac_pm *pm)
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__acquires(&dev->mutex)
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{
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mutex_lock(&dev->mutex);
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mt76_connac_pm_wake(&dev->phy, pm);
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}
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static inline void
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mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm)
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__releases(&dev->mutex)
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{
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mt76_connac_power_save_sched(&dev->phy, pm);
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mutex_unlock(&dev->mutex);
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}
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int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc,
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int ring_base, u32 flags);
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void mt76_connac_write_hw_txp(struct mt76_dev *dev,
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struct mt76_tx_info *tx_info,
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void *txp_ptr, u32 id);
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void mt76_connac_txp_skb_unmap(struct mt76_dev *dev,
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struct mt76_txwi_cache *txwi);
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void mt76_connac_tx_complete_skb(struct mt76_dev *mdev,
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struct mt76_queue_entry *e);
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void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,
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struct mt76_connac_pm *pm,
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struct mt76_wcid *wcid,
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struct sk_buff *skb);
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void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,
|
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struct mt76_connac_pm *pm);
|
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void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
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struct sk_buff *skb, struct mt76_wcid *wcid,
|
||
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struct ieee80211_key_conf *key, int pid,
|
||
|
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enum mt76_txq_id qid, u32 changed);
|
||
|
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u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy,
|
||
|
|
struct ieee80211_vif *vif,
|
||
|
|
bool beacon, bool mcast);
|
||
|
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bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid,
|
||
|
|
__le32 *txs_data);
|
||
|
|
bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid,
|
||
|
|
int pid, __le32 *txs_data);
|
||
|
|
void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev,
|
||
|
|
struct sk_buff *skb,
|
||
|
|
__le32 *rxv, u32 mode);
|
||
|
|
int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif,
|
||
|
|
struct sk_buff *skb, u16 hdr_offset);
|
||
|
|
int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev,
|
||
|
|
struct mt76_rx_status *status,
|
||
|
|
struct ieee80211_supported_band *sband,
|
||
|
|
__le32 *rxv, u8 *mode);
|
||
|
|
|
||
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#endif /* __MT76_CONNAC_H */
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