501 lines
12 KiB
C
501 lines
12 KiB
C
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// SPDX-License-Identifier: ISC
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <asm/unaligned.h>
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#include "mt76x2.h"
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#include "eeprom.h"
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#define EE_FIELD(_name, _value) [MT_EE_##_name] = (_value) | 1
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static int
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mt76x2_eeprom_get_macaddr(struct mt76x02_dev *dev)
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{
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void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR;
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memcpy(dev->mphy.macaddr, src, ETH_ALEN);
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return 0;
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}
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static bool
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mt76x2_has_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
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{
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u16 *efuse_w = (u16 *)efuse;
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if (efuse_w[MT_EE_NIC_CONF_0] != 0)
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return false;
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if (efuse_w[MT_EE_XTAL_TRIM_1] == 0xffff)
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return false;
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if (efuse_w[MT_EE_TX_POWER_DELTA_BW40] != 0)
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return false;
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if (efuse_w[MT_EE_TX_POWER_0_START_2G] == 0xffff)
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return false;
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if (efuse_w[MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA] != 0)
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return false;
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if (efuse_w[MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE] == 0xffff)
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return false;
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return true;
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}
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static void
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mt76x2_apply_cal_free_data(struct mt76x02_dev *dev, u8 *efuse)
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{
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#define GROUP_5G(_id) \
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MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
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MT_EE_TX_POWER_0_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1, \
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MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id), \
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MT_EE_TX_POWER_1_START_5G + MT_TX_POWER_GROUP_SIZE_5G * (_id) + 1
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static const u8 cal_free_bytes[] = {
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MT_EE_XTAL_TRIM_1,
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MT_EE_TX_POWER_EXT_PA_5G + 1,
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MT_EE_TX_POWER_0_START_2G,
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MT_EE_TX_POWER_0_START_2G + 1,
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MT_EE_TX_POWER_1_START_2G,
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MT_EE_TX_POWER_1_START_2G + 1,
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GROUP_5G(0),
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GROUP_5G(1),
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GROUP_5G(2),
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GROUP_5G(3),
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GROUP_5G(4),
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GROUP_5G(5),
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MT_EE_RF_2G_TSSI_OFF_TXPOWER,
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MT_EE_RF_2G_RX_HIGH_GAIN + 1,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN + 1,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN + 1,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN + 1,
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};
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struct device_node *np = dev->mt76.dev->of_node;
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u8 *eeprom = dev->mt76.eeprom.data;
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u8 prev_grp0[4] = {
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eeprom[MT_EE_TX_POWER_0_START_5G],
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eeprom[MT_EE_TX_POWER_0_START_5G + 1],
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eeprom[MT_EE_TX_POWER_1_START_5G],
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eeprom[MT_EE_TX_POWER_1_START_5G + 1]
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};
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u16 val;
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int i;
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if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp"))
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return;
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if (!mt76x2_has_cal_free_data(dev, efuse))
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return;
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for (i = 0; i < ARRAY_SIZE(cal_free_bytes); i++) {
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int offset = cal_free_bytes[i];
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eeprom[offset] = efuse[offset];
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}
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if (!(efuse[MT_EE_TX_POWER_0_START_5G] |
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efuse[MT_EE_TX_POWER_0_START_5G + 1]))
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memcpy(eeprom + MT_EE_TX_POWER_0_START_5G, prev_grp0, 2);
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if (!(efuse[MT_EE_TX_POWER_1_START_5G] |
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efuse[MT_EE_TX_POWER_1_START_5G + 1]))
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memcpy(eeprom + MT_EE_TX_POWER_1_START_5G, prev_grp0 + 2, 2);
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val = get_unaligned_le16(efuse + MT_EE_BT_RCAL_RESULT);
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if (val != 0xffff)
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eeprom[MT_EE_BT_RCAL_RESULT] = val & 0xff;
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val = get_unaligned_le16(efuse + MT_EE_BT_VCDL_CALIBRATION);
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if (val != 0xffff)
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eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8;
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val = get_unaligned_le16(efuse + MT_EE_BT_PMUCFG);
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if (val != 0xffff)
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eeprom[MT_EE_BT_PMUCFG] = val & 0xff;
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}
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static int mt76x2_check_eeprom(struct mt76x02_dev *dev)
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{
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u16 val = get_unaligned_le16(dev->mt76.eeprom.data);
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if (!val)
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val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID);
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switch (val) {
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case 0x7662:
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case 0x7612:
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return 0;
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default:
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dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val);
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return -EINVAL;
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}
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}
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static int
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mt76x2_eeprom_load(struct mt76x02_dev *dev)
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{
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void *efuse;
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bool found;
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int ret;
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ret = mt76_eeprom_init(&dev->mt76, MT7662_EEPROM_SIZE);
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if (ret < 0)
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return ret;
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found = ret;
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if (found)
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found = !mt76x2_check_eeprom(dev);
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dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, MT7662_EEPROM_SIZE,
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GFP_KERNEL);
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dev->mt76.otp.size = MT7662_EEPROM_SIZE;
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if (!dev->mt76.otp.data)
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return -ENOMEM;
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efuse = dev->mt76.otp.data;
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if (mt76x02_get_efuse_data(dev, 0, efuse, MT7662_EEPROM_SIZE,
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MT_EE_READ))
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goto out;
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if (found) {
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mt76x2_apply_cal_free_data(dev, efuse);
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} else {
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/* FIXME: check if efuse data is complete */
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found = true;
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memcpy(dev->mt76.eeprom.data, efuse, MT7662_EEPROM_SIZE);
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}
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out:
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if (!found)
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return -ENOENT;
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return 0;
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}
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static void
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mt76x2_set_rx_gain_group(struct mt76x02_dev *dev, u8 val)
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{
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s8 *dest = dev->cal.rx.high_gain;
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if (!mt76x02_field_valid(val)) {
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dest[0] = 0;
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dest[1] = 0;
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return;
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}
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dest[0] = mt76x02_sign_extend(val, 4);
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dest[1] = mt76x02_sign_extend(val >> 4, 4);
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}
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static void
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mt76x2_set_rssi_offset(struct mt76x02_dev *dev, int chain, u8 val)
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{
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s8 *dest = dev->cal.rx.rssi_offset;
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if (!mt76x02_field_valid(val)) {
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dest[chain] = 0;
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return;
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}
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dest[chain] = mt76x02_sign_extend_optional(val, 7);
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}
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static enum mt76x2_cal_channel_group
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mt76x2_get_cal_channel_group(int channel)
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{
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if (channel >= 184 && channel <= 196)
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return MT_CH_5G_JAPAN;
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if (channel <= 48)
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return MT_CH_5G_UNII_1;
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if (channel <= 64)
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return MT_CH_5G_UNII_2;
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if (channel <= 114)
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return MT_CH_5G_UNII_2E_1;
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if (channel <= 144)
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return MT_CH_5G_UNII_2E_2;
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return MT_CH_5G_UNII_3;
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}
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static u8
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mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel)
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{
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enum mt76x2_cal_channel_group group;
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group = mt76x2_get_cal_channel_group(channel);
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switch (group) {
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case MT_CH_5G_JAPAN:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN);
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case MT_CH_5G_UNII_1:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN) >> 8;
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case MT_CH_5G_UNII_2:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN);
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case MT_CH_5G_UNII_2E_1:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN) >> 8;
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case MT_CH_5G_UNII_2E_2:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN);
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default:
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return mt76x02_eeprom_get(dev,
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MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN) >> 8;
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}
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}
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void mt76x2_read_rx_gain(struct mt76x02_dev *dev)
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{
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struct ieee80211_channel *chan = dev->mphy.chandef.chan;
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int channel = chan->hw_value;
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s8 lna_5g[3], lna_2g;
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u8 lna;
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u16 val;
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if (chan->band == NL80211_BAND_2GHZ)
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val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN) >> 8;
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else
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val = mt76x2_get_5g_rx_gain(dev, channel);
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mt76x2_set_rx_gain_group(dev, val);
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mt76x02_get_rx_gain(dev, chan->band, &val, &lna_2g, lna_5g);
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mt76x2_set_rssi_offset(dev, 0, val);
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mt76x2_set_rssi_offset(dev, 1, val >> 8);
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dev->cal.rx.mcu_gain = (lna_2g & 0xff);
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dev->cal.rx.mcu_gain |= (lna_5g[0] & 0xff) << 8;
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dev->cal.rx.mcu_gain |= (lna_5g[1] & 0xff) << 16;
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dev->cal.rx.mcu_gain |= (lna_5g[2] & 0xff) << 24;
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lna = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);
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dev->cal.rx.lna_gain = mt76x02_sign_extend(lna, 8);
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}
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EXPORT_SYMBOL_GPL(mt76x2_read_rx_gain);
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void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76x02_rate_power *t,
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struct ieee80211_channel *chan)
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{
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bool is_5ghz;
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u16 val;
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is_5ghz = chan->band == NL80211_BAND_5GHZ;
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memset(t, 0, sizeof(*t));
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_CCK);
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t->cck[0] = t->cck[1] = mt76x02_rate_power_val(val);
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t->cck[2] = t->cck[3] = mt76x02_rate_power_val(val >> 8);
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if (is_5ghz)
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_6M);
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else
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_6M);
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t->ofdm[0] = t->ofdm[1] = mt76x02_rate_power_val(val);
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t->ofdm[2] = t->ofdm[3] = mt76x02_rate_power_val(val >> 8);
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if (is_5ghz)
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_5G_24M);
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else
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_OFDM_2G_24M);
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t->ofdm[4] = t->ofdm[5] = mt76x02_rate_power_val(val);
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t->ofdm[6] = t->ofdm[7] = mt76x02_rate_power_val(val >> 8);
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS0);
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t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val);
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t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8);
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS4);
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t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val);
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t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8);
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS8);
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t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val);
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t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8);
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val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_HT_MCS12);
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||
|
|
t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val);
|
||
|
|
t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8);
|
||
|
|
|
||
|
|
val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_VHT_MCS8);
|
||
|
|
if (!is_5ghz)
|
||
|
|
val >>= 8;
|
||
|
|
t->vht[0] = t->vht[1] = mt76x02_rate_power_val(val >> 8);
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
|
||
|
|
|
||
|
|
static void
|
||
|
|
mt76x2_get_power_info_2g(struct mt76x02_dev *dev,
|
||
|
|
struct mt76x2_tx_power_info *t,
|
||
|
|
struct ieee80211_channel *chan,
|
||
|
|
int chain, int offset)
|
||
|
|
{
|
||
|
|
int channel = chan->hw_value;
|
||
|
|
int delta_idx;
|
||
|
|
u8 data[6];
|
||
|
|
u16 val;
|
||
|
|
|
||
|
|
if (channel < 6)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 11)
|
||
|
|
delta_idx = 4;
|
||
|
|
else
|
||
|
|
delta_idx = 5;
|
||
|
|
|
||
|
|
mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
|
||
|
|
|
||
|
|
t->chain[chain].tssi_slope = data[0];
|
||
|
|
t->chain[chain].tssi_offset = data[1];
|
||
|
|
t->chain[chain].target_power = data[2];
|
||
|
|
t->chain[chain].delta =
|
||
|
|
mt76x02_sign_extend_optional(data[delta_idx], 7);
|
||
|
|
|
||
|
|
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_TSSI_OFF_TXPOWER);
|
||
|
|
t->target_power = val >> 8;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void
|
||
|
|
mt76x2_get_power_info_5g(struct mt76x02_dev *dev,
|
||
|
|
struct mt76x2_tx_power_info *t,
|
||
|
|
struct ieee80211_channel *chan,
|
||
|
|
int chain, int offset)
|
||
|
|
{
|
||
|
|
int channel = chan->hw_value;
|
||
|
|
enum mt76x2_cal_channel_group group;
|
||
|
|
int delta_idx;
|
||
|
|
u16 val;
|
||
|
|
u8 data[5];
|
||
|
|
|
||
|
|
group = mt76x2_get_cal_channel_group(channel);
|
||
|
|
offset += group * MT_TX_POWER_GROUP_SIZE_5G;
|
||
|
|
|
||
|
|
if (channel >= 192)
|
||
|
|
delta_idx = 4;
|
||
|
|
else if (channel >= 184)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 44)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 52)
|
||
|
|
delta_idx = 4;
|
||
|
|
else if (channel < 58)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 98)
|
||
|
|
delta_idx = 4;
|
||
|
|
else if (channel < 106)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 116)
|
||
|
|
delta_idx = 4;
|
||
|
|
else if (channel < 130)
|
||
|
|
delta_idx = 3;
|
||
|
|
else if (channel < 149)
|
||
|
|
delta_idx = 4;
|
||
|
|
else if (channel < 157)
|
||
|
|
delta_idx = 3;
|
||
|
|
else
|
||
|
|
delta_idx = 4;
|
||
|
|
|
||
|
|
mt76x02_eeprom_copy(dev, offset, data, sizeof(data));
|
||
|
|
|
||
|
|
t->chain[chain].tssi_slope = data[0];
|
||
|
|
t->chain[chain].tssi_offset = data[1];
|
||
|
|
t->chain[chain].target_power = data[2];
|
||
|
|
t->chain[chain].delta =
|
||
|
|
mt76x02_sign_extend_optional(data[delta_idx], 7);
|
||
|
|
|
||
|
|
val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN);
|
||
|
|
t->target_power = val & 0xff;
|
||
|
|
}
|
||
|
|
|
||
|
|
void mt76x2_get_power_info(struct mt76x02_dev *dev,
|
||
|
|
struct mt76x2_tx_power_info *t,
|
||
|
|
struct ieee80211_channel *chan)
|
||
|
|
{
|
||
|
|
u16 bw40, bw80;
|
||
|
|
|
||
|
|
memset(t, 0, sizeof(*t));
|
||
|
|
|
||
|
|
bw40 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW40);
|
||
|
|
bw80 = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_DELTA_BW80);
|
||
|
|
|
||
|
|
if (chan->band == NL80211_BAND_5GHZ) {
|
||
|
|
bw40 >>= 8;
|
||
|
|
mt76x2_get_power_info_5g(dev, t, chan, 0,
|
||
|
|
MT_EE_TX_POWER_0_START_5G);
|
||
|
|
mt76x2_get_power_info_5g(dev, t, chan, 1,
|
||
|
|
MT_EE_TX_POWER_1_START_5G);
|
||
|
|
} else {
|
||
|
|
mt76x2_get_power_info_2g(dev, t, chan, 0,
|
||
|
|
MT_EE_TX_POWER_0_START_2G);
|
||
|
|
mt76x2_get_power_info_2g(dev, t, chan, 1,
|
||
|
|
MT_EE_TX_POWER_1_START_2G);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (mt76x2_tssi_enabled(dev) ||
|
||
|
|
!mt76x02_field_valid(t->target_power))
|
||
|
|
t->target_power = t->chain[0].target_power;
|
||
|
|
|
||
|
|
t->delta_bw40 = mt76x02_rate_power_val(bw40);
|
||
|
|
t->delta_bw80 = mt76x02_rate_power_val(bw80);
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mt76x2_get_power_info);
|
||
|
|
|
||
|
|
int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t)
|
||
|
|
{
|
||
|
|
enum nl80211_band band = dev->mphy.chandef.chan->band;
|
||
|
|
u16 val, slope;
|
||
|
|
u8 bounds;
|
||
|
|
|
||
|
|
memset(t, 0, sizeof(*t));
|
||
|
|
|
||
|
|
if (!mt76x2_temp_tx_alc_enabled(dev))
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
if (!mt76x02_ext_pa_enabled(dev, band))
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G) >> 8;
|
||
|
|
t->temp_25_ref = val & 0x7f;
|
||
|
|
if (band == NL80211_BAND_5GHZ) {
|
||
|
|
slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_5G);
|
||
|
|
bounds = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G);
|
||
|
|
} else {
|
||
|
|
slope = mt76x02_eeprom_get(dev, MT_EE_RF_TEMP_COMP_SLOPE_2G);
|
||
|
|
bounds = mt76x02_eeprom_get(dev,
|
||
|
|
MT_EE_TX_POWER_DELTA_BW80) >> 8;
|
||
|
|
}
|
||
|
|
|
||
|
|
t->high_slope = slope & 0xff;
|
||
|
|
t->low_slope = slope >> 8;
|
||
|
|
t->lower_bound = 0 - (bounds & 0xf);
|
||
|
|
t->upper_bound = (bounds >> 4) & 0xf;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mt76x2_get_temp_comp);
|
||
|
|
|
||
|
|
int mt76x2_eeprom_init(struct mt76x02_dev *dev)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ret = mt76x2_eeprom_load(dev);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
mt76x02_eeprom_parse_hw_cap(dev);
|
||
|
|
mt76x2_eeprom_get_macaddr(dev);
|
||
|
|
mt76_eeprom_override(&dev->mphy);
|
||
|
|
dev->mphy.macaddr[0] &= ~BIT(1);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
|
||
|
|
|
||
|
|
MODULE_LICENSE("Dual BSD/GPL");
|