69 lines
2.8 KiB
C
69 lines
2.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2017, The Linux Foundation. All rights reserved.
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*/
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#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V3_H_
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#define QCOM_PHY_QMP_QSERDES_TXRX_V3_H_
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/* Only for QMP V3 PHY - TX registers */
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#define QSERDES_V3_TX_BIST_MODE_LANENO 0x000
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#define QSERDES_V3_TX_CLKBUF_ENABLE 0x008
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#define QSERDES_V3_TX_TX_EMP_POST1_LVL 0x00c
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#define QSERDES_V3_TX_TX_DRV_LVL 0x01c
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#define QSERDES_V3_TX_RESET_TSYNC_EN 0x024
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#define QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN 0x028
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#define QSERDES_V3_TX_TX_BAND 0x02c
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#define QSERDES_V3_TX_SLEW_CNTL 0x030
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#define QSERDES_V3_TX_INTERFACE_SELECT 0x034
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#define QSERDES_V3_TX_RES_CODE_LANE_TX 0x03c
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#define QSERDES_V3_TX_RES_CODE_LANE_RX 0x040
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#define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX 0x044
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#define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_RX 0x048
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#define QSERDES_V3_TX_DEBUG_BUS_SEL 0x058
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#define QSERDES_V3_TX_TRANSCEIVER_BIAS_EN 0x05c
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#define QSERDES_V3_TX_HIGHZ_DRVR_EN 0x060
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#define QSERDES_V3_TX_TX_POL_INV 0x064
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#define QSERDES_V3_TX_PARRATE_REC_DETECT_IDLE_EN 0x068
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#define QSERDES_V3_TX_LANE_MODE_1 0x08c
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#define QSERDES_V3_TX_LANE_MODE_2 0x090
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#define QSERDES_V3_TX_LANE_MODE_3 0x094
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#define QSERDES_V3_TX_RCV_DETECT_LVL_2 0x0a4
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#define QSERDES_V3_TX_TRAN_DRVR_EMP_EN 0x0c0
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#define QSERDES_V3_TX_TX_INTERFACE_MODE 0x0c4
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#define QSERDES_V3_TX_VMODE_CTRL1 0x0f0
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/* Only for QMP V3 PHY - RX registers */
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#define QSERDES_V3_RX_UCDR_FO_GAIN 0x008
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#define QSERDES_V3_RX_UCDR_SO_GAIN_HALF 0x00c
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#define QSERDES_V3_RX_UCDR_SO_GAIN 0x014
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#define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF 0x024
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#define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_QUARTER 0x028
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#define QSERDES_V3_RX_UCDR_SVS_SO_GAIN 0x02c
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#define QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN 0x030
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#define QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034
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#define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c
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#define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040
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#define QSERDES_V3_RX_UCDR_PI_CONTROLS 0x044
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#define QSERDES_V3_RX_RX_TERM_BW 0x07c
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#define QSERDES_V3_RX_VGA_CAL_CNTRL1 0x0bc
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#define QSERDES_V3_RX_VGA_CAL_CNTRL2 0x0c0
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#define QSERDES_V3_RX_RX_EQ_GAIN2_LSB 0x0c8
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#define QSERDES_V3_RX_RX_EQ_GAIN2_MSB 0x0cc
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#define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL1 0x0d0
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#define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2 0x0d4
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#define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3 0x0d8
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#define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4 0x0dc
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#define QSERDES_V3_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x0f8
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#define QSERDES_V3_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x0fc
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#define QSERDES_V3_RX_SIGDET_ENABLES 0x100
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#define QSERDES_V3_RX_SIGDET_CNTRL 0x104
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#define QSERDES_V3_RX_SIGDET_LVL 0x108
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#define QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL 0x10c
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#define QSERDES_V3_RX_RX_BAND 0x110
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#define QSERDES_V3_RX_RX_INTERFACE_MODE 0x11c
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#define QSERDES_V3_RX_RX_MODE_00 0x164
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#define QSERDES_V3_RX_RX_MODE_01 0x168
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#endif
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