336 lines
8.1 KiB
C
336 lines
8.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for the Intel P-Unit Mailbox IPC mechanism
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*
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* (C) Copyright 2015 Intel Corporation
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*
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* The heart of the P-Unit is the Foxton microcontroller and its firmware,
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* which provide mailbox interface for power management usage.
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*/
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/intel_punit_ipc.h>
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/* IPC Mailbox registers */
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#define OFFSET_DATA_LOW 0x0
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#define OFFSET_DATA_HIGH 0x4
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/* bit field of interface register */
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#define CMD_RUN BIT(31)
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#define CMD_ERRCODE_MASK GENMASK(7, 0)
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#define CMD_PARA1_SHIFT 8
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#define CMD_PARA2_SHIFT 16
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#define CMD_TIMEOUT_SECONDS 1
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enum {
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BASE_DATA = 0,
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BASE_IFACE,
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BASE_MAX,
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};
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typedef struct {
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struct device *dev;
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struct mutex lock;
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int irq;
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struct completion cmd_complete;
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/* base of interface and data registers */
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void __iomem *base[RESERVED_IPC][BASE_MAX];
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IPC_TYPE type;
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} IPC_DEV;
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static IPC_DEV *punit_ipcdev;
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static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
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{
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return readl(ipcdev->base[type][BASE_IFACE]);
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}
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static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
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{
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writel(cmd, ipcdev->base[type][BASE_IFACE]);
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}
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static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
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{
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return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
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}
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static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
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{
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return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
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}
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static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
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{
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writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
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}
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static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
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{
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writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
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}
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static const char *ipc_err_string(int error)
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{
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if (error == IPC_PUNIT_ERR_SUCCESS)
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return "no error";
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else if (error == IPC_PUNIT_ERR_INVALID_CMD)
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return "invalid command";
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else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
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return "invalid parameter";
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else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
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return "command timeout";
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else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
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return "command locked";
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else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
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return "invalid vr id";
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else if (error == IPC_PUNIT_ERR_VR_ERR)
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return "vr error";
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else
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return "unknown error";
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}
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static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
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{
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int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
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int errcode;
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int status;
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if (ipcdev->irq) {
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if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
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CMD_TIMEOUT_SECONDS * HZ)) {
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dev_err(ipcdev->dev, "IPC timed out\n");
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return -ETIMEDOUT;
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}
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} else {
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while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
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udelay(1);
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if (!loops) {
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dev_err(ipcdev->dev, "IPC timed out\n");
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return -ETIMEDOUT;
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}
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}
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status = ipc_read_status(ipcdev, type);
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errcode = status & CMD_ERRCODE_MASK;
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if (errcode) {
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dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
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ipc_err_string(errcode), status);
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return -EIO;
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}
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return 0;
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}
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/**
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* intel_punit_ipc_simple_command() - Simple IPC command
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* @cmd: IPC command code.
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* @para1: First 8bit parameter, set 0 if not used.
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* @para2: Second 8bit parameter, set 0 if not used.
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*
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* Send a IPC command to P-Unit when there is no data transaction
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*
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* Return: IPC error code or 0 on success.
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*/
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int intel_punit_ipc_simple_command(int cmd, int para1, int para2)
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{
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IPC_DEV *ipcdev = punit_ipcdev;
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IPC_TYPE type;
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u32 val;
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int ret;
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mutex_lock(&ipcdev->lock);
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reinit_completion(&ipcdev->cmd_complete);
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type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
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val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
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val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
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ipc_write_cmd(ipcdev, type, val);
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ret = intel_punit_ipc_check_status(ipcdev, type);
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mutex_unlock(&ipcdev->lock);
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return ret;
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}
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EXPORT_SYMBOL(intel_punit_ipc_simple_command);
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/**
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* intel_punit_ipc_command() - IPC command with data and pointers
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* @cmd: IPC command code.
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* @para1: First 8bit parameter, set 0 if not used.
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* @para2: Second 8bit parameter, set 0 if not used.
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* @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.
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* @out: Output data.
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*
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* Send a IPC command to P-Unit with data transaction
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*
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* Return: IPC error code or 0 on success.
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*/
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int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
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{
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IPC_DEV *ipcdev = punit_ipcdev;
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IPC_TYPE type;
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u32 val;
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int ret;
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mutex_lock(&ipcdev->lock);
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reinit_completion(&ipcdev->cmd_complete);
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type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
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if (in) {
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ipc_write_data_low(ipcdev, type, *in);
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if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
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ipc_write_data_high(ipcdev, type, *++in);
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}
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val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
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val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
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ipc_write_cmd(ipcdev, type, val);
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ret = intel_punit_ipc_check_status(ipcdev, type);
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if (ret)
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goto out;
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if (out) {
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*out = ipc_read_data_low(ipcdev, type);
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if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
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*++out = ipc_read_data_high(ipcdev, type);
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}
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out:
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mutex_unlock(&ipcdev->lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
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static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
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{
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IPC_DEV *ipcdev = dev_id;
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complete(&ipcdev->cmd_complete);
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return IRQ_HANDLED;
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}
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static int intel_punit_get_bars(struct platform_device *pdev)
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{
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void __iomem *addr;
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/*
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* The following resources are required
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* - BIOS_IPC BASE_DATA
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* - BIOS_IPC BASE_IFACE
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*/
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addr = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(addr))
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return PTR_ERR(addr);
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punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
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addr = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(addr))
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return PTR_ERR(addr);
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punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
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/*
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* The following resources are optional
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* - ISPDRIVER_IPC BASE_DATA
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* - ISPDRIVER_IPC BASE_IFACE
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* - GTDRIVER_IPC BASE_DATA
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* - GTDRIVER_IPC BASE_IFACE
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*/
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addr = devm_platform_ioremap_resource(pdev, 2);
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if (!IS_ERR(addr))
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punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
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addr = devm_platform_ioremap_resource(pdev, 3);
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if (!IS_ERR(addr))
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punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
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addr = devm_platform_ioremap_resource(pdev, 4);
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if (!IS_ERR(addr))
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punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
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addr = devm_platform_ioremap_resource(pdev, 5);
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if (!IS_ERR(addr))
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punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
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return 0;
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}
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static int intel_punit_ipc_probe(struct platform_device *pdev)
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{
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int irq, ret;
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punit_ipcdev = devm_kzalloc(&pdev->dev,
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sizeof(*punit_ipcdev), GFP_KERNEL);
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if (!punit_ipcdev)
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return -ENOMEM;
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platform_set_drvdata(pdev, punit_ipcdev);
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irq = platform_get_irq_optional(pdev, 0);
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if (irq < 0) {
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dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
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} else {
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ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
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IRQF_NO_SUSPEND, "intel_punit_ipc",
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&punit_ipcdev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
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return ret;
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}
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punit_ipcdev->irq = irq;
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}
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ret = intel_punit_get_bars(pdev);
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if (ret)
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return ret;
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punit_ipcdev->dev = &pdev->dev;
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mutex_init(&punit_ipcdev->lock);
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init_completion(&punit_ipcdev->cmd_complete);
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return 0;
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}
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static const struct acpi_device_id punit_ipc_acpi_ids[] = {
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{ "INT34D4", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(acpi, punit_ipc_acpi_ids);
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static struct platform_driver intel_punit_ipc_driver = {
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.probe = intel_punit_ipc_probe,
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.driver = {
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.name = "intel_punit_ipc",
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.acpi_match_table = punit_ipc_acpi_ids,
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},
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};
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static int __init intel_punit_ipc_init(void)
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{
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return platform_driver_register(&intel_punit_ipc_driver);
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}
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static void __exit intel_punit_ipc_exit(void)
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{
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platform_driver_unregister(&intel_punit_ipc_driver);
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}
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MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
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MODULE_DESCRIPTION("Intel P-Unit IPC driver");
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MODULE_LICENSE("GPL v2");
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/* Some modules are dependent on this, so init earlier */
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fs_initcall(intel_punit_ipc_init);
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module_exit(intel_punit_ipc_exit);
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