332 lines
8.8 KiB
C
332 lines
8.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2020-2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*/
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#ifndef _NE_PCI_DEV_H_
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#define _NE_PCI_DEV_H_
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#include <linux/atomic.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/wait.h>
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/**
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* DOC: Nitro Enclaves (NE) PCI device
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*/
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/**
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* PCI_DEVICE_ID_NE - Nitro Enclaves PCI device id.
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*/
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#define PCI_DEVICE_ID_NE (0xe4c1)
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/**
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* PCI_BAR_NE - Nitro Enclaves PCI device MMIO BAR.
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*/
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#define PCI_BAR_NE (0x03)
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/**
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* DOC: Device registers in the NE PCI device MMIO BAR
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*/
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/**
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* NE_ENABLE - (1 byte) Register to notify the device that the driver is using
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* it (Read/Write).
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*/
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#define NE_ENABLE (0x0000)
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#define NE_ENABLE_OFF (0x00)
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#define NE_ENABLE_ON (0x01)
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/**
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* NE_VERSION - (2 bytes) Register to select the device run-time version
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* (Read/Write).
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*/
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#define NE_VERSION (0x0002)
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#define NE_VERSION_MAX (0x0001)
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/**
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* NE_COMMAND - (4 bytes) Register to notify the device what command was
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* requested (Write-Only).
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*/
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#define NE_COMMAND (0x0004)
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/**
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* NE_EVTCNT - (4 bytes) Register to notify the driver that a reply or a device
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* event is available (Read-Only):
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* - Lower half - command reply counter
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* - Higher half - out-of-band device event counter
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*/
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#define NE_EVTCNT (0x000c)
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#define NE_EVTCNT_REPLY_SHIFT (0)
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#define NE_EVTCNT_REPLY_MASK (0x0000ffff)
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#define NE_EVTCNT_REPLY(cnt) (((cnt) & NE_EVTCNT_REPLY_MASK) >> \
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NE_EVTCNT_REPLY_SHIFT)
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#define NE_EVTCNT_EVENT_SHIFT (16)
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#define NE_EVTCNT_EVENT_MASK (0xffff0000)
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#define NE_EVTCNT_EVENT(cnt) (((cnt) & NE_EVTCNT_EVENT_MASK) >> \
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NE_EVTCNT_EVENT_SHIFT)
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/**
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* NE_SEND_DATA - (240 bytes) Buffer for sending the command request payload
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* (Read/Write).
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*/
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#define NE_SEND_DATA (0x0010)
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/**
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* NE_RECV_DATA - (240 bytes) Buffer for receiving the command reply payload
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* (Read-Only).
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*/
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#define NE_RECV_DATA (0x0100)
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/**
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* DOC: Device MMIO buffer sizes
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*/
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/**
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* NE_SEND_DATA_SIZE - Size of the send buffer, in bytes.
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*/
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#define NE_SEND_DATA_SIZE (240)
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/**
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* NE_RECV_DATA_SIZE - Size of the receive buffer, in bytes.
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*/
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#define NE_RECV_DATA_SIZE (240)
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/**
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* DOC: MSI-X interrupt vectors
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*/
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/**
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* NE_VEC_REPLY - MSI-X vector used for command reply notification.
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*/
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#define NE_VEC_REPLY (0)
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/**
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* NE_VEC_EVENT - MSI-X vector used for out-of-band events e.g. enclave crash.
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*/
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#define NE_VEC_EVENT (1)
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/**
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* enum ne_pci_dev_cmd_type - Device command types.
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* @INVALID_CMD: Invalid command.
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* @ENCLAVE_START: Start an enclave, after setting its resources.
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* @ENCLAVE_GET_SLOT: Get the slot uid of an enclave.
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* @ENCLAVE_STOP: Terminate an enclave.
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* @SLOT_ALLOC : Allocate a slot for an enclave.
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* @SLOT_FREE: Free the slot allocated for an enclave
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* @SLOT_ADD_MEM: Add a memory region to an enclave slot.
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* @SLOT_ADD_VCPU: Add a vCPU to an enclave slot.
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* @SLOT_COUNT : Get the number of allocated slots.
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* @NEXT_SLOT: Get the next slot in the list of allocated slots.
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* @SLOT_INFO: Get the info for a slot e.g. slot uid, vCPUs count.
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* @SLOT_ADD_BULK_VCPUS: Add a number of vCPUs, not providing CPU ids.
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* @MAX_CMD: A gatekeeper for max possible command type.
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*/
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enum ne_pci_dev_cmd_type {
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INVALID_CMD = 0,
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ENCLAVE_START = 1,
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ENCLAVE_GET_SLOT = 2,
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ENCLAVE_STOP = 3,
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SLOT_ALLOC = 4,
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SLOT_FREE = 5,
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SLOT_ADD_MEM = 6,
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SLOT_ADD_VCPU = 7,
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SLOT_COUNT = 8,
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NEXT_SLOT = 9,
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SLOT_INFO = 10,
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SLOT_ADD_BULK_VCPUS = 11,
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MAX_CMD,
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};
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/**
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* DOC: Device commands - payload structure for requests and replies.
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*/
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/**
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* struct enclave_start_req - ENCLAVE_START request.
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* @slot_uid: Slot unique id mapped to the enclave to start.
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* @enclave_cid: Context ID (CID) for the enclave vsock device.
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* If 0, CID is autogenerated.
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* @flags: Flags for the enclave to start with (e.g. debug mode).
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*/
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struct enclave_start_req {
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u64 slot_uid;
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u64 enclave_cid;
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u64 flags;
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};
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/**
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* struct enclave_get_slot_req - ENCLAVE_GET_SLOT request.
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* @enclave_cid: Context ID (CID) for the enclave vsock device.
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*/
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struct enclave_get_slot_req {
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u64 enclave_cid;
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};
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/**
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* struct enclave_stop_req - ENCLAVE_STOP request.
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* @slot_uid: Slot unique id mapped to the enclave to stop.
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*/
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struct enclave_stop_req {
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u64 slot_uid;
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};
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/**
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* struct slot_alloc_req - SLOT_ALLOC request.
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* @unused: In order to avoid weird sizeof edge cases.
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*/
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struct slot_alloc_req {
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u8 unused;
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};
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/**
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* struct slot_free_req - SLOT_FREE request.
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* @slot_uid: Slot unique id mapped to the slot to free.
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*/
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struct slot_free_req {
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u64 slot_uid;
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};
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/* TODO: Add flags field to the request to add memory region. */
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/**
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* struct slot_add_mem_req - SLOT_ADD_MEM request.
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* @slot_uid: Slot unique id mapped to the slot to add the memory region to.
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* @paddr: Physical address of the memory region to add to the slot.
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* @size: Memory size, in bytes, of the memory region to add to the slot.
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*/
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struct slot_add_mem_req {
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u64 slot_uid;
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u64 paddr;
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u64 size;
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};
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/**
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* struct slot_add_vcpu_req - SLOT_ADD_VCPU request.
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* @slot_uid: Slot unique id mapped to the slot to add the vCPU to.
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* @vcpu_id: vCPU ID of the CPU to add to the enclave.
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* @padding: Padding for the overall data structure.
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*/
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struct slot_add_vcpu_req {
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u64 slot_uid;
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u32 vcpu_id;
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u8 padding[4];
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};
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/**
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* struct slot_count_req - SLOT_COUNT request.
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* @unused: In order to avoid weird sizeof edge cases.
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*/
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struct slot_count_req {
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u8 unused;
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};
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/**
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* struct next_slot_req - NEXT_SLOT request.
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* @slot_uid: Slot unique id of the next slot in the iteration.
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*/
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struct next_slot_req {
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u64 slot_uid;
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};
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/**
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* struct slot_info_req - SLOT_INFO request.
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* @slot_uid: Slot unique id mapped to the slot to get information about.
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*/
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struct slot_info_req {
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u64 slot_uid;
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};
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/**
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* struct slot_add_bulk_vcpus_req - SLOT_ADD_BULK_VCPUS request.
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* @slot_uid: Slot unique id mapped to the slot to add vCPUs to.
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* @nr_vcpus: Number of vCPUs to add to the slot.
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*/
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struct slot_add_bulk_vcpus_req {
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u64 slot_uid;
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u64 nr_vcpus;
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};
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/**
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* struct ne_pci_dev_cmd_reply - NE PCI device command reply.
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* @rc : Return code of the logic that processed the request.
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* @padding0: Padding for the overall data structure.
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* @slot_uid: Valid for all commands except SLOT_COUNT.
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* @enclave_cid: Valid for ENCLAVE_START command.
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* @slot_count : Valid for SLOT_COUNT command.
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* @mem_regions: Valid for SLOT_ALLOC and SLOT_INFO commands.
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* @mem_size: Valid for SLOT_INFO command.
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* @nr_vcpus: Valid for SLOT_INFO command.
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* @flags: Valid for SLOT_INFO command.
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* @state: Valid for SLOT_INFO command.
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* @padding1: Padding for the overall data structure.
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*/
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struct ne_pci_dev_cmd_reply {
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s32 rc;
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u8 padding0[4];
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u64 slot_uid;
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u64 enclave_cid;
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u64 slot_count;
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u64 mem_regions;
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u64 mem_size;
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u64 nr_vcpus;
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u64 flags;
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u16 state;
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u8 padding1[6];
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};
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/**
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* struct ne_pci_dev - Nitro Enclaves (NE) PCI device.
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* @cmd_reply_avail: Variable set if a reply has been sent by the
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* PCI device.
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* @cmd_reply_wait_q: Wait queue for handling command reply from the
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* PCI device.
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* @enclaves_list: List of the enclaves managed by the PCI device.
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* @enclaves_list_mutex: Mutex for accessing the list of enclaves.
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* @event_wq: Work queue for handling out-of-band events
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* triggered by the Nitro Hypervisor which require
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* enclave state scanning and propagation to the
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* enclave process.
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* @iomem_base : MMIO region of the PCI device.
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* @notify_work: Work item for every received out-of-band event.
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* @pci_dev_mutex: Mutex for accessing the PCI device MMIO space.
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* @pdev: PCI device data structure.
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*/
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struct ne_pci_dev {
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atomic_t cmd_reply_avail;
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wait_queue_head_t cmd_reply_wait_q;
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struct list_head enclaves_list;
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struct mutex enclaves_list_mutex;
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struct workqueue_struct *event_wq;
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void __iomem *iomem_base;
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struct work_struct notify_work;
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struct mutex pci_dev_mutex;
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struct pci_dev *pdev;
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};
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/**
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* ne_do_request() - Submit command request to the PCI device based on the command
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* type and retrieve the associated reply.
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* @pdev: PCI device to send the command to and receive the reply from.
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* @cmd_type: Command type of the request sent to the PCI device.
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* @cmd_request: Command request payload.
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* @cmd_request_size: Size of the command request payload.
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* @cmd_reply: Command reply payload.
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* @cmd_reply_size: Size of the command reply payload.
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*
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* Context: Process context. This function uses the ne_pci_dev mutex to handle
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* one command at a time.
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* Return:
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* * 0 on success.
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* * Negative return value on failure.
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*/
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int ne_do_request(struct pci_dev *pdev, enum ne_pci_dev_cmd_type cmd_type,
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void *cmd_request, size_t cmd_request_size,
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struct ne_pci_dev_cmd_reply *cmd_reply,
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size_t cmd_reply_size);
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/* Nitro Enclaves (NE) PCI device driver */
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extern struct pci_driver ne_pci_driver;
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#endif /* _NE_PCI_DEV_H_ */
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