448 lines
12 KiB
C
448 lines
12 KiB
C
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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//
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// Copyright (c) 2018 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_iec958.h>
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/*
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* NOTE:
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* The meaning of bits SPDIFOUT_CTRL0_XXX_SEL is actually the opposite
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* of what the documentation says. Manual control on V, U and C bits is
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* applied when the related sel bits are cleared
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*/
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#define SPDIFOUT_STAT 0x00
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#define SPDIFOUT_GAIN0 0x04
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#define SPDIFOUT_GAIN1 0x08
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#define SPDIFOUT_CTRL0 0x0c
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#define SPDIFOUT_CTRL0_EN BIT(31)
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#define SPDIFOUT_CTRL0_RST_OUT BIT(29)
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#define SPDIFOUT_CTRL0_RST_IN BIT(28)
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#define SPDIFOUT_CTRL0_USEL BIT(26)
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#define SPDIFOUT_CTRL0_USET BIT(25)
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#define SPDIFOUT_CTRL0_CHSTS_SEL BIT(24)
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#define SPDIFOUT_CTRL0_DATA_SEL BIT(20)
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#define SPDIFOUT_CTRL0_MSB_FIRST BIT(19)
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#define SPDIFOUT_CTRL0_VSEL BIT(18)
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#define SPDIFOUT_CTRL0_VSET BIT(17)
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#define SPDIFOUT_CTRL0_MASK_MASK GENMASK(11, 4)
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#define SPDIFOUT_CTRL0_MASK(x) ((x) << 4)
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#define SPDIFOUT_CTRL1 0x10
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#define SPDIFOUT_CTRL1_MSB_POS_MASK GENMASK(12, 8)
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#define SPDIFOUT_CTRL1_MSB_POS(x) ((x) << 8)
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#define SPDIFOUT_CTRL1_TYPE_MASK GENMASK(6, 4)
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#define SPDIFOUT_CTRL1_TYPE(x) ((x) << 4)
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#define SPDIFOUT_PREAMB 0x14
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#define SPDIFOUT_SWAP 0x18
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#define SPDIFOUT_CHSTS0 0x1c
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#define SPDIFOUT_CHSTS1 0x20
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#define SPDIFOUT_CHSTS2 0x24
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#define SPDIFOUT_CHSTS3 0x28
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#define SPDIFOUT_CHSTS4 0x2c
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#define SPDIFOUT_CHSTS5 0x30
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#define SPDIFOUT_CHSTS6 0x34
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#define SPDIFOUT_CHSTS7 0x38
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#define SPDIFOUT_CHSTS8 0x3c
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#define SPDIFOUT_CHSTS9 0x40
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#define SPDIFOUT_CHSTSA 0x44
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#define SPDIFOUT_CHSTSB 0x48
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#define SPDIFOUT_MUTE_VAL 0x4c
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struct axg_spdifout {
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struct regmap *map;
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struct clk *mclk;
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struct clk *pclk;
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};
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static void axg_spdifout_enable(struct regmap *map)
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{
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/* Apply both reset */
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regmap_update_bits(map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_RST_OUT | SPDIFOUT_CTRL0_RST_IN,
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0);
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/* Clear out reset before in reset */
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regmap_update_bits(map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_RST_OUT, SPDIFOUT_CTRL0_RST_OUT);
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regmap_update_bits(map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_RST_IN, SPDIFOUT_CTRL0_RST_IN);
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/* Enable spdifout */
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regmap_update_bits(map, SPDIFOUT_CTRL0, SPDIFOUT_CTRL0_EN,
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SPDIFOUT_CTRL0_EN);
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}
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static void axg_spdifout_disable(struct regmap *map)
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{
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regmap_update_bits(map, SPDIFOUT_CTRL0, SPDIFOUT_CTRL0_EN, 0);
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}
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static int axg_spdifout_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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axg_spdifout_enable(priv->map);
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return 0;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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axg_spdifout_disable(priv->map);
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return 0;
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default:
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return -EINVAL;
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}
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}
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static int axg_spdifout_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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/* Use spdif valid bit to perform digital mute */
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regmap_update_bits(priv->map, SPDIFOUT_CTRL0, SPDIFOUT_CTRL0_VSET,
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mute ? SPDIFOUT_CTRL0_VSET : 0);
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return 0;
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}
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static int axg_spdifout_sample_fmt(struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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unsigned int val;
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/* Set the samples spdifout will pull from the FIFO */
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switch (params_channels(params)) {
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case 1:
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val = SPDIFOUT_CTRL0_MASK(0x1);
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break;
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case 2:
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val = SPDIFOUT_CTRL0_MASK(0x3);
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break;
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default:
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dev_err(dai->dev, "too many channels for spdif dai: %u\n",
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params_channels(params));
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return -EINVAL;
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}
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regmap_update_bits(priv->map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_MASK_MASK, val);
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/* FIFO data are arranged in chunks of 64bits */
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switch (params_physical_width(params)) {
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case 8:
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/* 8 samples of 8 bits */
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val = SPDIFOUT_CTRL1_TYPE(0);
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break;
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case 16:
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/* 4 samples of 16 bits - right justified */
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val = SPDIFOUT_CTRL1_TYPE(2);
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break;
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case 32:
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/* 2 samples of 32 bits - right justified */
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val = SPDIFOUT_CTRL1_TYPE(4);
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break;
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default:
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dev_err(dai->dev, "Unsupported physical width: %u\n",
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params_physical_width(params));
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return -EINVAL;
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}
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/* Position of the MSB in FIFO samples */
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val |= SPDIFOUT_CTRL1_MSB_POS(params_width(params) - 1);
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regmap_update_bits(priv->map, SPDIFOUT_CTRL1,
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SPDIFOUT_CTRL1_MSB_POS_MASK |
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SPDIFOUT_CTRL1_TYPE_MASK, val);
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regmap_update_bits(priv->map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_MSB_FIRST | SPDIFOUT_CTRL0_DATA_SEL,
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0);
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return 0;
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}
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static int axg_spdifout_set_chsts(struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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unsigned int offset;
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int ret;
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u8 cs[4];
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u32 val;
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ret = snd_pcm_create_iec958_consumer_hw_params(params, cs, 4);
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if (ret < 0) {
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dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
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ret);
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return ret;
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}
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val = cs[0] | cs[1] << 8 | cs[2] << 16 | cs[3] << 24;
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/* Setup channel status A bits [31 - 0]*/
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regmap_write(priv->map, SPDIFOUT_CHSTS0, val);
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/* Clear channel status A bits [191 - 32] */
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for (offset = SPDIFOUT_CHSTS1; offset <= SPDIFOUT_CHSTS5;
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offset += regmap_get_reg_stride(priv->map))
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regmap_write(priv->map, offset, 0);
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/* Setup channel status B bits [31 - 0]*/
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regmap_write(priv->map, SPDIFOUT_CHSTS6, val);
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/* Clear channel status B bits [191 - 32] */
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for (offset = SPDIFOUT_CHSTS7; offset <= SPDIFOUT_CHSTSB;
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offset += regmap_get_reg_stride(priv->map))
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regmap_write(priv->map, offset, 0);
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return 0;
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}
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static int axg_spdifout_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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unsigned int rate = params_rate(params);
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int ret;
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/* 2 * 32bits per subframe * 2 channels = 128 */
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ret = clk_set_rate(priv->mclk, rate * 128);
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if (ret) {
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dev_err(dai->dev, "failed to set spdif clock\n");
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return ret;
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}
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ret = axg_spdifout_sample_fmt(params, dai);
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if (ret) {
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dev_err(dai->dev, "failed to setup sample format\n");
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return ret;
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}
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ret = axg_spdifout_set_chsts(params, dai);
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if (ret) {
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dev_err(dai->dev, "failed to setup channel status words\n");
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return ret;
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}
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return 0;
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}
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static int axg_spdifout_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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int ret;
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/* Clock the spdif output block */
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ret = clk_prepare_enable(priv->pclk);
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if (ret) {
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dev_err(dai->dev, "failed to enable pclk\n");
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return ret;
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}
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/* Make sure the block is initially stopped */
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axg_spdifout_disable(priv->map);
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/* Insert data from bit 27 lsb first */
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regmap_update_bits(priv->map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_MSB_FIRST | SPDIFOUT_CTRL0_DATA_SEL,
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0);
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/* Manual control of V, C and U, U = 0 */
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regmap_update_bits(priv->map, SPDIFOUT_CTRL0,
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SPDIFOUT_CTRL0_CHSTS_SEL | SPDIFOUT_CTRL0_VSEL |
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SPDIFOUT_CTRL0_USEL | SPDIFOUT_CTRL0_USET,
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0);
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/* Static SWAP configuration ATM */
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regmap_write(priv->map, SPDIFOUT_SWAP, 0x10);
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return 0;
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}
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static void axg_spdifout_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct axg_spdifout *priv = snd_soc_dai_get_drvdata(dai);
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clk_disable_unprepare(priv->pclk);
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}
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static const struct snd_soc_dai_ops axg_spdifout_ops = {
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.trigger = axg_spdifout_trigger,
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.mute_stream = axg_spdifout_mute,
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.hw_params = axg_spdifout_hw_params,
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.startup = axg_spdifout_startup,
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.shutdown = axg_spdifout_shutdown,
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.no_capture_mute = 1,
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};
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static struct snd_soc_dai_driver axg_spdifout_dai_drv[] = {
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{
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.name = "SPDIF Output",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = (SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_88200 |
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SNDRV_PCM_RATE_96000 |
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SNDRV_PCM_RATE_176400 |
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SNDRV_PCM_RATE_192000),
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.formats = (SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_S20_LE |
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SNDRV_PCM_FMTBIT_S24_LE),
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},
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.ops = &axg_spdifout_ops,
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},
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};
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static const char * const spdifout_sel_texts[] = {
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"IN 0", "IN 1", "IN 2",
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};
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static SOC_ENUM_SINGLE_DECL(axg_spdifout_sel_enum, SPDIFOUT_CTRL1, 24,
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spdifout_sel_texts);
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static const struct snd_kcontrol_new axg_spdifout_in_mux =
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SOC_DAPM_ENUM("Input Source", axg_spdifout_sel_enum);
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static const struct snd_soc_dapm_widget axg_spdifout_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_spdifout_in_mux),
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};
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static const struct snd_soc_dapm_route axg_spdifout_dapm_routes[] = {
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{ "SRC SEL", "IN 0", "IN 0" },
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{ "SRC SEL", "IN 1", "IN 1" },
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{ "SRC SEL", "IN 2", "IN 2" },
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{ "Playback", NULL, "SRC SEL" },
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};
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static const struct snd_kcontrol_new axg_spdifout_controls[] = {
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SOC_DOUBLE("Playback Volume", SPDIFOUT_GAIN0, 0, 8, 255, 0),
|
||
|
|
SOC_DOUBLE("Playback Switch", SPDIFOUT_CTRL0, 22, 21, 1, 1),
|
||
|
|
SOC_SINGLE("Playback Gain Enable Switch",
|
||
|
|
SPDIFOUT_CTRL1, 26, 1, 0),
|
||
|
|
SOC_SINGLE("Playback Channels Mix Switch",
|
||
|
|
SPDIFOUT_CTRL0, 23, 1, 0),
|
||
|
|
};
|
||
|
|
|
||
|
|
static int axg_spdifout_set_bias_level(struct snd_soc_component *component,
|
||
|
|
enum snd_soc_bias_level level)
|
||
|
|
{
|
||
|
|
struct axg_spdifout *priv = snd_soc_component_get_drvdata(component);
|
||
|
|
enum snd_soc_bias_level now =
|
||
|
|
snd_soc_component_get_bias_level(component);
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
switch (level) {
|
||
|
|
case SND_SOC_BIAS_PREPARE:
|
||
|
|
if (now == SND_SOC_BIAS_STANDBY)
|
||
|
|
ret = clk_prepare_enable(priv->mclk);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case SND_SOC_BIAS_STANDBY:
|
||
|
|
if (now == SND_SOC_BIAS_PREPARE)
|
||
|
|
clk_disable_unprepare(priv->mclk);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case SND_SOC_BIAS_OFF:
|
||
|
|
case SND_SOC_BIAS_ON:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct snd_soc_component_driver axg_spdifout_component_drv = {
|
||
|
|
.controls = axg_spdifout_controls,
|
||
|
|
.num_controls = ARRAY_SIZE(axg_spdifout_controls),
|
||
|
|
.dapm_widgets = axg_spdifout_dapm_widgets,
|
||
|
|
.num_dapm_widgets = ARRAY_SIZE(axg_spdifout_dapm_widgets),
|
||
|
|
.dapm_routes = axg_spdifout_dapm_routes,
|
||
|
|
.num_dapm_routes = ARRAY_SIZE(axg_spdifout_dapm_routes),
|
||
|
|
.set_bias_level = axg_spdifout_set_bias_level,
|
||
|
|
.legacy_dai_naming = 1,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct regmap_config axg_spdifout_regmap_cfg = {
|
||
|
|
.reg_bits = 32,
|
||
|
|
.val_bits = 32,
|
||
|
|
.reg_stride = 4,
|
||
|
|
.max_register = SPDIFOUT_MUTE_VAL,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct of_device_id axg_spdifout_of_match[] = {
|
||
|
|
{ .compatible = "amlogic,axg-spdifout", },
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, axg_spdifout_of_match);
|
||
|
|
|
||
|
|
static int axg_spdifout_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct device *dev = &pdev->dev;
|
||
|
|
struct axg_spdifout *priv;
|
||
|
|
void __iomem *regs;
|
||
|
|
|
||
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||
|
|
if (!priv)
|
||
|
|
return -ENOMEM;
|
||
|
|
platform_set_drvdata(pdev, priv);
|
||
|
|
|
||
|
|
regs = devm_platform_ioremap_resource(pdev, 0);
|
||
|
|
if (IS_ERR(regs))
|
||
|
|
return PTR_ERR(regs);
|
||
|
|
|
||
|
|
priv->map = devm_regmap_init_mmio(dev, regs, &axg_spdifout_regmap_cfg);
|
||
|
|
if (IS_ERR(priv->map)) {
|
||
|
|
dev_err(dev, "failed to init regmap: %ld\n",
|
||
|
|
PTR_ERR(priv->map));
|
||
|
|
return PTR_ERR(priv->map);
|
||
|
|
}
|
||
|
|
|
||
|
|
priv->pclk = devm_clk_get(dev, "pclk");
|
||
|
|
if (IS_ERR(priv->pclk))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(priv->pclk), "failed to get pclk\n");
|
||
|
|
|
||
|
|
priv->mclk = devm_clk_get(dev, "mclk");
|
||
|
|
if (IS_ERR(priv->mclk))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(priv->mclk), "failed to get mclk\n");
|
||
|
|
|
||
|
|
return devm_snd_soc_register_component(dev, &axg_spdifout_component_drv,
|
||
|
|
axg_spdifout_dai_drv, ARRAY_SIZE(axg_spdifout_dai_drv));
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver axg_spdifout_pdrv = {
|
||
|
|
.probe = axg_spdifout_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "axg-spdifout",
|
||
|
|
.of_match_table = axg_spdifout_of_match,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
module_platform_driver(axg_spdifout_pdrv);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("Amlogic AXG SPDIF Output driver");
|
||
|
|
MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
|
||
|
|
MODULE_LICENSE("GPL v2");
|