406 lines
11 KiB
C
406 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// This driver supports the DMIC in Allwinner's H6 SoCs.
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//
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// Copyright 2021 Ban Tao <fengzheng923@gmail.com>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#define SUN50I_DMIC_EN_CTL (0x00)
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#define SUN50I_DMIC_EN_CTL_GLOBE BIT(8)
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#define SUN50I_DMIC_EN_CTL_CHAN(v) ((v) << 0)
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#define SUN50I_DMIC_EN_CTL_CHAN_MASK GENMASK(7, 0)
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#define SUN50I_DMIC_SR (0x04)
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#define SUN50I_DMIC_SR_SAMPLE_RATE(v) ((v) << 0)
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#define SUN50I_DMIC_SR_SAMPLE_RATE_MASK GENMASK(2, 0)
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#define SUN50I_DMIC_CTL (0x08)
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#define SUN50I_DMIC_CTL_OVERSAMPLE_RATE BIT(0)
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#define SUN50I_DMIC_DATA (0x10)
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#define SUN50I_DMIC_INTC (0x14)
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#define SUN50I_DMIC_FIFO_DRQ_EN BIT(2)
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#define SUN50I_DMIC_INT_STA (0x18)
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#define SUN50I_DMIC_INT_STA_OVERRUN_IRQ_PENDING BIT(1)
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#define SUN50I_DMIC_INT_STA_DATA_IRQ_PENDING BIT(0)
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#define SUN50I_DMIC_RXFIFO_CTL (0x1c)
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#define SUN50I_DMIC_RXFIFO_CTL_FLUSH BIT(31)
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#define SUN50I_DMIC_RXFIFO_CTL_MODE_MASK BIT(9)
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#define SUN50I_DMIC_RXFIFO_CTL_MODE_LSB (0 << 9)
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#define SUN50I_DMIC_RXFIFO_CTL_MODE_MSB (1 << 9)
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#define SUN50I_DMIC_RXFIFO_CTL_SAMPLE_MASK BIT(8)
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#define SUN50I_DMIC_RXFIFO_CTL_SAMPLE_16 (0 << 8)
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#define SUN50I_DMIC_RXFIFO_CTL_SAMPLE_24 (1 << 8)
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#define SUN50I_DMIC_CH_NUM (0x24)
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#define SUN50I_DMIC_CH_NUM_N(v) ((v) << 0)
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#define SUN50I_DMIC_CH_NUM_N_MASK GENMASK(2, 0)
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#define SUN50I_DMIC_CNT (0x2c)
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#define SUN50I_DMIC_CNT_N (1 << 0)
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#define SUN50I_DMIC_HPF_CTRL (0x38)
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#define SUN50I_DMIC_VERSION (0x50)
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struct sun50i_dmic_dev {
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struct clk *dmic_clk;
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struct clk *bus_clk;
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struct reset_control *rst;
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struct regmap *regmap;
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struct snd_dmaengine_dai_dma_data dma_params_rx;
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};
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struct dmic_rate {
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unsigned int samplerate;
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unsigned int rate_bit;
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};
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static const struct dmic_rate dmic_rate_s[] = {
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{48000, 0x0},
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{44100, 0x0},
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{32000, 0x1},
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{24000, 0x2},
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{22050, 0x2},
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{16000, 0x3},
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{12000, 0x4},
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{11025, 0x4},
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{8000, 0x5},
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};
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static int sun50i_dmic_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct sun50i_dmic_dev *host = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
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/* only support capture */
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if (substream->stream != SNDRV_PCM_STREAM_CAPTURE)
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return -EINVAL;
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regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
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SUN50I_DMIC_RXFIFO_CTL_FLUSH,
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SUN50I_DMIC_RXFIFO_CTL_FLUSH);
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regmap_write(host->regmap, SUN50I_DMIC_CNT, SUN50I_DMIC_CNT_N);
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return 0;
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}
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static int sun50i_dmic_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *cpu_dai)
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{
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int i = 0;
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unsigned long rate = params_rate(params);
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unsigned int mclk = 0;
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unsigned int channels = params_channels(params);
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unsigned int chan_en = (1 << channels) - 1;
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struct sun50i_dmic_dev *host = snd_soc_dai_get_drvdata(cpu_dai);
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/* DMIC num is N+1 */
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regmap_update_bits(host->regmap, SUN50I_DMIC_CH_NUM,
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SUN50I_DMIC_CH_NUM_N_MASK,
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SUN50I_DMIC_CH_NUM_N(channels - 1));
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regmap_write(host->regmap, SUN50I_DMIC_HPF_CTRL, chan_en);
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regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,
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SUN50I_DMIC_EN_CTL_CHAN_MASK,
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SUN50I_DMIC_EN_CTL_CHAN(chan_en));
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
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SUN50I_DMIC_RXFIFO_CTL_SAMPLE_MASK,
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SUN50I_DMIC_RXFIFO_CTL_SAMPLE_16);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
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SUN50I_DMIC_RXFIFO_CTL_SAMPLE_MASK,
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SUN50I_DMIC_RXFIFO_CTL_SAMPLE_24);
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break;
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default:
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dev_err(cpu_dai->dev, "Invalid format!\n");
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return -EINVAL;
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}
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/* The hardware supports FIFO mode 1 for 24-bit samples */
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regmap_update_bits(host->regmap, SUN50I_DMIC_RXFIFO_CTL,
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SUN50I_DMIC_RXFIFO_CTL_MODE_MASK,
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SUN50I_DMIC_RXFIFO_CTL_MODE_MSB);
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switch (rate) {
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case 11025:
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case 22050:
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case 44100:
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mclk = 22579200;
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break;
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case 8000:
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case 12000:
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case 16000:
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case 24000:
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case 32000:
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case 48000:
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mclk = 24576000;
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break;
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default:
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dev_err(cpu_dai->dev, "Invalid rate!\n");
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return -EINVAL;
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}
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if (clk_set_rate(host->dmic_clk, mclk)) {
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dev_err(cpu_dai->dev, "mclk : %u not support\n", mclk);
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return -EINVAL;
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}
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for (i = 0; i < ARRAY_SIZE(dmic_rate_s); i++) {
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if (dmic_rate_s[i].samplerate == rate) {
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regmap_update_bits(host->regmap, SUN50I_DMIC_SR,
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SUN50I_DMIC_SR_SAMPLE_RATE_MASK,
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SUN50I_DMIC_SR_SAMPLE_RATE(dmic_rate_s[i].rate_bit));
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break;
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}
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}
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switch (params_physical_width(params)) {
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case 16:
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host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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break;
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case 32:
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host->dma_params_rx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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break;
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default:
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dev_err(cpu_dai->dev, "Unsupported physical sample width: %d\n",
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params_physical_width(params));
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return -EINVAL;
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}
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/* oversamplerate adjust */
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if (params_rate(params) >= 24000)
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regmap_update_bits(host->regmap, SUN50I_DMIC_CTL,
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SUN50I_DMIC_CTL_OVERSAMPLE_RATE,
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SUN50I_DMIC_CTL_OVERSAMPLE_RATE);
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else
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regmap_update_bits(host->regmap, SUN50I_DMIC_CTL,
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SUN50I_DMIC_CTL_OVERSAMPLE_RATE, 0);
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return 0;
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}
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static int sun50i_dmic_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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int ret = 0;
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struct sun50i_dmic_dev *host = snd_soc_dai_get_drvdata(dai);
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if (substream->stream != SNDRV_PCM_STREAM_CAPTURE)
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return -EINVAL;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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/* DRQ ENABLE */
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regmap_update_bits(host->regmap, SUN50I_DMIC_INTC,
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SUN50I_DMIC_FIFO_DRQ_EN,
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SUN50I_DMIC_FIFO_DRQ_EN);
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/* Global enable */
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regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,
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SUN50I_DMIC_EN_CTL_GLOBE,
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SUN50I_DMIC_EN_CTL_GLOBE);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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/* DRQ DISABLE */
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regmap_update_bits(host->regmap, SUN50I_DMIC_INTC,
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SUN50I_DMIC_FIFO_DRQ_EN, 0);
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/* Global disable */
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regmap_update_bits(host->regmap, SUN50I_DMIC_EN_CTL,
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SUN50I_DMIC_EN_CTL_GLOBE, 0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int sun50i_dmic_soc_dai_probe(struct snd_soc_dai *dai)
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{
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struct sun50i_dmic_dev *host = snd_soc_dai_get_drvdata(dai);
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snd_soc_dai_init_dma_data(dai, NULL, &host->dma_params_rx);
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return 0;
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}
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static const struct snd_soc_dai_ops sun50i_dmic_dai_ops = {
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.startup = sun50i_dmic_startup,
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.trigger = sun50i_dmic_trigger,
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.hw_params = sun50i_dmic_hw_params,
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};
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static const struct regmap_config sun50i_dmic_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = SUN50I_DMIC_VERSION,
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.cache_type = REGCACHE_NONE,
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};
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#define SUN50I_DMIC_RATES (SNDRV_PCM_RATE_8000_48000)
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#define SUN50I_DMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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static struct snd_soc_dai_driver sun50i_dmic_dai = {
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.capture = {
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.channels_min = 1,
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.channels_max = 8,
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.rates = SUN50I_DMIC_RATES,
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.formats = SUN50I_DMIC_FORMATS,
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.sig_bits = 21,
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},
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.probe = sun50i_dmic_soc_dai_probe,
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.ops = &sun50i_dmic_dai_ops,
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.name = "dmic",
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};
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static const struct of_device_id sun50i_dmic_of_match[] = {
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{
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.compatible = "allwinner,sun50i-h6-dmic",
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sun50i_dmic_of_match);
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static const struct snd_soc_component_driver sun50i_dmic_component = {
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.name = "sun50i-dmic",
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};
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static int sun50i_dmic_runtime_suspend(struct device *dev)
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{
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struct sun50i_dmic_dev *host = dev_get_drvdata(dev);
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clk_disable_unprepare(host->dmic_clk);
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clk_disable_unprepare(host->bus_clk);
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return 0;
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}
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static int sun50i_dmic_runtime_resume(struct device *dev)
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{
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struct sun50i_dmic_dev *host = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(host->dmic_clk);
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if (ret)
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return ret;
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ret = clk_prepare_enable(host->bus_clk);
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if (ret) {
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clk_disable_unprepare(host->dmic_clk);
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return ret;
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}
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return 0;
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}
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static int sun50i_dmic_probe(struct platform_device *pdev)
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{
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struct sun50i_dmic_dev *host;
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struct resource *res;
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int ret;
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void __iomem *base;
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host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
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if (!host)
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return -ENOMEM;
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/* Get the addresses */
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base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(base))
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return dev_err_probe(&pdev->dev, PTR_ERR(base),
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"get resource failed.\n");
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host->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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&sun50i_dmic_regmap_config);
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/* Clocks */
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host->bus_clk = devm_clk_get(&pdev->dev, "bus");
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if (IS_ERR(host->bus_clk))
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return dev_err_probe(&pdev->dev, PTR_ERR(host->bus_clk),
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"failed to get bus clock.\n");
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host->dmic_clk = devm_clk_get(&pdev->dev, "mod");
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if (IS_ERR(host->dmic_clk))
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return dev_err_probe(&pdev->dev, PTR_ERR(host->dmic_clk),
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"failed to get dmic clock.\n");
|
||
|
|
|
||
|
|
host->dma_params_rx.addr = res->start + SUN50I_DMIC_DATA;
|
||
|
|
host->dma_params_rx.maxburst = 8;
|
||
|
|
|
||
|
|
platform_set_drvdata(pdev, host);
|
||
|
|
|
||
|
|
host->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
|
||
|
|
if (IS_ERR(host->rst))
|
||
|
|
return dev_err_probe(&pdev->dev, PTR_ERR(host->rst),
|
||
|
|
"Failed to get reset.\n");
|
||
|
|
reset_control_deassert(host->rst);
|
||
|
|
|
||
|
|
ret = devm_snd_soc_register_component(&pdev->dev, &sun50i_dmic_component,
|
||
|
|
&sun50i_dmic_dai, 1);
|
||
|
|
if (ret)
|
||
|
|
return dev_err_probe(&pdev->dev, ret,
|
||
|
|
"failed to register component.\n");
|
||
|
|
|
||
|
|
pm_runtime_enable(&pdev->dev);
|
||
|
|
if (!pm_runtime_enabled(&pdev->dev)) {
|
||
|
|
ret = sun50i_dmic_runtime_resume(&pdev->dev);
|
||
|
|
if (ret)
|
||
|
|
goto err_disable_runtime_pm;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
|
||
|
|
if (ret)
|
||
|
|
goto err_suspend;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
err_suspend:
|
||
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
||
|
|
sun50i_dmic_runtime_suspend(&pdev->dev);
|
||
|
|
err_disable_runtime_pm:
|
||
|
|
pm_runtime_disable(&pdev->dev);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int sun50i_dmic_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
pm_runtime_disable(&pdev->dev);
|
||
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
||
|
|
sun50i_dmic_runtime_suspend(&pdev->dev);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct dev_pm_ops sun50i_dmic_pm = {
|
||
|
|
SET_RUNTIME_PM_OPS(sun50i_dmic_runtime_suspend,
|
||
|
|
sun50i_dmic_runtime_resume, NULL)
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_driver sun50i_dmic_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "sun50i-dmic",
|
||
|
|
.of_match_table = sun50i_dmic_of_match,
|
||
|
|
.pm = &sun50i_dmic_pm,
|
||
|
|
},
|
||
|
|
.probe = sun50i_dmic_probe,
|
||
|
|
.remove = sun50i_dmic_remove,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_platform_driver(sun50i_dmic_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("Allwinner sun50i DMIC SoC Interface");
|
||
|
|
MODULE_AUTHOR("Ban Tao <fengzheng923@gmail.com>");
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
MODULE_ALIAS("platform:sun50i-dmic");
|