205 lines
6.9 KiB
Plaintext
205 lines
6.9 KiB
Plaintext
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Intel hybrid support
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--------------------
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Support for Intel hybrid events within perf tools.
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For some Intel platforms, such as AlderLake, which is hybrid platform and
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it consists of atom cpu and core cpu. Each cpu has dedicated event list.
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Part of events are available on core cpu, part of events are available
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on atom cpu and even part of events are available on both.
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Kernel exports two new cpu pmus via sysfs:
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/sys/devices/cpu_core
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/sys/devices/cpu_atom
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The 'cpus' files are created under the directories. For example,
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cat /sys/devices/cpu_core/cpus
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0-15
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cat /sys/devices/cpu_atom/cpus
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16-23
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It indicates cpu0-cpu15 are core cpus and cpu16-cpu23 are atom cpus.
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As before, use perf-list to list the symbolic event.
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perf list
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inst_retired.any
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[Fixed Counter: Counts the number of instructions retired. Unit: cpu_atom]
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inst_retired.any
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[Number of instructions retired. Fixed Counter - architectural event. Unit: cpu_core]
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The 'Unit: xxx' is added to brief description to indicate which pmu
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the event is belong to. Same event name but with different pmu can
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be supported.
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Enable hybrid event with a specific pmu
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To enable a core only event or atom only event, following syntax is supported:
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cpu_core/<event name>/
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or
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cpu_atom/<event name>/
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For example, count the 'cycles' event on core cpus.
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perf stat -e cpu_core/cycles/
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Create two events for one hardware event automatically
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When creating one event and the event is available on both atom and core,
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two events are created automatically. One is for atom, the other is for
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core. Most of hardware events and cache events are available on both
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cpu_core and cpu_atom.
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For hardware events, they have pre-defined configs (e.g. 0 for cycles).
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But on hybrid platform, kernel needs to know where the event comes from
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(from atom or from core). The original perf event type PERF_TYPE_HARDWARE
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can't carry pmu information. So now this type is extended to be PMU aware
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type. The PMU type ID is stored at attr.config[63:32].
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PMU type ID is retrieved from sysfs.
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/sys/devices/cpu_atom/type
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/sys/devices/cpu_core/type
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The new attr.config layout for PERF_TYPE_HARDWARE:
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PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA
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AA: hardware event ID
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EEEEEEEE: PMU type ID
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Cache event is similar. The type PERF_TYPE_HW_CACHE is extended to be
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PMU aware type. The PMU type ID is stored at attr.config[63:32].
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The new attr.config layout for PERF_TYPE_HW_CACHE:
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PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB
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BB: hardware cache ID
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CC: hardware cache op ID
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DD: hardware cache op result ID
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EEEEEEEE: PMU type ID
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When enabling a hardware event without specified pmu, such as,
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perf stat -e cycles -a (use system-wide in this example), two events
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are created automatically.
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------------------------------------------------------------
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perf_event_attr:
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size 120
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config 0x400000000
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sample_type IDENTIFIER
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read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
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disabled 1
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inherit 1
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exclude_guest 1
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------------------------------------------------------------
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and
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------------------------------------------------------------
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perf_event_attr:
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size 120
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config 0x800000000
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sample_type IDENTIFIER
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read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
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disabled 1
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inherit 1
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exclude_guest 1
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------------------------------------------------------------
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type 0 is PERF_TYPE_HARDWARE.
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0x4 in 0x400000000 indicates it's cpu_core pmu.
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0x8 in 0x800000000 indicates it's cpu_atom pmu (atom pmu type id is random).
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The kernel creates 'cycles' (0x400000000) on cpu0-cpu15 (core cpus),
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and create 'cycles' (0x800000000) on cpu16-cpu23 (atom cpus).
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For perf-stat result, it displays two events:
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Performance counter stats for 'system wide':
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6,744,979 cpu_core/cycles/
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1,965,552 cpu_atom/cycles/
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The first 'cycles' is core event, the second 'cycles' is atom event.
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Thread mode example:
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perf-stat reports the scaled counts for hybrid event and with a percentage
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displayed. The percentage is the event's running time/enabling time.
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One example, 'triad_loop' runs on cpu16 (atom core), while we can see the
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scaled value for core cycles is 160,444,092 and the percentage is 0.47%.
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perf stat -e cycles \-- taskset -c 16 ./triad_loop
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As previous, two events are created.
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------------------------------------------------------------
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perf_event_attr:
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size 120
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config 0x400000000
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sample_type IDENTIFIER
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read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
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disabled 1
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inherit 1
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enable_on_exec 1
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exclude_guest 1
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------------------------------------------------------------
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and
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------------------------------------------------------------
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perf_event_attr:
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size 120
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config 0x800000000
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sample_type IDENTIFIER
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read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING
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disabled 1
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inherit 1
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enable_on_exec 1
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exclude_guest 1
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------------------------------------------------------------
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Performance counter stats for 'taskset -c 16 ./triad_loop':
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233,066,666 cpu_core/cycles/ (0.43%)
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604,097,080 cpu_atom/cycles/ (99.57%)
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perf-record:
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If there is no '-e' specified in perf record, on hybrid platform,
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it creates two default 'cycles' and adds them to event list. One
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is for core, the other is for atom.
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perf-stat:
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If there is no '-e' specified in perf stat, on hybrid platform,
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besides of software events, following events are created and
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added to event list in order.
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cpu_core/cycles/,
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cpu_atom/cycles/,
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cpu_core/instructions/,
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cpu_atom/instructions/,
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cpu_core/branches/,
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cpu_atom/branches/,
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cpu_core/branch-misses/,
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cpu_atom/branch-misses/
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Of course, both perf-stat and perf-record support to enable
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hybrid event with a specific pmu.
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e.g.
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perf stat -e cpu_core/cycles/
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perf stat -e cpu_atom/cycles/
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perf stat -e cpu_core/r1a/
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perf stat -e cpu_atom/L1-icache-loads/
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perf stat -e cpu_core/cycles/,cpu_atom/instructions/
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perf stat -e '{cpu_core/cycles/,cpu_core/instructions/}'
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But '{cpu_core/cycles/,cpu_atom/instructions/}' will return
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warning and disable grouping, because the pmus in group are
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not matched (cpu_core vs. cpu_atom).
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