558 lines
13 KiB
C
558 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021 ARM Limited.
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*/
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#include <errno.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/auxv.h>
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#include <sys/prctl.h>
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#include <asm/hwcap.h>
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#include <asm/sigcontext.h>
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#include <asm/unistd.h>
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#include "../../kselftest.h"
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#include "syscall-abi.h"
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static int default_sme_vl;
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static int sve_vl_count;
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static unsigned int sve_vls[SVE_VQ_MAX];
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static int sme_vl_count;
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static unsigned int sme_vls[SVE_VQ_MAX];
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extern void do_syscall(int sve_vl, int sme_vl);
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static void fill_random(void *buf, size_t size)
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{
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int i;
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uint32_t *lbuf = buf;
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/* random() returns a 32 bit number regardless of the size of long */
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for (i = 0; i < size / sizeof(uint32_t); i++)
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lbuf[i] = random();
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}
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/*
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* We also repeat the test for several syscalls to try to expose different
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* behaviour.
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*/
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static struct syscall_cfg {
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int syscall_nr;
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const char *name;
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} syscalls[] = {
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{ __NR_getpid, "getpid()" },
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{ __NR_sched_yield, "sched_yield()" },
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};
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#define NUM_GPR 31
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uint64_t gpr_in[NUM_GPR];
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uint64_t gpr_out[NUM_GPR];
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static void setup_gpr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(gpr_in, sizeof(gpr_in));
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gpr_in[8] = cfg->syscall_nr;
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memset(gpr_out, 0, sizeof(gpr_out));
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}
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static int check_gpr(struct syscall_cfg *cfg, int sve_vl, int sme_vl, uint64_t svcr)
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{
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int errors = 0;
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int i;
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/*
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* GPR x0-x7 may be clobbered, and all others should be preserved.
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*/
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for (i = 9; i < ARRAY_SIZE(gpr_in); i++) {
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if (gpr_in[i] != gpr_out[i]) {
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ksft_print_msg("%s SVE VL %d mismatch in GPR %d: %llx != %llx\n",
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cfg->name, sve_vl, i,
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gpr_in[i], gpr_out[i]);
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errors++;
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}
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}
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return errors;
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}
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#define NUM_FPR 32
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uint64_t fpr_in[NUM_FPR * 2];
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uint64_t fpr_out[NUM_FPR * 2];
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uint64_t fpr_zero[NUM_FPR * 2];
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static void setup_fpr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(fpr_in, sizeof(fpr_in));
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memset(fpr_out, 0, sizeof(fpr_out));
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}
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static int check_fpr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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int errors = 0;
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int i;
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if (!sve_vl && !(svcr & SVCR_SM_MASK)) {
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for (i = 0; i < ARRAY_SIZE(fpr_in); i++) {
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if (fpr_in[i] != fpr_out[i]) {
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ksft_print_msg("%s Q%d/%d mismatch %llx != %llx\n",
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cfg->name,
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i / 2, i % 2,
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fpr_in[i], fpr_out[i]);
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errors++;
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}
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}
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}
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/*
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* In streaming mode the whole register set should be cleared
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* by the transition out of streaming mode.
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*/
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if (svcr & SVCR_SM_MASK) {
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if (memcmp(fpr_zero, fpr_out, sizeof(fpr_out)) != 0) {
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ksft_print_msg("%s FPSIMD registers non-zero exiting SM\n",
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cfg->name);
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errors++;
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}
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}
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return errors;
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}
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#define SVE_Z_SHARED_BYTES (128 / 8)
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static uint8_t z_zero[__SVE_ZREG_SIZE(SVE_VQ_MAX)];
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uint8_t z_in[SVE_NUM_ZREGS * __SVE_ZREG_SIZE(SVE_VQ_MAX)];
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uint8_t z_out[SVE_NUM_ZREGS * __SVE_ZREG_SIZE(SVE_VQ_MAX)];
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static void setup_z(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(z_in, sizeof(z_in));
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fill_random(z_out, sizeof(z_out));
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}
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static int check_z(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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size_t reg_size = sve_vl;
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int errors = 0;
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int i;
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if (!sve_vl)
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return 0;
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for (i = 0; i < SVE_NUM_ZREGS; i++) {
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uint8_t *in = &z_in[reg_size * i];
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uint8_t *out = &z_out[reg_size * i];
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if (svcr & SVCR_SM_MASK) {
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/*
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* In streaming mode the whole register should
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* be cleared by the transition out of
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* streaming mode.
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*/
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if (memcmp(z_zero, out, reg_size) != 0) {
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ksft_print_msg("%s SVE VL %d Z%d non-zero\n",
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cfg->name, sve_vl, i);
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errors++;
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}
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} else {
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/*
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* For standard SVE the low 128 bits should be
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* preserved and any additional bits cleared.
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*/
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if (memcmp(in, out, SVE_Z_SHARED_BYTES) != 0) {
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ksft_print_msg("%s SVE VL %d Z%d low 128 bits changed\n",
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cfg->name, sve_vl, i);
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errors++;
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}
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if (reg_size > SVE_Z_SHARED_BYTES &&
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(memcmp(z_zero, out + SVE_Z_SHARED_BYTES,
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reg_size - SVE_Z_SHARED_BYTES) != 0)) {
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ksft_print_msg("%s SVE VL %d Z%d high bits non-zero\n",
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cfg->name, sve_vl, i);
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errors++;
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}
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}
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}
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return errors;
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}
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uint8_t p_in[SVE_NUM_PREGS * __SVE_PREG_SIZE(SVE_VQ_MAX)];
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uint8_t p_out[SVE_NUM_PREGS * __SVE_PREG_SIZE(SVE_VQ_MAX)];
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static void setup_p(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(p_in, sizeof(p_in));
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fill_random(p_out, sizeof(p_out));
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}
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static int check_p(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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size_t reg_size = sve_vq_from_vl(sve_vl) * 2; /* 1 bit per VL byte */
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int errors = 0;
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int i;
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if (!sve_vl)
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return 0;
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/* After a syscall the P registers should be zeroed */
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for (i = 0; i < SVE_NUM_PREGS * reg_size; i++)
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if (p_out[i])
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errors++;
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if (errors)
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ksft_print_msg("%s SVE VL %d predicate registers non-zero\n",
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cfg->name, sve_vl);
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return errors;
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}
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uint8_t ffr_in[__SVE_PREG_SIZE(SVE_VQ_MAX)];
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uint8_t ffr_out[__SVE_PREG_SIZE(SVE_VQ_MAX)];
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static void setup_ffr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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/*
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* If we are in streaming mode and do not have FA64 then FFR
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* is unavailable.
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*/
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if ((svcr & SVCR_SM_MASK) &&
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!(getauxval(AT_HWCAP2) & HWCAP2_SME_FA64)) {
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memset(&ffr_in, 0, sizeof(ffr_in));
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return;
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}
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/*
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* It is only valid to set a contiguous set of bits starting
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* at 0. For now since we're expecting this to be cleared by
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* a syscall just set all bits.
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*/
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memset(ffr_in, 0xff, sizeof(ffr_in));
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fill_random(ffr_out, sizeof(ffr_out));
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}
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static int check_ffr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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size_t reg_size = sve_vq_from_vl(sve_vl) * 2; /* 1 bit per VL byte */
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int errors = 0;
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int i;
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if (!sve_vl)
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return 0;
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if ((svcr & SVCR_SM_MASK) &&
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!(getauxval(AT_HWCAP2) & HWCAP2_SME_FA64))
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return 0;
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/* After a syscall FFR should be zeroed */
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for (i = 0; i < reg_size; i++)
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if (ffr_out[i])
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errors++;
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if (errors)
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ksft_print_msg("%s SVE VL %d FFR non-zero\n",
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cfg->name, sve_vl);
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return errors;
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}
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uint64_t svcr_in, svcr_out;
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static void setup_svcr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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svcr_in = svcr;
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}
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static int check_svcr(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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int errors = 0;
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if (svcr_out & SVCR_SM_MASK) {
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ksft_print_msg("%s Still in SM, SVCR %llx\n",
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cfg->name, svcr_out);
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errors++;
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}
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if ((svcr_in & SVCR_ZA_MASK) != (svcr_out & SVCR_ZA_MASK)) {
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ksft_print_msg("%s PSTATE.ZA changed, SVCR %llx != %llx\n",
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cfg->name, svcr_in, svcr_out);
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errors++;
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}
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return errors;
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}
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uint8_t za_in[ZA_SIG_REGS_SIZE(SVE_VQ_MAX)];
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uint8_t za_out[ZA_SIG_REGS_SIZE(SVE_VQ_MAX)];
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static void setup_za(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(za_in, sizeof(za_in));
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memset(za_out, 0, sizeof(za_out));
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}
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static int check_za(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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size_t reg_size = sme_vl * sme_vl;
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int errors = 0;
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if (!(svcr & SVCR_ZA_MASK))
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return 0;
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if (memcmp(za_in, za_out, reg_size) != 0) {
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ksft_print_msg("SME VL %d ZA does not match\n", sme_vl);
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errors++;
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}
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return errors;
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}
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uint8_t zt_in[ZT_SIG_REG_BYTES] __attribute__((aligned(16)));
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uint8_t zt_out[ZT_SIG_REG_BYTES] __attribute__((aligned(16)));
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static void setup_zt(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(zt_in, sizeof(zt_in));
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memset(zt_out, 0, sizeof(zt_out));
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}
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static int check_zt(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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int errors = 0;
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if (!(getauxval(AT_HWCAP2) & HWCAP2_SME2))
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return 0;
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if (!(svcr & SVCR_ZA_MASK))
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return 0;
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if (memcmp(zt_in, zt_out, sizeof(zt_in)) != 0) {
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ksft_print_msg("SME VL %d ZT does not match\n", sme_vl);
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errors++;
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}
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return errors;
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}
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typedef void (*setup_fn)(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr);
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typedef int (*check_fn)(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr);
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/*
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* Each set of registers has a setup function which is called before
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* the syscall to fill values in a global variable for loading by the
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* test code and a check function which validates that the results are
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* as expected. Vector lengths are passed everywhere, a vector length
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* of 0 should be treated as do not test.
|
||
|
|
*/
|
||
|
|
static struct {
|
||
|
|
setup_fn setup;
|
||
|
|
check_fn check;
|
||
|
|
} regset[] = {
|
||
|
|
{ setup_gpr, check_gpr },
|
||
|
|
{ setup_fpr, check_fpr },
|
||
|
|
{ setup_z, check_z },
|
||
|
|
{ setup_p, check_p },
|
||
|
|
{ setup_ffr, check_ffr },
|
||
|
|
{ setup_svcr, check_svcr },
|
||
|
|
{ setup_za, check_za },
|
||
|
|
{ setup_zt, check_zt },
|
||
|
|
};
|
||
|
|
|
||
|
|
static bool do_test(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
|
||
|
|
uint64_t svcr)
|
||
|
|
{
|
||
|
|
int errors = 0;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(regset); i++)
|
||
|
|
regset[i].setup(cfg, sve_vl, sme_vl, svcr);
|
||
|
|
|
||
|
|
do_syscall(sve_vl, sme_vl);
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(regset); i++)
|
||
|
|
errors += regset[i].check(cfg, sve_vl, sme_vl, svcr);
|
||
|
|
|
||
|
|
return errors == 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void test_one_syscall(struct syscall_cfg *cfg)
|
||
|
|
{
|
||
|
|
int sve, sme;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
/* FPSIMD only case */
|
||
|
|
ksft_test_result(do_test(cfg, 0, default_sme_vl, 0),
|
||
|
|
"%s FPSIMD\n", cfg->name);
|
||
|
|
|
||
|
|
for (sve = 0; sve < sve_vl_count; sve++) {
|
||
|
|
ret = prctl(PR_SVE_SET_VL, sve_vls[sve]);
|
||
|
|
if (ret == -1)
|
||
|
|
ksft_exit_fail_msg("PR_SVE_SET_VL failed: %s (%d)\n",
|
||
|
|
strerror(errno), errno);
|
||
|
|
|
||
|
|
ksft_test_result(do_test(cfg, sve_vls[sve], default_sme_vl, 0),
|
||
|
|
"%s SVE VL %d\n", cfg->name, sve_vls[sve]);
|
||
|
|
|
||
|
|
for (sme = 0; sme < sme_vl_count; sme++) {
|
||
|
|
ret = prctl(PR_SME_SET_VL, sme_vls[sme]);
|
||
|
|
if (ret == -1)
|
||
|
|
ksft_exit_fail_msg("PR_SME_SET_VL failed: %s (%d)\n",
|
||
|
|
strerror(errno), errno);
|
||
|
|
|
||
|
|
ksft_test_result(do_test(cfg, sve_vls[sve],
|
||
|
|
sme_vls[sme],
|
||
|
|
SVCR_ZA_MASK | SVCR_SM_MASK),
|
||
|
|
"%s SVE VL %d/SME VL %d SM+ZA\n",
|
||
|
|
cfg->name, sve_vls[sve],
|
||
|
|
sme_vls[sme]);
|
||
|
|
ksft_test_result(do_test(cfg, sve_vls[sve],
|
||
|
|
sme_vls[sme], SVCR_SM_MASK),
|
||
|
|
"%s SVE VL %d/SME VL %d SM\n",
|
||
|
|
cfg->name, sve_vls[sve],
|
||
|
|
sme_vls[sme]);
|
||
|
|
ksft_test_result(do_test(cfg, sve_vls[sve],
|
||
|
|
sme_vls[sme], SVCR_ZA_MASK),
|
||
|
|
"%s SVE VL %d/SME VL %d ZA\n",
|
||
|
|
cfg->name, sve_vls[sve],
|
||
|
|
sme_vls[sme]);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
for (sme = 0; sme < sme_vl_count; sme++) {
|
||
|
|
ret = prctl(PR_SME_SET_VL, sme_vls[sme]);
|
||
|
|
if (ret == -1)
|
||
|
|
ksft_exit_fail_msg("PR_SME_SET_VL failed: %s (%d)\n",
|
||
|
|
strerror(errno), errno);
|
||
|
|
|
||
|
|
ksft_test_result(do_test(cfg, 0, sme_vls[sme],
|
||
|
|
SVCR_ZA_MASK | SVCR_SM_MASK),
|
||
|
|
"%s SME VL %d SM+ZA\n",
|
||
|
|
cfg->name, sme_vls[sme]);
|
||
|
|
ksft_test_result(do_test(cfg, 0, sme_vls[sme], SVCR_SM_MASK),
|
||
|
|
"%s SME VL %d SM\n",
|
||
|
|
cfg->name, sme_vls[sme]);
|
||
|
|
ksft_test_result(do_test(cfg, 0, sme_vls[sme], SVCR_ZA_MASK),
|
||
|
|
"%s SME VL %d ZA\n",
|
||
|
|
cfg->name, sme_vls[sme]);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void sve_count_vls(void)
|
||
|
|
{
|
||
|
|
unsigned int vq;
|
||
|
|
int vl;
|
||
|
|
|
||
|
|
if (!(getauxval(AT_HWCAP) & HWCAP_SVE))
|
||
|
|
return;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Enumerate up to SVE_VQ_MAX vector lengths
|
||
|
|
*/
|
||
|
|
for (vq = SVE_VQ_MAX; vq > 0; vq /= 2) {
|
||
|
|
vl = prctl(PR_SVE_SET_VL, vq * 16);
|
||
|
|
if (vl == -1)
|
||
|
|
ksft_exit_fail_msg("PR_SVE_SET_VL failed: %s (%d)\n",
|
||
|
|
strerror(errno), errno);
|
||
|
|
|
||
|
|
vl &= PR_SVE_VL_LEN_MASK;
|
||
|
|
|
||
|
|
if (vq != sve_vq_from_vl(vl))
|
||
|
|
vq = sve_vq_from_vl(vl);
|
||
|
|
|
||
|
|
sve_vls[sve_vl_count++] = vl;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void sme_count_vls(void)
|
||
|
|
{
|
||
|
|
unsigned int vq;
|
||
|
|
int vl;
|
||
|
|
|
||
|
|
if (!(getauxval(AT_HWCAP2) & HWCAP2_SME))
|
||
|
|
return;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Enumerate up to SVE_VQ_MAX vector lengths
|
||
|
|
*/
|
||
|
|
for (vq = SVE_VQ_MAX; vq > 0; vq /= 2) {
|
||
|
|
vl = prctl(PR_SME_SET_VL, vq * 16);
|
||
|
|
if (vl == -1)
|
||
|
|
ksft_exit_fail_msg("PR_SME_SET_VL failed: %s (%d)\n",
|
||
|
|
strerror(errno), errno);
|
||
|
|
|
||
|
|
vl &= PR_SME_VL_LEN_MASK;
|
||
|
|
|
||
|
|
/* Found lowest VL */
|
||
|
|
if (sve_vq_from_vl(vl) > vq)
|
||
|
|
break;
|
||
|
|
|
||
|
|
if (vq != sve_vq_from_vl(vl))
|
||
|
|
vq = sve_vq_from_vl(vl);
|
||
|
|
|
||
|
|
sme_vls[sme_vl_count++] = vl;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Ensure we configure a SME VL, used to flag if SVCR is set */
|
||
|
|
default_sme_vl = sme_vls[0];
|
||
|
|
}
|
||
|
|
|
||
|
|
int main(void)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
int tests = 1; /* FPSIMD */
|
||
|
|
int sme_ver;
|
||
|
|
|
||
|
|
srandom(getpid());
|
||
|
|
|
||
|
|
ksft_print_header();
|
||
|
|
|
||
|
|
sve_count_vls();
|
||
|
|
sme_count_vls();
|
||
|
|
|
||
|
|
tests += sve_vl_count;
|
||
|
|
tests += sme_vl_count * 3;
|
||
|
|
tests += (sve_vl_count * sme_vl_count) * 3;
|
||
|
|
ksft_set_plan(ARRAY_SIZE(syscalls) * tests);
|
||
|
|
|
||
|
|
if (getauxval(AT_HWCAP2) & HWCAP2_SME2)
|
||
|
|
sme_ver = 2;
|
||
|
|
else
|
||
|
|
sme_ver = 1;
|
||
|
|
|
||
|
|
if (getauxval(AT_HWCAP2) & HWCAP2_SME_FA64)
|
||
|
|
ksft_print_msg("SME%d with FA64\n", sme_ver);
|
||
|
|
else if (getauxval(AT_HWCAP2) & HWCAP2_SME)
|
||
|
|
ksft_print_msg("SME%d without FA64\n", sme_ver);
|
||
|
|
|
||
|
|
for (i = 0; i < ARRAY_SIZE(syscalls); i++)
|
||
|
|
test_one_syscall(&syscalls[i]);
|
||
|
|
|
||
|
|
ksft_print_cnts();
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|