102 lines
2.2 KiB
ArmAsm
102 lines
2.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* vlock.S - simple voting lock implementation for ARM
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*
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* Created by: Dave Martin, 2012-08-16
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This algorithm is described in more detail in
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* Documentation/arm/vlocks.rst.
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*/
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#include <linux/linkage.h>
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#include "vlock.h"
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.arch armv7-a
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/* Select different code if voting flags can fit in a single word. */
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#if VLOCK_VOTING_SIZE > 4
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#define FEW(x...)
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#define MANY(x...) x
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#else
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#define FEW(x...) x
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#define MANY(x...)
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#endif
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@ voting lock for first-man coordination
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.macro voting_begin rbase:req, rcpu:req, rscratch:req
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mov \rscratch, #1
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strb \rscratch, [\rbase, \rcpu]
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dmb
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.endm
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.macro voting_end rbase:req, rcpu:req, rscratch:req
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dmb
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mov \rscratch, #0
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strb \rscratch, [\rbase, \rcpu]
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dsb st
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sev
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.endm
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/*
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* The vlock structure must reside in Strongly-Ordered or Device memory.
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* This implementation deliberately eliminates most of the barriers which
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* would be required for other memory types, and assumes that independent
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* writes to neighbouring locations within a cacheline do not interfere
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* with one another.
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*/
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@ r0: lock structure base
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@ r1: CPU ID (0-based index within cluster)
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ENTRY(vlock_trylock)
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add r1, r1, #VLOCK_VOTING_OFFSET
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voting_begin r0, r1, r2
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ldrb r2, [r0, #VLOCK_OWNER_OFFSET] @ check whether lock is held
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cmp r2, #VLOCK_OWNER_NONE
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bne trylock_fail @ fail if so
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@ Control dependency implies strb not observable before previous ldrb.
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strb r1, [r0, #VLOCK_OWNER_OFFSET] @ submit my vote
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voting_end r0, r1, r2 @ implies DMB
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@ Wait for the current round of voting to finish:
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MANY( mov r3, #VLOCK_VOTING_OFFSET )
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0:
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MANY( ldr r2, [r0, r3] )
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FEW( ldr r2, [r0, #VLOCK_VOTING_OFFSET] )
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cmp r2, #0
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wfene
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bne 0b
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MANY( add r3, r3, #4 )
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MANY( cmp r3, #VLOCK_VOTING_OFFSET + VLOCK_VOTING_SIZE )
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MANY( bne 0b )
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@ Check who won:
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dmb
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ldrb r2, [r0, #VLOCK_OWNER_OFFSET]
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eor r0, r1, r2 @ zero if I won, else nonzero
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bx lr
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trylock_fail:
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voting_end r0, r1, r2
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mov r0, #1 @ nonzero indicates that I lost
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bx lr
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ENDPROC(vlock_trylock)
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@ r0: lock structure base
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ENTRY(vlock_unlock)
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dmb
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mov r1, #VLOCK_OWNER_NONE
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strb r1, [r0, #VLOCK_OWNER_OFFSET]
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dsb st
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sev
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bx lr
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ENDPROC(vlock_unlock)
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