255 lines
6.1 KiB
C
255 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mach-pxa/pxa25x.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code specific to PXA21x/25x/26x variants.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/dmaengine.h>
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#include <linux/dma/pxa-dma.h>
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#include <linux/gpio.h>
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#include <linux/gpio-pxa.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/suspend.h>
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#include <linux/syscore_ops.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/platform_data/mmp_dma.h>
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#include <linux/soc/pxa/cpu.h>
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#include <asm/mach/map.h>
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#include <asm/suspend.h>
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#include "irqs.h"
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#include "pxa25x.h"
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#include "reset.h"
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#include "pm.h"
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#include "addr-map.h"
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#include "smemc.h"
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#include "generic.h"
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#include "devices.h"
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/*
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* Various clock factors driven by the CCCR register.
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*/
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#ifdef CONFIG_PM
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#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
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#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
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/*
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* List of global PXA peripheral registers to preserve.
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* More ones like CP and general purpose register values are preserved
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* with the stack pointer in sleep.S.
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*/
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enum {
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SLEEP_SAVE_PSTR,
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SLEEP_SAVE_COUNT
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};
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static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
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{
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SAVE(PSTR);
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}
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static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
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{
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RESTORE(PSTR);
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}
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static void pxa25x_cpu_pm_enter(suspend_state_t state)
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{
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/* Clear reset status */
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RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
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switch (state) {
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case PM_SUSPEND_MEM:
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cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
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break;
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}
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}
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static int pxa25x_cpu_pm_prepare(void)
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{
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/* set resume return address */
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PSPR = __pa_symbol(cpu_resume);
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return 0;
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}
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static void pxa25x_cpu_pm_finish(void)
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{
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/* ensure not to come back here if it wasn't intended */
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PSPR = 0;
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}
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static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
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.save_count = SLEEP_SAVE_COUNT,
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.valid = suspend_valid_only_mem,
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.save = pxa25x_cpu_pm_save,
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.restore = pxa25x_cpu_pm_restore,
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.enter = pxa25x_cpu_pm_enter,
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.prepare = pxa25x_cpu_pm_prepare,
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.finish = pxa25x_cpu_pm_finish,
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};
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static void __init pxa25x_init_pm(void)
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{
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pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
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}
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#else
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static inline void pxa25x_init_pm(void) {}
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#endif
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/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
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*/
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static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
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{
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int gpio = pxa_irq_to_gpio(d->irq);
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uint32_t mask = 0;
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if (gpio >= 0 && gpio < 85)
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return gpio_set_wake(gpio, on);
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if (d->irq == IRQ_RTCAlrm) {
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mask = PWER_RTC;
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goto set_pwer;
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}
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return -EINVAL;
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set_pwer:
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if (on)
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PWER |= mask;
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else
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PWER &=~mask;
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return 0;
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}
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void __init pxa25x_init_irq(void)
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{
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pxa_init_irq(32, pxa25x_set_wake);
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}
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static int __init __init
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pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
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{
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pxa_dt_irq_init(pxa25x_set_wake);
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set_handle_irq(icip_handle_irq);
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return 0;
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}
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IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
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static struct map_desc pxa25x_io_desc[] __initdata = {
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{ /* Mem Ctl */
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.virtual = (unsigned long)SMEMC_VIRT,
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.pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
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.length = SMEMC_SIZE,
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.type = MT_DEVICE
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}, { /* UNCACHED_PHYS_0 */
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.virtual = UNCACHED_PHYS_0,
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.pfn = __phys_to_pfn(0x00000000),
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.length = UNCACHED_PHYS_0_SIZE,
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.type = MT_DEVICE
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},
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};
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void __init pxa25x_map_io(void)
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{
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pxa_map_io();
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iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
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pxa25x_get_clk_frequency_khz(1);
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}
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static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
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.irq_base = PXA_GPIO_TO_IRQ(0),
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.gpio_set_wake = gpio_set_wake,
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};
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static struct platform_device *pxa25x_devices[] __initdata = {
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&pxa25x_device_udc,
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&pxa_device_pmu,
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&pxa_device_i2s,
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&sa1100_device_rtc,
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&pxa25x_device_ssp,
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&pxa25x_device_nssp,
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&pxa25x_device_assp,
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&pxa25x_device_pwm0,
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&pxa25x_device_pwm1,
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&pxa_device_asoc_platform,
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};
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static const struct dma_slave_map pxa25x_slave_map[] = {
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/* PXA25x, PXA27x and PXA3xx common entries */
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{ "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
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{ "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
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{ "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
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PDMA_FILTER_PARAM(LOWEST, 10) },
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{ "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
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{ "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
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{ "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
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{ "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
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{ "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
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{ "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
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{ "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
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{ "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
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{ "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
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{ "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
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/* PXA25x specific map */
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{ "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
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{ "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
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{ "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
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{ "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
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{ "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
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{ "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
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};
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static struct mmp_dma_platdata pxa25x_dma_pdata = {
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.dma_channels = 16,
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.nb_requestors = 40,
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.slave_map = pxa25x_slave_map,
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.slave_map_cnt = ARRAY_SIZE(pxa25x_slave_map),
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};
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static int __init pxa25x_init(void)
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{
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int ret = 0;
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if (cpu_is_pxa25x()) {
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pxa_register_wdt(RCSR);
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pxa25x_init_pm();
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register_syscore_ops(&pxa_irq_syscore_ops);
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register_syscore_ops(&pxa2xx_mfp_syscore_ops);
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if (!of_have_populated_dt()) {
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pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
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pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
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ret = platform_add_devices(pxa25x_devices,
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ARRAY_SIZE(pxa25x_devices));
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}
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}
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return ret;
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}
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postcore_initcall(pxa25x_init);
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