480 lines
11 KiB
C
480 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Debug helper to dump the current kernel pagetables of the system
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* so that we can see what the various memory ranges are set to.
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*
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* Derived from x86 implementation:
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* (C) Copyright 2008 Intel Corporation
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*
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* Author: Arjan van de Ven <arjan@linux.intel.com>
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*/
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/seq_file.h>
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#include <asm/domain.h>
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#include <asm/fixmap.h>
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#include <asm/memory.h>
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#include <asm/ptdump.h>
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static struct addr_marker address_markers[] = {
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#ifdef CONFIG_KASAN
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{ KASAN_SHADOW_START, "Kasan shadow start"},
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{ KASAN_SHADOW_END, "Kasan shadow end"},
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#endif
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{ MODULES_VADDR, "Modules" },
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{ PAGE_OFFSET, "Kernel Mapping" },
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{ 0, "vmalloc() Area" },
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{ FDT_FIXED_BASE, "FDT Area" },
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{ FIXADDR_START, "Fixmap Area" },
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{ VECTORS_BASE, "Vectors" },
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{ VECTORS_BASE + PAGE_SIZE * 2, "Vectors End" },
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{ -1, NULL },
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};
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#define pt_dump_seq_printf(m, fmt, args...) \
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({ \
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if (m) \
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seq_printf(m, fmt, ##args); \
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})
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#define pt_dump_seq_puts(m, fmt) \
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({ \
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if (m) \
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seq_printf(m, fmt); \
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})
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struct pg_state {
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struct seq_file *seq;
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const struct addr_marker *marker;
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unsigned long start_address;
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unsigned level;
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u64 current_prot;
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bool check_wx;
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unsigned long wx_pages;
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const char *current_domain;
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};
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struct prot_bits {
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u64 mask;
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u64 val;
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const char *set;
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const char *clear;
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bool ro_bit;
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bool nx_bit;
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};
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static const struct prot_bits pte_bits[] = {
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{
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.mask = L_PTE_USER,
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.val = L_PTE_USER,
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.set = "USR",
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.clear = " ",
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}, {
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.mask = L_PTE_RDONLY,
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.val = L_PTE_RDONLY,
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.set = "ro",
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.clear = "RW",
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.ro_bit = true,
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}, {
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.mask = L_PTE_XN,
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.val = L_PTE_XN,
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.set = "NX",
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.clear = "x ",
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.nx_bit = true,
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}, {
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.mask = L_PTE_SHARED,
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.val = L_PTE_SHARED,
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.set = "SHD",
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.clear = " ",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_UNCACHED,
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.set = "SO/UNCACHED",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_BUFFERABLE,
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.set = "MEM/BUFFERABLE/WC",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_WRITETHROUGH,
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.set = "MEM/CACHED/WT",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_WRITEBACK,
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.set = "MEM/CACHED/WBRA",
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#ifndef CONFIG_ARM_LPAE
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_MINICACHE,
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.set = "MEM/MINICACHE",
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#endif
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_WRITEALLOC,
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.set = "MEM/CACHED/WBWA",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_DEV_SHARED,
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.set = "DEV/SHARED",
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#ifndef CONFIG_ARM_LPAE
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_DEV_NONSHARED,
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.set = "DEV/NONSHARED",
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#endif
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_DEV_WC,
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.set = "DEV/WC",
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}, {
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.mask = L_PTE_MT_MASK,
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.val = L_PTE_MT_DEV_CACHED,
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.set = "DEV/CACHED",
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},
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};
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static const struct prot_bits section_bits[] = {
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#ifdef CONFIG_ARM_LPAE
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{
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.mask = PMD_SECT_USER,
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.val = PMD_SECT_USER,
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.set = "USR",
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}, {
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.mask = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
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.val = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
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.set = "ro",
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.clear = "RW",
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.ro_bit = true,
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#elif __LINUX_ARM_ARCH__ >= 6
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{
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.mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_APX | PMD_SECT_AP_WRITE,
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.set = " ro",
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.ro_bit = true,
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}, {
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.mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_WRITE,
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.set = " RW",
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}, {
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.mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_READ,
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.set = "USR ro",
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}, {
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.mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.set = "USR RW",
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#else /* ARMv4/ARMv5 */
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/* These are approximate */
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{
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.mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = 0,
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.set = " ro",
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.ro_bit = true,
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}, {
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.mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_WRITE,
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.set = " RW",
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}, {
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.mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_READ,
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.set = "USR ro",
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}, {
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.mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
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.set = "USR RW",
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#endif
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}, {
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.mask = PMD_SECT_XN,
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.val = PMD_SECT_XN,
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.set = "NX",
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.clear = "x ",
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.nx_bit = true,
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}, {
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.mask = PMD_SECT_S,
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.val = PMD_SECT_S,
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.set = "SHD",
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.clear = " ",
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},
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};
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struct pg_level {
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const char *name;
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const struct prot_bits *bits;
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size_t num;
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u64 mask;
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const struct prot_bits *ro_bit;
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const struct prot_bits *nx_bit;
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};
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static struct pg_level pg_level[] = {
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{
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}, { /* pgd */
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}, { /* p4d */
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}, { /* pud */
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}, { /* pmd */
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.name = (CONFIG_PGTABLE_LEVELS > 2) ? "PMD" : "PGD",
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.bits = section_bits,
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.num = ARRAY_SIZE(section_bits),
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}, { /* pte */
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.name = "PTE",
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.bits = pte_bits,
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.num = ARRAY_SIZE(pte_bits),
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},
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};
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static void dump_prot(struct pg_state *st, const struct prot_bits *bits, size_t num)
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{
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unsigned i;
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for (i = 0; i < num; i++, bits++) {
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const char *s;
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if ((st->current_prot & bits->mask) == bits->val)
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s = bits->set;
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else
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s = bits->clear;
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if (s)
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pt_dump_seq_printf(st->seq, " %s", s);
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}
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}
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static void note_prot_wx(struct pg_state *st, unsigned long addr)
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{
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if (!st->check_wx)
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return;
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if ((st->current_prot & pg_level[st->level].ro_bit->mask) ==
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pg_level[st->level].ro_bit->val)
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return;
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if ((st->current_prot & pg_level[st->level].nx_bit->mask) ==
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pg_level[st->level].nx_bit->val)
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return;
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WARN_ONCE(1, "arm/mm: Found insecure W+X mapping at address %pS\n",
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(void *)st->start_address);
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st->wx_pages += (addr - st->start_address) / PAGE_SIZE;
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}
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static void note_page(struct pg_state *st, unsigned long addr,
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unsigned int level, u64 val, const char *domain)
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{
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static const char units[] = "KMGTPE";
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u64 prot = val & pg_level[level].mask;
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if (!st->level) {
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st->level = level;
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st->current_prot = prot;
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st->current_domain = domain;
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pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name);
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} else if (prot != st->current_prot || level != st->level ||
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domain != st->current_domain ||
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addr >= st->marker[1].start_address) {
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const char *unit = units;
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unsigned long delta;
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if (st->current_prot) {
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note_prot_wx(st, addr);
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pt_dump_seq_printf(st->seq, "0x%08lx-0x%08lx ",
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st->start_address, addr);
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delta = (addr - st->start_address) >> 10;
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while (!(delta & 1023) && unit[1]) {
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delta >>= 10;
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unit++;
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}
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pt_dump_seq_printf(st->seq, "%9lu%c %s", delta, *unit,
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pg_level[st->level].name);
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if (st->current_domain)
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pt_dump_seq_printf(st->seq, " %s",
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st->current_domain);
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if (pg_level[st->level].bits)
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dump_prot(st, pg_level[st->level].bits, pg_level[st->level].num);
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pt_dump_seq_printf(st->seq, "\n");
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}
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if (addr >= st->marker[1].start_address) {
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st->marker++;
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pt_dump_seq_printf(st->seq, "---[ %s ]---\n",
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st->marker->name);
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}
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st->start_address = addr;
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st->current_prot = prot;
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st->current_domain = domain;
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st->level = level;
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}
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}
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static void walk_pte(struct pg_state *st, pmd_t *pmd, unsigned long start,
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const char *domain)
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{
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pte_t *pte = pte_offset_kernel(pmd, 0);
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unsigned long addr;
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unsigned i;
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for (i = 0; i < PTRS_PER_PTE; i++, pte++) {
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addr = start + i * PAGE_SIZE;
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note_page(st, addr, 5, pte_val(*pte), domain);
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}
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}
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static const char *get_domain_name(pmd_t *pmd)
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{
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#ifndef CONFIG_ARM_LPAE
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switch (pmd_val(*pmd) & PMD_DOMAIN_MASK) {
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case PMD_DOMAIN(DOMAIN_KERNEL):
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return "KERNEL ";
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case PMD_DOMAIN(DOMAIN_USER):
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return "USER ";
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case PMD_DOMAIN(DOMAIN_IO):
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return "IO ";
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case PMD_DOMAIN(DOMAIN_VECTORS):
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return "VECTORS";
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default:
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return "unknown";
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}
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#endif
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return NULL;
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}
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static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
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{
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pmd_t *pmd = pmd_offset(pud, 0);
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unsigned long addr;
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unsigned i;
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const char *domain;
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for (i = 0; i < PTRS_PER_PMD; i++, pmd++) {
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addr = start + i * PMD_SIZE;
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domain = get_domain_name(pmd);
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if (pmd_none(*pmd) || pmd_large(*pmd) || !pmd_present(*pmd))
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note_page(st, addr, 4, pmd_val(*pmd), domain);
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else
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walk_pte(st, pmd, addr, domain);
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if (SECTION_SIZE < PMD_SIZE && pmd_large(pmd[1])) {
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addr += SECTION_SIZE;
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pmd++;
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domain = get_domain_name(pmd);
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note_page(st, addr, 4, pmd_val(*pmd), domain);
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}
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}
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}
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static void walk_pud(struct pg_state *st, p4d_t *p4d, unsigned long start)
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{
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pud_t *pud = pud_offset(p4d, 0);
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unsigned long addr;
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unsigned i;
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for (i = 0; i < PTRS_PER_PUD; i++, pud++) {
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addr = start + i * PUD_SIZE;
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if (!pud_none(*pud)) {
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walk_pmd(st, pud, addr);
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} else {
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note_page(st, addr, 3, pud_val(*pud), NULL);
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}
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}
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}
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static void walk_p4d(struct pg_state *st, pgd_t *pgd, unsigned long start)
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{
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p4d_t *p4d = p4d_offset(pgd, 0);
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unsigned long addr;
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unsigned i;
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for (i = 0; i < PTRS_PER_P4D; i++, p4d++) {
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addr = start + i * P4D_SIZE;
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if (!p4d_none(*p4d)) {
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walk_pud(st, p4d, addr);
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} else {
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note_page(st, addr, 2, p4d_val(*p4d), NULL);
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}
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}
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}
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static void walk_pgd(struct pg_state *st, struct mm_struct *mm,
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unsigned long start)
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{
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pgd_t *pgd = pgd_offset(mm, 0UL);
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unsigned i;
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unsigned long addr;
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for (i = 0; i < PTRS_PER_PGD; i++, pgd++) {
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addr = start + i * PGDIR_SIZE;
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if (!pgd_none(*pgd)) {
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walk_p4d(st, pgd, addr);
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} else {
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note_page(st, addr, 1, pgd_val(*pgd), NULL);
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}
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}
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}
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void ptdump_walk_pgd(struct seq_file *m, struct ptdump_info *info)
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{
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struct pg_state st = {
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.seq = m,
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.marker = info->markers,
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.check_wx = false,
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};
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walk_pgd(&st, info->mm, info->base_addr);
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note_page(&st, 0, 0, 0, NULL);
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}
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static void __init ptdump_initialize(void)
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{
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unsigned i, j;
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for (i = 0; i < ARRAY_SIZE(pg_level); i++)
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if (pg_level[i].bits)
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for (j = 0; j < pg_level[i].num; j++) {
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pg_level[i].mask |= pg_level[i].bits[j].mask;
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if (pg_level[i].bits[j].ro_bit)
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pg_level[i].ro_bit = &pg_level[i].bits[j];
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if (pg_level[i].bits[j].nx_bit)
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pg_level[i].nx_bit = &pg_level[i].bits[j];
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}
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#ifdef CONFIG_KASAN
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address_markers[4].start_address = VMALLOC_START;
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#else
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address_markers[2].start_address = VMALLOC_START;
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#endif
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}
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static struct ptdump_info kernel_ptdump_info = {
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.mm = &init_mm,
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.markers = address_markers,
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.base_addr = 0,
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};
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void ptdump_check_wx(void)
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{
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struct pg_state st = {
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.seq = NULL,
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.marker = (struct addr_marker[]) {
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{ 0, NULL},
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{ -1, NULL},
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},
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.check_wx = true,
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};
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walk_pgd(&st, &init_mm, 0);
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note_page(&st, 0, 0, 0, NULL);
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if (st.wx_pages)
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pr_warn("Checked W+X mappings: FAILED, %lu W+X pages found\n",
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st.wx_pages);
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else
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pr_info("Checked W+X mappings: passed, no W+X pages found\n");
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}
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static int __init ptdump_init(void)
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{
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ptdump_initialize();
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ptdump_debugfs_register(&kernel_ptdump_info, "kernel_page_tables");
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return 0;
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}
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__initcall(ptdump_init);
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