427 lines
9.7 KiB
Plaintext
427 lines
9.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 Collabora Ltd.
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* Copyright 2021 BSH Hausgeraete GmbH
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*/
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/dts-v1/;
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#include "imx8mn.dtsi"
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/ {
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chosen {
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stdout-path = &uart4;
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};
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fec_supply: fec-supply-en {
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compatible = "regulator-fixed";
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vin-supply = <&buck4_reg>;
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regulator-name = "tja1101_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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usdhc2_pwrseq: usdhc2-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
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reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_1 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_2 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_3 {
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cpu-supply = <&buck2_reg>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_espi2>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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phy-supply = <&fec_supply>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
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reset-assert-us = <20>;
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reset-deassert-us = <2000>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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bd71847: pmic@4b {
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compatible = "rohm,bd71847";
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reg = <0x4b>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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rohm,reset-snvs-powered;
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#clock-cells = <0>;
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clocks = <&osc_32k 0>;
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clock-output-names = "clk-32k-out";
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regulators {
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buck1_reg: BUCK1 {
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/* PMIC_BUCK1 - VDD_SOC */
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regulator-name = "buck1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck2_reg: BUCK2 {
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/* PMIC_BUCK2 - VDD_ARM */
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regulator-name = "buck2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck3_reg: BUCK3 {
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/* PMIC_BUCK5 - VDD_DRAM_VPU_GPU */
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regulator-name = "buck3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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/* PMIC_BUCK6 - VDD_3V3 */
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regulator-name = "buck4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5_reg: BUCK5 {
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/* PMIC_BUCK7 - VDD_1V8 */
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regulator-name = "buck5";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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/* PMIC_BUCK8 - NVCC_DRAM */
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regulator-name = "buck6";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: LDO1 {
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/* PMIC_LDO1 - NVCC_SNVS_1V8 */
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regulator-name = "ldo1";
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regulator-min-microvolt = <1600000>;
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regulator-max-microvolt = <1900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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/* PMIC_LDO2 - VDD_SNVS_0V8 */
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regulator-name = "ldo2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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/* PMIC_LDO3 - VDDA_1V8 */
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regulator-name = "ldo3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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/* PMIC_LDO4 - VDD_MIPI_0V9 */
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regulator-name = "ldo4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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/* PMIC_LDO6 - VDD_MIPI_1V2 */
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regulator-name = "ldo6";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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assigned-clocks = <&clk IMX8MN_CLK_UART3>;
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assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_bluetooth>;
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shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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max-speed = <3000000>;
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};
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};
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/* Console */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "peripheral";
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disable-over-current;
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status = "okay";
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};
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&usdhc2 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
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mmc-pwrseq = <&usdhc2_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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brcmf: bcrmf@1 {
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compatible = "brcm,bcm4329-fmac";
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reg = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wlan>;
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interrupt-parent = <&gpio1>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host-wake";
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};
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_bluetooth: bluetoothgrp {
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fsl,pins = <
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MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x044 /* BT_REG_ON */
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MX8MN_IOMUXC_ENET_TD3_GPIO1_IO18 0x046 /* BT_DEV_WAKE */
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MX8MN_IOMUXC_ENET_RD2_GPIO1_IO28 0x090 /* BT_HOST_WAKE */
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>;
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};
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pinctrl_espi2: espi2grp {
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fsl,pins = <
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MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x082
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MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x082
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MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x082
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MX8MN_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x040
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x002
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MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x002
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MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x090
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MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x090
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MX8MN_IOMUXC_ENET_RXC_ENET1_RX_ER 0x090
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MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x016
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MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x016
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MX8MN_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x016
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MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x016
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MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x090
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MX8MN_IOMUXC_ENET_TXC_ENET1_TX_ER 0x016
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MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x150 /* RMII_INT - ENET_INT */
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MX8MN_IOMUXC_SD2_WP_GPIO2_IO20 0x150 /* RMII_EN - ENET_EN */
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MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x016 /* RMII_WAKE - GPIO_ENET_WAKE */
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MX8MN_IOMUXC_ENET_RD3_GPIO1_IO29 0x016 /* RMII_RESET - GPIO_ENET_RST */
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c2
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MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c2
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c2
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MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c2
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400000c2
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MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400000c2
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>;
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};
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pinctrl_pmic: pmicirq {
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fsl,pins = <
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MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x040
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x040
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MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x040
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x040
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MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x040
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MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x040
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MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x040
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
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MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x090
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MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d0
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MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d0
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MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d0
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MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d0
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MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d0
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
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fsl,pins = <
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MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x094
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MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d4
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MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d4
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MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d4
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MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d4
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MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d4
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
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fsl,pins = <
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MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x096
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MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x0d6
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MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0d6
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MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0d6
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MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0d6
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MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0d6
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>;
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};
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pinctrl_usdhc2_pwrseq: usdhc2pwrseqgrp {
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fsl,pins = <
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MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x040 /* WL_REG_ON */
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x046
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>;
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};
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pinctrl_wlan: wlangrp {
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fsl,pins = <
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MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x0d6 /* GPIO_0 - WIFI_GPIO_0 */
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MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x0d6 /* GPIO_1 - WIFI_GPIO_1 */
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MX8MN_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x0d6 /* BT_GPIO_5 - WIFI_GPIO_5 */
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MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x0d6 /* I2S_CLK - WIFI_GPIO_6 */
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>;
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};
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};
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