265 lines
5.9 KiB
Plaintext
265 lines
5.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
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*/
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/dts-v1/;
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#include "dt-bindings/usb/pd.h"
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#include "imx8mq-sr-som.dtsi"
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/ {
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model = "SolidRun i.MX8MQ HummingBoard Pulse";
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compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
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chosen {
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stdout-path = &uart1;
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};
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reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
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};
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reg_v_5v0: regulator-v-5v0 {
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compatible = "regulator-fixed";
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regulator-name = "v_5v0";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-always-on;
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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clock-frequency = <100000>;
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status = "okay";
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typec_ptn5100: usb-typec@50 {
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compatible = "nxp,ptn5110";
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reg = <0x50>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec>;
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interrupt-parent = <&gpio1>;
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interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 2000,
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PDO_FIXED_USB_COMM |
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PDO_FIXED_SUSPEND |
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PDO_FIXED_EXTPOWER)>;
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sink-pdos = <PDO_FIXED(5000, 2000,
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PDO_FIXED_USB_COMM |
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PDO_FIXED_SUSPEND |
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PDO_FIXED_EXTPOWER)
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PDO_FIXED(9000, 2000,
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PDO_FIXED_USB_COMM |
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PDO_FIXED_SUSPEND |
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PDO_FIXED_EXTPOWER)>;
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op-sink-microwatt = <9000000>;
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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};
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};
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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clock-frequency = <100000>;
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status = "okay";
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eeprom@57 {
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compatible = "atmel,24c02";
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reg = <0x57>;
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status = "okay";
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};
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rtc@69 {
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compatible = "abracon,ab1805";
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reg = <0x69>;
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abracon,tc-diode = "schottky";
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abracon,tc-resistor = <3>;
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};
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};
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&uart2 { /* J35 header */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
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assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
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status = "okay";
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};
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&uart3 { /* Mikrobus */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
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assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
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uart-has-rtscts;
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status = "okay";
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_usdhc2_vmmc>;
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status = "okay";
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};
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&usb_dwc3_0 {
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dr_mode = "otg";
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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status = "okay";
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};
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&usb3_phy0 {
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status = "okay";
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};
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&usb3_phy1 {
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_hog: hoggrp {
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fsl,pins = <
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/* MikroBus Analog */
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MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x41
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/* MikroBus Reset */
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MX8MQ_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x41
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/*
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* The following 2 pins need to be commented out and
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* reconfigured to enable RTS/CTS on UART3
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*/
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/* MikroBus PWM */
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MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x41
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/* MikroBus INT */
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MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
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MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
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MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
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>;
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};
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pinctrl_typec: typecgrp {
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fsl,pins = <
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MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16
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MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x17059
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
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MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
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MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
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/*
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* These pins are by default GPIO on the Mikro Bus
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* Header. To use RTS/CTS on UART3 comment them out
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* of the hoggrp and enable them here
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*/
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/* MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x49 */
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/* MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x49 */
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2gpiogrp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
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>;
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};
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pinctrl_usdhc2_vmmc: usdhc2vmmcgpiogrp {
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fsl,pins = <
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MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
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MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
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MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
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MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
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MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
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MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
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MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
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MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
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MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
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MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
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MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
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MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
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MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
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MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xdf
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MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xdf
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MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xdf
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MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xdf
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MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xdf
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MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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>;
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};
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};
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