515 lines
16 KiB
ArmAsm
515 lines
16 KiB
ArmAsm
//
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// Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
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//
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// Copyright (C) 2016 Linaro Ltd <ard.biesheuvel@linaro.org>
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// Copyright (C) 2019 Google LLC <ebiggers@google.com>
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License version 2 as
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// published by the Free Software Foundation.
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//
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// Derived from the x86 version:
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//
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// Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
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//
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// Copyright (c) 2013, Intel Corporation
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//
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// Authors:
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// Erdinc Ozturk <erdinc.ozturk@intel.com>
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// Vinodh Gopal <vinodh.gopal@intel.com>
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// James Guilford <james.guilford@intel.com>
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// Tim Chen <tim.c.chen@linux.intel.com>
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//
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// This software is available to you under a choice of one of two
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// licenses. You may choose to be licensed under the terms of the GNU
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// General Public License (GPL) Version 2, available from the file
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// COPYING in the main directory of this source tree, or the
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// OpenIB.org BSD license below:
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// * Neither the name of the Intel Corporation nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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//
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// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY
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// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Reference paper titled "Fast CRC Computation for Generic
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// Polynomials Using PCLMULQDQ Instruction"
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// URL: http://www.intel.com/content/dam/www/public/us/en/documents
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// /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
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//
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.text
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.arch armv8-a+crypto
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init_crc .req w0
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buf .req x1
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len .req x2
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fold_consts_ptr .req x3
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fold_consts .req v10
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ad .req v14
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k00_16 .req v15
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k32_48 .req v16
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t3 .req v17
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t4 .req v18
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t5 .req v19
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t6 .req v20
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t7 .req v21
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t8 .req v22
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t9 .req v23
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perm1 .req v24
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perm2 .req v25
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perm3 .req v26
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perm4 .req v27
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bd1 .req v28
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bd2 .req v29
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bd3 .req v30
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bd4 .req v31
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.macro __pmull_init_p64
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.endm
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.macro __pmull_pre_p64, bd
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.endm
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.macro __pmull_init_p8
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// k00_16 := 0x0000000000000000_000000000000ffff
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// k32_48 := 0x00000000ffffffff_0000ffffffffffff
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movi k32_48.2d, #0xffffffff
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mov k32_48.h[2], k32_48.h[0]
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ushr k00_16.2d, k32_48.2d, #32
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// prepare the permutation vectors
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mov_q x5, 0x080f0e0d0c0b0a09
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movi perm4.8b, #8
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dup perm1.2d, x5
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eor perm1.16b, perm1.16b, perm4.16b
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ushr perm2.2d, perm1.2d, #8
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ushr perm3.2d, perm1.2d, #16
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ushr perm4.2d, perm1.2d, #24
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sli perm2.2d, perm1.2d, #56
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sli perm3.2d, perm1.2d, #48
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sli perm4.2d, perm1.2d, #40
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.endm
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.macro __pmull_pre_p8, bd
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tbl bd1.16b, {\bd\().16b}, perm1.16b
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tbl bd2.16b, {\bd\().16b}, perm2.16b
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tbl bd3.16b, {\bd\().16b}, perm3.16b
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tbl bd4.16b, {\bd\().16b}, perm4.16b
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.endm
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SYM_FUNC_START_LOCAL(__pmull_p8_core)
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.L__pmull_p8_core:
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ext t4.8b, ad.8b, ad.8b, #1 // A1
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ext t5.8b, ad.8b, ad.8b, #2 // A2
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ext t6.8b, ad.8b, ad.8b, #3 // A3
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pmull t4.8h, t4.8b, fold_consts.8b // F = A1*B
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pmull t8.8h, ad.8b, bd1.8b // E = A*B1
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pmull t5.8h, t5.8b, fold_consts.8b // H = A2*B
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pmull t7.8h, ad.8b, bd2.8b // G = A*B2
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pmull t6.8h, t6.8b, fold_consts.8b // J = A3*B
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pmull t9.8h, ad.8b, bd3.8b // I = A*B3
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pmull t3.8h, ad.8b, bd4.8b // K = A*B4
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b 0f
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.L__pmull_p8_core2:
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tbl t4.16b, {ad.16b}, perm1.16b // A1
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tbl t5.16b, {ad.16b}, perm2.16b // A2
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tbl t6.16b, {ad.16b}, perm3.16b // A3
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pmull2 t4.8h, t4.16b, fold_consts.16b // F = A1*B
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pmull2 t8.8h, ad.16b, bd1.16b // E = A*B1
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pmull2 t5.8h, t5.16b, fold_consts.16b // H = A2*B
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pmull2 t7.8h, ad.16b, bd2.16b // G = A*B2
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pmull2 t6.8h, t6.16b, fold_consts.16b // J = A3*B
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pmull2 t9.8h, ad.16b, bd3.16b // I = A*B3
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pmull2 t3.8h, ad.16b, bd4.16b // K = A*B4
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0: eor t4.16b, t4.16b, t8.16b // L = E + F
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eor t5.16b, t5.16b, t7.16b // M = G + H
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eor t6.16b, t6.16b, t9.16b // N = I + J
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uzp1 t8.2d, t4.2d, t5.2d
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uzp2 t4.2d, t4.2d, t5.2d
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uzp1 t7.2d, t6.2d, t3.2d
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uzp2 t6.2d, t6.2d, t3.2d
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// t4 = (L) (P0 + P1) << 8
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// t5 = (M) (P2 + P3) << 16
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eor t8.16b, t8.16b, t4.16b
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and t4.16b, t4.16b, k32_48.16b
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// t6 = (N) (P4 + P5) << 24
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// t7 = (K) (P6 + P7) << 32
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eor t7.16b, t7.16b, t6.16b
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and t6.16b, t6.16b, k00_16.16b
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eor t8.16b, t8.16b, t4.16b
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eor t7.16b, t7.16b, t6.16b
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zip2 t5.2d, t8.2d, t4.2d
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zip1 t4.2d, t8.2d, t4.2d
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zip2 t3.2d, t7.2d, t6.2d
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zip1 t6.2d, t7.2d, t6.2d
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ext t4.16b, t4.16b, t4.16b, #15
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ext t5.16b, t5.16b, t5.16b, #14
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ext t6.16b, t6.16b, t6.16b, #13
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ext t3.16b, t3.16b, t3.16b, #12
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eor t4.16b, t4.16b, t5.16b
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eor t6.16b, t6.16b, t3.16b
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ret
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SYM_FUNC_END(__pmull_p8_core)
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.macro __pmull_p8, rq, ad, bd, i
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.ifnc \bd, fold_consts
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.err
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.endif
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mov ad.16b, \ad\().16b
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.ifb \i
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pmull \rq\().8h, \ad\().8b, \bd\().8b // D = A*B
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.else
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pmull2 \rq\().8h, \ad\().16b, \bd\().16b // D = A*B
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.endif
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bl .L__pmull_p8_core\i
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eor \rq\().16b, \rq\().16b, t4.16b
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eor \rq\().16b, \rq\().16b, t6.16b
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.endm
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// Fold reg1, reg2 into the next 32 data bytes, storing the result back
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// into reg1, reg2.
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.macro fold_32_bytes, p, reg1, reg2
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ldp q11, q12, [buf], #0x20
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__pmull_\p v8, \reg1, fold_consts, 2
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__pmull_\p \reg1, \reg1, fold_consts
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CPU_LE( rev64 v11.16b, v11.16b )
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CPU_LE( rev64 v12.16b, v12.16b )
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__pmull_\p v9, \reg2, fold_consts, 2
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__pmull_\p \reg2, \reg2, fold_consts
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CPU_LE( ext v11.16b, v11.16b, v11.16b, #8 )
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CPU_LE( ext v12.16b, v12.16b, v12.16b, #8 )
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eor \reg1\().16b, \reg1\().16b, v8.16b
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eor \reg2\().16b, \reg2\().16b, v9.16b
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eor \reg1\().16b, \reg1\().16b, v11.16b
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eor \reg2\().16b, \reg2\().16b, v12.16b
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.endm
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// Fold src_reg into dst_reg, optionally loading the next fold constants
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.macro fold_16_bytes, p, src_reg, dst_reg, load_next_consts
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__pmull_\p v8, \src_reg, fold_consts
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__pmull_\p \src_reg, \src_reg, fold_consts, 2
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.ifnb \load_next_consts
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ld1 {fold_consts.2d}, [fold_consts_ptr], #16
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__pmull_pre_\p fold_consts
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.endif
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eor \dst_reg\().16b, \dst_reg\().16b, v8.16b
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eor \dst_reg\().16b, \dst_reg\().16b, \src_reg\().16b
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.endm
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.macro __pmull_p64, rd, rn, rm, n
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.ifb \n
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pmull \rd\().1q, \rn\().1d, \rm\().1d
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.else
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pmull2 \rd\().1q, \rn\().2d, \rm\().2d
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.endif
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.endm
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.macro crc_t10dif_pmull, p
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__pmull_init_\p
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// For sizes less than 256 bytes, we can't fold 128 bytes at a time.
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cmp len, #256
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b.lt .Lless_than_256_bytes_\@
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adr_l fold_consts_ptr, .Lfold_across_128_bytes_consts
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// Load the first 128 data bytes. Byte swapping is necessary to make
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// the bit order match the polynomial coefficient order.
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ldp q0, q1, [buf]
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ldp q2, q3, [buf, #0x20]
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ldp q4, q5, [buf, #0x40]
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ldp q6, q7, [buf, #0x60]
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add buf, buf, #0x80
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CPU_LE( rev64 v0.16b, v0.16b )
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CPU_LE( rev64 v1.16b, v1.16b )
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CPU_LE( rev64 v2.16b, v2.16b )
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CPU_LE( rev64 v3.16b, v3.16b )
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CPU_LE( rev64 v4.16b, v4.16b )
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CPU_LE( rev64 v5.16b, v5.16b )
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CPU_LE( rev64 v6.16b, v6.16b )
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CPU_LE( rev64 v7.16b, v7.16b )
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CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
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CPU_LE( ext v1.16b, v1.16b, v1.16b, #8 )
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CPU_LE( ext v2.16b, v2.16b, v2.16b, #8 )
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CPU_LE( ext v3.16b, v3.16b, v3.16b, #8 )
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CPU_LE( ext v4.16b, v4.16b, v4.16b, #8 )
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CPU_LE( ext v5.16b, v5.16b, v5.16b, #8 )
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CPU_LE( ext v6.16b, v6.16b, v6.16b, #8 )
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CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
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// XOR the first 16 data *bits* with the initial CRC value.
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movi v8.16b, #0
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mov v8.h[7], init_crc
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eor v0.16b, v0.16b, v8.16b
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// Load the constants for folding across 128 bytes.
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ld1 {fold_consts.2d}, [fold_consts_ptr]
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__pmull_pre_\p fold_consts
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// Subtract 128 for the 128 data bytes just consumed. Subtract another
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// 128 to simplify the termination condition of the following loop.
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sub len, len, #256
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// While >= 128 data bytes remain (not counting v0-v7), fold the 128
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// bytes v0-v7 into them, storing the result back into v0-v7.
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.Lfold_128_bytes_loop_\@:
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fold_32_bytes \p, v0, v1
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fold_32_bytes \p, v2, v3
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fold_32_bytes \p, v4, v5
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fold_32_bytes \p, v6, v7
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subs len, len, #128
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b.ge .Lfold_128_bytes_loop_\@
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// Now fold the 112 bytes in v0-v6 into the 16 bytes in v7.
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// Fold across 64 bytes.
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add fold_consts_ptr, fold_consts_ptr, #16
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ld1 {fold_consts.2d}, [fold_consts_ptr], #16
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__pmull_pre_\p fold_consts
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fold_16_bytes \p, v0, v4
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fold_16_bytes \p, v1, v5
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fold_16_bytes \p, v2, v6
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fold_16_bytes \p, v3, v7, 1
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// Fold across 32 bytes.
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fold_16_bytes \p, v4, v6
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fold_16_bytes \p, v5, v7, 1
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// Fold across 16 bytes.
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fold_16_bytes \p, v6, v7
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// Add 128 to get the correct number of data bytes remaining in 0...127
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// (not counting v7), following the previous extra subtraction by 128.
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// Then subtract 16 to simplify the termination condition of the
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// following loop.
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adds len, len, #(128-16)
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// While >= 16 data bytes remain (not counting v7), fold the 16 bytes v7
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// into them, storing the result back into v7.
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b.lt .Lfold_16_bytes_loop_done_\@
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.Lfold_16_bytes_loop_\@:
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__pmull_\p v8, v7, fold_consts
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__pmull_\p v7, v7, fold_consts, 2
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eor v7.16b, v7.16b, v8.16b
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ldr q0, [buf], #16
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CPU_LE( rev64 v0.16b, v0.16b )
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CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
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eor v7.16b, v7.16b, v0.16b
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subs len, len, #16
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b.ge .Lfold_16_bytes_loop_\@
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.Lfold_16_bytes_loop_done_\@:
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// Add 16 to get the correct number of data bytes remaining in 0...15
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// (not counting v7), following the previous extra subtraction by 16.
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adds len, len, #16
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b.eq .Lreduce_final_16_bytes_\@
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.Lhandle_partial_segment_\@:
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// Reduce the last '16 + len' bytes where 1 <= len <= 15 and the first
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// 16 bytes are in v7 and the rest are the remaining data in 'buf'. To
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// do this without needing a fold constant for each possible 'len',
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// redivide the bytes into a first chunk of 'len' bytes and a second
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// chunk of 16 bytes, then fold the first chunk into the second.
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// v0 = last 16 original data bytes
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add buf, buf, len
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ldr q0, [buf, #-16]
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CPU_LE( rev64 v0.16b, v0.16b )
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CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
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// v1 = high order part of second chunk: v7 left-shifted by 'len' bytes.
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adr_l x4, .Lbyteshift_table + 16
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sub x4, x4, len
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ld1 {v2.16b}, [x4]
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tbl v1.16b, {v7.16b}, v2.16b
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// v3 = first chunk: v7 right-shifted by '16-len' bytes.
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movi v3.16b, #0x80
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eor v2.16b, v2.16b, v3.16b
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tbl v3.16b, {v7.16b}, v2.16b
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// Convert to 8-bit masks: 'len' 0x00 bytes, then '16-len' 0xff bytes.
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sshr v2.16b, v2.16b, #7
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// v2 = second chunk: 'len' bytes from v0 (low-order bytes),
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// then '16-len' bytes from v1 (high-order bytes).
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bsl v2.16b, v1.16b, v0.16b
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// Fold the first chunk into the second chunk, storing the result in v7.
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__pmull_\p v0, v3, fold_consts
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__pmull_\p v7, v3, fold_consts, 2
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eor v7.16b, v7.16b, v0.16b
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eor v7.16b, v7.16b, v2.16b
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.Lreduce_final_16_bytes_\@:
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// Reduce the 128-bit value M(x), stored in v7, to the final 16-bit CRC.
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movi v2.16b, #0 // init zero register
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// Load 'x^48 * (x^48 mod G(x))' and 'x^48 * (x^80 mod G(x))'.
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ld1 {fold_consts.2d}, [fold_consts_ptr], #16
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__pmull_pre_\p fold_consts
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// Fold the high 64 bits into the low 64 bits, while also multiplying by
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// x^64. This produces a 128-bit value congruent to x^64 * M(x) and
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// whose low 48 bits are 0.
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ext v0.16b, v2.16b, v7.16b, #8
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__pmull_\p v7, v7, fold_consts, 2 // high bits * x^48 * (x^80 mod G(x))
|
|
eor v0.16b, v0.16b, v7.16b // + low bits * x^64
|
|
|
|
// Fold the high 32 bits into the low 96 bits. This produces a 96-bit
|
|
// value congruent to x^64 * M(x) and whose low 48 bits are 0.
|
|
ext v1.16b, v0.16b, v2.16b, #12 // extract high 32 bits
|
|
mov v0.s[3], v2.s[0] // zero high 32 bits
|
|
__pmull_\p v1, v1, fold_consts // high 32 bits * x^48 * (x^48 mod G(x))
|
|
eor v0.16b, v0.16b, v1.16b // + low bits
|
|
|
|
// Load G(x) and floor(x^48 / G(x)).
|
|
ld1 {fold_consts.2d}, [fold_consts_ptr]
|
|
__pmull_pre_\p fold_consts
|
|
|
|
// Use Barrett reduction to compute the final CRC value.
|
|
__pmull_\p v1, v0, fold_consts, 2 // high 32 bits * floor(x^48 / G(x))
|
|
ushr v1.2d, v1.2d, #32 // /= x^32
|
|
__pmull_\p v1, v1, fold_consts // *= G(x)
|
|
ushr v0.2d, v0.2d, #48
|
|
eor v0.16b, v0.16b, v1.16b // + low 16 nonzero bits
|
|
// Final CRC value (x^16 * M(x)) mod G(x) is in low 16 bits of v0.
|
|
|
|
umov w0, v0.h[0]
|
|
.ifc \p, p8
|
|
frame_pop
|
|
.endif
|
|
ret
|
|
|
|
.Lless_than_256_bytes_\@:
|
|
// Checksumming a buffer of length 16...255 bytes
|
|
|
|
adr_l fold_consts_ptr, .Lfold_across_16_bytes_consts
|
|
|
|
// Load the first 16 data bytes.
|
|
ldr q7, [buf], #0x10
|
|
CPU_LE( rev64 v7.16b, v7.16b )
|
|
CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
|
|
|
|
// XOR the first 16 data *bits* with the initial CRC value.
|
|
movi v0.16b, #0
|
|
mov v0.h[7], init_crc
|
|
eor v7.16b, v7.16b, v0.16b
|
|
|
|
// Load the fold-across-16-bytes constants.
|
|
ld1 {fold_consts.2d}, [fold_consts_ptr], #16
|
|
__pmull_pre_\p fold_consts
|
|
|
|
cmp len, #16
|
|
b.eq .Lreduce_final_16_bytes_\@ // len == 16
|
|
subs len, len, #32
|
|
b.ge .Lfold_16_bytes_loop_\@ // 32 <= len <= 255
|
|
add len, len, #16
|
|
b .Lhandle_partial_segment_\@ // 17 <= len <= 31
|
|
.endm
|
|
|
|
//
|
|
// u16 crc_t10dif_pmull_p8(u16 init_crc, const u8 *buf, size_t len);
|
|
//
|
|
// Assumes len >= 16.
|
|
//
|
|
SYM_FUNC_START(crc_t10dif_pmull_p8)
|
|
frame_push 1
|
|
crc_t10dif_pmull p8
|
|
SYM_FUNC_END(crc_t10dif_pmull_p8)
|
|
|
|
.align 5
|
|
//
|
|
// u16 crc_t10dif_pmull_p64(u16 init_crc, const u8 *buf, size_t len);
|
|
//
|
|
// Assumes len >= 16.
|
|
//
|
|
SYM_FUNC_START(crc_t10dif_pmull_p64)
|
|
crc_t10dif_pmull p64
|
|
SYM_FUNC_END(crc_t10dif_pmull_p64)
|
|
|
|
.section ".rodata", "a"
|
|
.align 4
|
|
|
|
// Fold constants precomputed from the polynomial 0x18bb7
|
|
// G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0
|
|
.Lfold_across_128_bytes_consts:
|
|
.quad 0x0000000000006123 // x^(8*128) mod G(x)
|
|
.quad 0x0000000000002295 // x^(8*128+64) mod G(x)
|
|
// .Lfold_across_64_bytes_consts:
|
|
.quad 0x0000000000001069 // x^(4*128) mod G(x)
|
|
.quad 0x000000000000dd31 // x^(4*128+64) mod G(x)
|
|
// .Lfold_across_32_bytes_consts:
|
|
.quad 0x000000000000857d // x^(2*128) mod G(x)
|
|
.quad 0x0000000000007acc // x^(2*128+64) mod G(x)
|
|
.Lfold_across_16_bytes_consts:
|
|
.quad 0x000000000000a010 // x^(1*128) mod G(x)
|
|
.quad 0x0000000000001faa // x^(1*128+64) mod G(x)
|
|
// .Lfinal_fold_consts:
|
|
.quad 0x1368000000000000 // x^48 * (x^48 mod G(x))
|
|
.quad 0x2d56000000000000 // x^48 * (x^80 mod G(x))
|
|
// .Lbarrett_reduction_consts:
|
|
.quad 0x0000000000018bb7 // G(x)
|
|
.quad 0x00000001f65a57f8 // floor(x^48 / G(x))
|
|
|
|
// For 1 <= len <= 15, the 16-byte vector beginning at &byteshift_table[16 -
|
|
// len] is the index vector to shift left by 'len' bytes, and is also {0x80,
|
|
// ..., 0x80} XOR the index vector to shift right by '16 - len' bytes.
|
|
.Lbyteshift_table:
|
|
.byte 0x0, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87
|
|
.byte 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f
|
|
.byte 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
|
|
.byte 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe , 0x0
|