519 lines
14 KiB
C
519 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2017 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/kvm_host.h>
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#include <linux/irqchip/arm-gic-v3.h>
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#include "vgic.h"
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/*
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* How KVM uses GICv4 (insert rude comments here):
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*
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* The vgic-v4 layer acts as a bridge between several entities:
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* - The GICv4 ITS representation offered by the ITS driver
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* - VFIO, which is in charge of the PCI endpoint
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* - The virtual ITS, which is the only thing the guest sees
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*
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* The configuration of VLPIs is triggered by a callback from VFIO,
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* instructing KVM that a PCI device has been configured to deliver
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* MSIs to a vITS.
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*
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* kvm_vgic_v4_set_forwarding() is thus called with the routing entry,
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* and this is used to find the corresponding vITS data structures
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* (ITS instance, device, event and irq) using a process that is
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* extremely similar to the injection of an MSI.
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*
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* At this stage, we can link the guest's view of an LPI (uniquely
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* identified by the routing entry) and the host irq, using the GICv4
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* driver mapping operation. Should the mapping succeed, we've then
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* successfully upgraded the guest's LPI to a VLPI. We can then start
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* with updating GICv4's view of the property table and generating an
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* INValidation in order to kickstart the delivery of this VLPI to the
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* guest directly, without software intervention. Well, almost.
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*
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* When the PCI endpoint is deconfigured, this operation is reversed
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* with VFIO calling kvm_vgic_v4_unset_forwarding().
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*
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* Once the VLPI has been mapped, it needs to follow any change the
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* guest performs on its LPI through the vITS. For that, a number of
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* command handlers have hooks to communicate these changes to the HW:
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* - Any invalidation triggers a call to its_prop_update_vlpi()
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* - The INT command results in a irq_set_irqchip_state(), which
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* generates an INT on the corresponding VLPI.
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* - The CLEAR command results in a irq_set_irqchip_state(), which
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* generates an CLEAR on the corresponding VLPI.
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* - DISCARD translates into an unmap, similar to a call to
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* kvm_vgic_v4_unset_forwarding().
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* - MOVI is translated by an update of the existing mapping, changing
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* the target vcpu, resulting in a VMOVI being generated.
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* - MOVALL is translated by a string of mapping updates (similar to
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* the handling of MOVI). MOVALL is horrible.
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*
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* Note that a DISCARD/MAPTI sequence emitted from the guest without
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* reprogramming the PCI endpoint after MAPTI does not result in a
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* VLPI being mapped, as there is no callback from VFIO (the guest
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* will get the interrupt via the normal SW injection). Fixing this is
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* not trivial, and requires some horrible messing with the VFIO
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* internals. Not fun. Don't do that.
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*
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* Then there is the scheduling. Each time a vcpu is about to run on a
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* physical CPU, KVM must tell the corresponding redistributor about
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* it. And if we've migrated our vcpu from one CPU to another, we must
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* tell the ITS (so that the messages reach the right redistributor).
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* This is done in two steps: first issue a irq_set_affinity() on the
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* irq corresponding to the vcpu, then call its_make_vpe_resident().
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* You must be in a non-preemptible context. On exit, a call to
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* its_make_vpe_non_resident() tells the redistributor that we're done
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* with the vcpu.
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*
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* Finally, the doorbell handling: Each vcpu is allocated an interrupt
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* which will fire each time a VLPI is made pending whilst the vcpu is
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* not running. Each time the vcpu gets blocked, the doorbell
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* interrupt gets enabled. When the vcpu is unblocked (for whatever
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* reason), the doorbell interrupt is disabled.
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*/
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#define DB_IRQ_FLAGS (IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY | IRQ_NO_BALANCING)
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static irqreturn_t vgic_v4_doorbell_handler(int irq, void *info)
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{
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struct kvm_vcpu *vcpu = info;
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/* We got the message, no need to fire again */
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if (!kvm_vgic_global_state.has_gicv4_1 &&
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!irqd_irq_disabled(&irq_to_desc(irq)->irq_data))
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disable_irq_nosync(irq);
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/*
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* The v4.1 doorbell can fire concurrently with the vPE being
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* made non-resident. Ensure we only update pending_last
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* *after* the non-residency sequence has completed.
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*/
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raw_spin_lock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock);
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vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last = true;
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raw_spin_unlock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock);
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kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
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kvm_vcpu_kick(vcpu);
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return IRQ_HANDLED;
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}
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static void vgic_v4_sync_sgi_config(struct its_vpe *vpe, struct vgic_irq *irq)
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{
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vpe->sgi_config[irq->intid].enabled = irq->enabled;
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vpe->sgi_config[irq->intid].group = irq->group;
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vpe->sgi_config[irq->intid].priority = irq->priority;
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}
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static void vgic_v4_enable_vsgis(struct kvm_vcpu *vcpu)
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{
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struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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int i;
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/*
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* With GICv4.1, every virtual SGI can be directly injected. So
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* let's pretend that they are HW interrupts, tied to a host
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* IRQ. The SGI code will do its magic.
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*/
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for (i = 0; i < VGIC_NR_SGIS; i++) {
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);
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struct irq_desc *desc;
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unsigned long flags;
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int ret;
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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if (irq->hw)
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goto unlock;
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irq->hw = true;
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irq->host_irq = irq_find_mapping(vpe->sgi_domain, i);
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/* Transfer the full irq state to the vPE */
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vgic_v4_sync_sgi_config(vpe, irq);
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desc = irq_to_desc(irq->host_irq);
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ret = irq_domain_activate_irq(irq_desc_get_irq_data(desc),
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false);
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if (!WARN_ON(ret)) {
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/* Transfer pending state */
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ret = irq_set_irqchip_state(irq->host_irq,
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IRQCHIP_STATE_PENDING,
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irq->pending_latch);
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WARN_ON(ret);
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irq->pending_latch = false;
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}
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unlock:
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raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
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vgic_put_irq(vcpu->kvm, irq);
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}
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}
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static void vgic_v4_disable_vsgis(struct kvm_vcpu *vcpu)
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{
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int i;
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for (i = 0; i < VGIC_NR_SGIS; i++) {
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);
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struct irq_desc *desc;
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unsigned long flags;
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int ret;
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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if (!irq->hw)
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goto unlock;
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irq->hw = false;
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ret = irq_get_irqchip_state(irq->host_irq,
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IRQCHIP_STATE_PENDING,
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&irq->pending_latch);
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WARN_ON(ret);
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desc = irq_to_desc(irq->host_irq);
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irq_domain_deactivate_irq(irq_desc_get_irq_data(desc));
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unlock:
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raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
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vgic_put_irq(vcpu->kvm, irq);
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}
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}
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void vgic_v4_configure_vsgis(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu;
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unsigned long i;
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lockdep_assert_held(&kvm->arch.config_lock);
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kvm_arm_halt_guest(kvm);
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (dist->nassgireq)
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vgic_v4_enable_vsgis(vcpu);
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else
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vgic_v4_disable_vsgis(vcpu);
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}
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kvm_arm_resume_guest(kvm);
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}
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/*
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* Must be called with GICv4.1 and the vPE unmapped, which
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* indicates the invalidation of any VPT caches associated
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* with the vPE, thus we can get the VLPI state by peeking
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* at the VPT.
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*/
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void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val)
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{
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struct its_vpe *vpe = &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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int mask = BIT(irq->intid % BITS_PER_BYTE);
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void *va;
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u8 *ptr;
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va = page_address(vpe->vpt_page);
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ptr = va + irq->intid / BITS_PER_BYTE;
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*val = !!(*ptr & mask);
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}
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int vgic_v4_request_vpe_irq(struct kvm_vcpu *vcpu, int irq)
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{
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return request_irq(irq, vgic_v4_doorbell_handler, 0, "vcpu", vcpu);
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}
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/**
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* vgic_v4_init - Initialize the GICv4 data structures
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* @kvm: Pointer to the VM being initialized
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*
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* We may be called each time a vITS is created, or when the
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* vgic is initialized. In both cases, the number of vcpus
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* should now be fixed.
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*/
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int vgic_v4_init(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu;
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int nr_vcpus, ret;
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unsigned long i;
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lockdep_assert_held(&kvm->arch.config_lock);
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if (!kvm_vgic_global_state.has_gicv4)
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return 0; /* Nothing to see here... move along. */
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if (dist->its_vm.vpes)
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return 0;
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nr_vcpus = atomic_read(&kvm->online_vcpus);
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dist->its_vm.vpes = kcalloc(nr_vcpus, sizeof(*dist->its_vm.vpes),
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GFP_KERNEL_ACCOUNT);
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if (!dist->its_vm.vpes)
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return -ENOMEM;
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dist->its_vm.nr_vpes = nr_vcpus;
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kvm_for_each_vcpu(i, vcpu, kvm)
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dist->its_vm.vpes[i] = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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ret = its_alloc_vcpu_irqs(&dist->its_vm);
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if (ret < 0) {
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kvm_err("VPE IRQ allocation failure\n");
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kfree(dist->its_vm.vpes);
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dist->its_vm.nr_vpes = 0;
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dist->its_vm.vpes = NULL;
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return ret;
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}
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kvm_for_each_vcpu(i, vcpu, kvm) {
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int irq = dist->its_vm.vpes[i]->irq;
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unsigned long irq_flags = DB_IRQ_FLAGS;
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/*
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* Don't automatically enable the doorbell, as we're
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* flipping it back and forth when the vcpu gets
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* blocked. Also disable the lazy disabling, as the
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* doorbell could kick us out of the guest too
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* early...
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*
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* On GICv4.1, the doorbell is managed in HW and must
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* be left enabled.
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*/
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if (kvm_vgic_global_state.has_gicv4_1)
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irq_flags &= ~IRQ_NOAUTOEN;
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irq_set_status_flags(irq, irq_flags);
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ret = vgic_v4_request_vpe_irq(vcpu, irq);
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if (ret) {
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kvm_err("failed to allocate vcpu IRQ%d\n", irq);
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/*
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* Trick: adjust the number of vpes so we know
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* how many to nuke on teardown...
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*/
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dist->its_vm.nr_vpes = i;
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break;
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}
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}
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if (ret)
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vgic_v4_teardown(kvm);
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return ret;
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}
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/**
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* vgic_v4_teardown - Free the GICv4 data structures
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* @kvm: Pointer to the VM being destroyed
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*/
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void vgic_v4_teardown(struct kvm *kvm)
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{
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struct its_vm *its_vm = &kvm->arch.vgic.its_vm;
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int i;
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lockdep_assert_held(&kvm->arch.config_lock);
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if (!its_vm->vpes)
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return;
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for (i = 0; i < its_vm->nr_vpes; i++) {
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struct kvm_vcpu *vcpu = kvm_get_vcpu(kvm, i);
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int irq = its_vm->vpes[i]->irq;
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irq_clear_status_flags(irq, DB_IRQ_FLAGS);
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free_irq(irq, vcpu);
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}
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its_free_vcpu_irqs(its_vm);
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kfree(its_vm->vpes);
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its_vm->nr_vpes = 0;
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its_vm->vpes = NULL;
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}
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int vgic_v4_put(struct kvm_vcpu *vcpu, bool need_db)
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{
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struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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if (!vgic_supports_direct_msis(vcpu->kvm) || !vpe->resident)
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return 0;
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return its_make_vpe_non_resident(vpe, need_db);
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}
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int vgic_v4_load(struct kvm_vcpu *vcpu)
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{
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struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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int err;
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if (!vgic_supports_direct_msis(vcpu->kvm) || vpe->resident)
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return 0;
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/*
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* Before making the VPE resident, make sure the redistributor
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* corresponding to our current CPU expects us here. See the
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* doc in drivers/irqchip/irq-gic-v4.c to understand how this
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* turns into a VMOVP command at the ITS level.
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*/
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err = irq_set_affinity(vpe->irq, cpumask_of(smp_processor_id()));
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if (err)
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return err;
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err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled);
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if (err)
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return err;
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/*
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* Now that the VPE is resident, let's get rid of a potential
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* doorbell interrupt that would still be pending. This is a
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* GICv4.0 only "feature"...
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*/
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if (!kvm_vgic_global_state.has_gicv4_1)
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err = irq_set_irqchip_state(vpe->irq, IRQCHIP_STATE_PENDING, false);
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return err;
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}
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void vgic_v4_commit(struct kvm_vcpu *vcpu)
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{
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struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
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/*
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* No need to wait for the vPE to be ready across a shallow guest
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* exit, as only a vcpu_put will invalidate it.
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*/
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if (!vpe->ready)
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its_commit_vpe(vpe);
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}
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static struct vgic_its *vgic_get_its(struct kvm *kvm,
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struct kvm_kernel_irq_routing_entry *irq_entry)
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{
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struct kvm_msi msi = (struct kvm_msi) {
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.address_lo = irq_entry->msi.address_lo,
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.address_hi = irq_entry->msi.address_hi,
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.data = irq_entry->msi.data,
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.flags = irq_entry->msi.flags,
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.devid = irq_entry->msi.devid,
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};
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return vgic_msi_to_its(kvm, &msi);
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}
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int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq,
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struct kvm_kernel_irq_routing_entry *irq_entry)
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{
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struct vgic_its *its;
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struct vgic_irq *irq;
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struct its_vlpi_map map;
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unsigned long flags;
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int ret;
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if (!vgic_supports_direct_msis(kvm))
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return 0;
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/*
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* Get the ITS, and escape early on error (not a valid
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* doorbell for any of our vITSs).
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*/
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its = vgic_get_its(kvm, irq_entry);
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if (IS_ERR(its))
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return 0;
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mutex_lock(&its->its_lock);
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/* Perform the actual DevID/EventID -> LPI translation. */
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ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
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irq_entry->msi.data, &irq);
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if (ret)
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goto out;
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/*
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* Emit the mapping request. If it fails, the ITS probably
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* isn't v4 compatible, so let's silently bail out. Holding
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* the ITS lock should ensure that nothing can modify the
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* target vcpu.
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*/
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map = (struct its_vlpi_map) {
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.vm = &kvm->arch.vgic.its_vm,
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.vpe = &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe,
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.vintid = irq->intid,
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.properties = ((irq->priority & 0xfc) |
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(irq->enabled ? LPI_PROP_ENABLED : 0) |
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LPI_PROP_GROUP1),
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.db_enabled = true,
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};
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ret = its_map_vlpi(virq, &map);
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if (ret)
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goto out;
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irq->hw = true;
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irq->host_irq = virq;
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atomic_inc(&map.vpe->vlpi_count);
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/* Transfer pending state */
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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if (irq->pending_latch) {
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ret = irq_set_irqchip_state(irq->host_irq,
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IRQCHIP_STATE_PENDING,
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irq->pending_latch);
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WARN_RATELIMIT(ret, "IRQ %d", irq->host_irq);
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/*
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* Clear pending_latch and communicate this state
|
|
* change via vgic_queue_irq_unlock.
|
|
*/
|
|
irq->pending_latch = false;
|
|
vgic_queue_irq_unlock(kvm, irq, flags);
|
|
} else {
|
|
raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&its->its_lock);
|
|
return ret;
|
|
}
|
|
|
|
int kvm_vgic_v4_unset_forwarding(struct kvm *kvm, int virq,
|
|
struct kvm_kernel_irq_routing_entry *irq_entry)
|
|
{
|
|
struct vgic_its *its;
|
|
struct vgic_irq *irq;
|
|
int ret;
|
|
|
|
if (!vgic_supports_direct_msis(kvm))
|
|
return 0;
|
|
|
|
/*
|
|
* Get the ITS, and escape early on error (not a valid
|
|
* doorbell for any of our vITSs).
|
|
*/
|
|
its = vgic_get_its(kvm, irq_entry);
|
|
if (IS_ERR(its))
|
|
return 0;
|
|
|
|
mutex_lock(&its->its_lock);
|
|
|
|
ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
|
|
irq_entry->msi.data, &irq);
|
|
if (ret)
|
|
goto out;
|
|
|
|
WARN_ON(!(irq->hw && irq->host_irq == virq));
|
|
if (irq->hw) {
|
|
atomic_dec(&irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count);
|
|
irq->hw = false;
|
|
ret = its_unmap_vlpi(virq);
|
|
}
|
|
|
|
out:
|
|
mutex_unlock(&its->its_lock);
|
|
return ret;
|
|
}
|