282 lines
6.3 KiB
Plaintext
282 lines
6.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm7125";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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mips-hpt-frequency = <202500000>;
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cpu@0 {
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compatible = "brcm,bmips4380";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4380";
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device_type = "cpu";
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reg = <1>;
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};
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};
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aliases {
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uart0 = &uart0;
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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clocks {
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uart_clk: uart_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <81000000>;
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};
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upg_clk: upg_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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};
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};
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rdb {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0 0x10000000 0x01000000>;
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periph_intc: interrupt-controller@441400 {
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compatible = "brcm,bcm7038-l1-intc";
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reg = <0x441400 0x30>, <0x441600 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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sun_l2_intc: interrupt-controller@401800 {
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compatible = "brcm,l2-intc";
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reg = <0x401800 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <23>;
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};
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gisb-arb@400000 {
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compatible = "brcm,bcm7400-gisb-arb";
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reg = <0x400000 0xdc>;
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native-endian;
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interrupt-parent = <&sun_l2_intc>;
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interrupts = <0>, <2>;
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brcm,gisb-arb-master-mask = <0x2f7>;
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brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
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"bsp_0", "rdc_0", "rptd_0",
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"avd_0", "jtag_0";
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};
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upg_irq0_intc: interrupt-controller@406780 {
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compatible = "brcm,bcm7120-l2-intc";
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reg = <0x406780 0x8>;
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brcm,int-map-mask = <0x44>, <0xf000000>, <0x100000>;
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brcm,int-fwd-mask = <0x70000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <18>, <19>, <20>;
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interrupt-names = "upg_main", "upg_bsc", "upg_spi";
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};
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sun_top_ctrl: syscon@404000 {
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compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
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reg = <0x404000 0x60c>;
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native-endian;
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};
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reboot {
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compatible = "brcm,bcm7038-reboot";
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syscon = <&sun_top_ctrl 0x8 0x14>;
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};
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uart0: serial@406b00 {
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compatible = "ns16550a";
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reg = <0x406b00 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <21>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart1: serial@406b40 {
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compatible = "ns16550a";
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reg = <0x406b40 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <64>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@406b80 {
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compatible = "ns16550a";
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reg = <0x406b80 0x20>;
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reg-io-width = <0x4>;
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reg-shift = <0x2>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <65>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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bsca: i2c@406200 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406200 0x58>;
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interrupts = <24>;
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interrupt-names = "upg_bsca";
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status = "disabled";
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};
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bscb: i2c@406280 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406280 0x58>;
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interrupts = <25>;
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interrupt-names = "upg_bscb";
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status = "disabled";
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};
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bscc: i2c@406300 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406300 0x58>;
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interrupts = <26>;
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interrupt-names = "upg_bscc";
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status = "disabled";
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};
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bscd: i2c@406380 {
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clock-frequency = <390000>;
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compatible = "brcm,brcmstb-i2c";
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interrupt-parent = <&upg_irq0_intc>;
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reg = <0x406380 0x58>;
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interrupts = <27>;
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interrupt-names = "upg_bscd";
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status = "disabled";
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};
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pwma: pwm@406580 {
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compatible = "brcm,bcm7038-pwm";
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reg = <0x406580 0x28>;
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#pwm-cells = <2>;
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clocks = <&upg_clk>;
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status = "disabled";
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};
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watchdog: watchdog@4067e8 {
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clocks = <&upg_clk>;
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compatible = "brcm,bcm7038-wdt";
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reg = <0x4067e8 0x14>;
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status = "disabled";
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 18>;
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};
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ehci0: usb@488300 {
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compatible = "brcm,bcm7125-ehci", "generic-ehci";
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reg = <0x488300 0x100>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <60>;
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status = "disabled";
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};
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ohci0: usb@488400 {
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compatible = "brcm,bcm7125-ohci", "generic-ohci";
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reg = <0x488400 0x100>;
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native-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <61>;
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status = "disabled";
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};
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spi_l2_intc: interrupt-controller@411d00 {
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compatible = "brcm,l2-intc";
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reg = <0x411d00 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <79>;
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};
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qspi: spi@443000 {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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compatible = "brcm,spi-bcm-qspi",
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"brcm,spi-brcmstb-qspi";
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clocks = <&upg_clk>;
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reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
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reg-names = "cs_reg", "hif_mspi", "bspi";
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interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
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interrupt-parent = <&spi_l2_intc>;
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interrupt-names = "spi_lr_fullness_reached",
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"spi_lr_session_aborted",
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"spi_lr_impatient",
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"spi_lr_session_done",
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"spi_lr_overread",
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"mspi_done",
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"mspi_halted";
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status = "disabled";
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};
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mspi: spi@406400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,spi-bcm-qspi",
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"brcm,spi-brcmstb-mspi";
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clocks = <&upg_clk>;
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reg = <0x406400 0x180>;
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reg-names = "mspi";
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interrupts = <0x14>;
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interrupt-parent = <&upg_irq0_intc>;
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interrupt-names = "mspi_done";
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status = "disabled";
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};
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};
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};
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