108 lines
2.0 KiB
Plaintext
108 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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/dts-v1/;
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#include "jaguar2_common.dtsi"
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/ {
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model = "Jaguar2 Cu48 PCB111 Reference Board";
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compatible = "mscc,jr2-pcb111", "mscc,jr2";
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aliases {
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i2c0 = &i2c0;
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i2c149 = &i2c149;
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i2c150 = &i2c150;
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i2c151 = &i2c151;
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i2c152 = &i2c152;
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i2c203 = &i2c203;
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};
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i2c0_imux: i2c0-imux {
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compatible = "i2c-mux-pinctrl";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-parent = <&i2c0>;
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pinctrl-names =
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"i2c149", "i2c150", "i2c151", "i2c152", "i2c203", "idle";
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pinctrl-0 = <&i2cmux_0>;
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pinctrl-1 = <&i2cmux_1>;
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pinctrl-2 = <&i2cmux_2>;
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pinctrl-3 = <&i2cmux_3>;
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pinctrl-4 = <&i2cmux_pins_i>; // Added by convention for PoE
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pinctrl-5 = <&i2cmux_pins_i>;
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i2c149: i2c@0 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c150: i2c@1 {
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reg = <0x1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c151: i2c@2 {
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reg = <0x2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c152: i2c@3 {
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reg = <0x3>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c203: i2c@4 {
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reg = <0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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&gpio {
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synce_builtin_pins: synce-builtin-pins {
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// GPIO 49 == SI_nCS13
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pins = "GPIO_49";
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function = "si";
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};
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cpld_pins: cpld-pins {
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// GPIO 50 == SI_nCS14
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pins = "GPIO_50";
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function = "si";
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};
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cpld_fifo_pins: synce-builtin-pins {
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// GPIO 51 == SI_nCS15
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pins = "GPIO_51";
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function = "si";
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};
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};
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&gpio {
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i2cmux_pins_i: i2cmux-pins {
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pins = "GPIO_17", "GPIO_18";
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function = "twi_scl_m";
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output-low;
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};
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i2cmux_0: i2cmux-0-pins {
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pins = "GPIO_17";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_1: i2cmux-1-pins {
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pins = "GPIO_18";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_2: i2cmux-2-pins {
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pins = "GPIO_20";
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function = "twi_scl_m";
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output-high;
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};
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i2cmux_3: i2cmux-3-pins {
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pins = "GPIO_21";
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function = "twi_scl_m";
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output-high;
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};
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};
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