895 lines
22 KiB
C
895 lines
22 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright IBM Corp. 2007
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#ifndef __POWERPC_KVM_HOST_H__
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#define __POWERPC_KVM_HOST_H__
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#include <linux/mutex.h>
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#include <linux/hrtimer.h>
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/kvm_types.h>
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#include <linux/threads.h>
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#include <linux/spinlock.h>
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#include <linux/kvm_para.h>
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#include <linux/list.h>
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#include <linux/atomic.h>
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#include <asm/kvm_asm.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/cacheflush.h>
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#include <asm/hvcall.h>
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#include <asm/mce.h>
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#define __KVM_HAVE_ARCH_VCPU_DEBUGFS
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#define KVM_MAX_VCPUS NR_CPUS
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#define KVM_MAX_VCORES NR_CPUS
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#include <asm/cputhreads.h>
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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#include <asm/kvm_book3s_asm.h> /* for MAX_SMT_THREADS */
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#define KVM_MAX_VCPU_IDS (MAX_SMT_THREADS * KVM_MAX_VCORES)
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/*
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* Limit the nested partition table to 4096 entries (because that's what
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* hardware supports). Both guest and host use this value.
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*/
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#define KVM_MAX_NESTED_GUESTS_SHIFT 12
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#else
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#define KVM_MAX_VCPU_IDS KVM_MAX_VCPUS
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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#define __KVM_HAVE_ARCH_INTC_INITIALIZED
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#define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */
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/* These values are internal and can be increased later */
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#define KVM_NR_IRQCHIPS 1
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#define KVM_IRQCHIP_NUM_PINS 256
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/* PPC-specific vcpu->requests bit members */
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#define KVM_REQ_WATCHDOG KVM_ARCH_REQ(0)
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#define KVM_REQ_EPR_EXIT KVM_ARCH_REQ(1)
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#define KVM_REQ_PENDING_TIMER KVM_ARCH_REQ(2)
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#include <linux/mmu_notifier.h>
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#define KVM_ARCH_WANT_MMU_NOTIFIER
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#define HPTEG_CACHE_NUM (1 << 15)
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#define HPTEG_HASH_BITS_PTE 13
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#define HPTEG_HASH_BITS_PTE_LONG 12
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#define HPTEG_HASH_BITS_VPTE 13
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#define HPTEG_HASH_BITS_VPTE_LONG 5
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#define HPTEG_HASH_BITS_VPTE_64K 11
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#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
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#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
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#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
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#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
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#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
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/* Physical Address Mask - allowed range of real mode RAM access */
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#define KVM_PAM 0x0fffffffffffffffULL
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struct lppaca;
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struct slb_shadow;
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struct dtl_entry;
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struct kvmppc_vcpu_book3s;
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struct kvmppc_book3s_shadow_vcpu;
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struct kvm_nested_guest;
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struct kvm_vm_stat {
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struct kvm_vm_stat_generic generic;
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u64 num_2M_pages;
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u64 num_1G_pages;
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};
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struct kvm_vcpu_stat {
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struct kvm_vcpu_stat_generic generic;
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u64 sum_exits;
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u64 mmio_exits;
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u64 signal_exits;
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u64 light_exits;
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/* Account for special types of light exits: */
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u64 itlb_real_miss_exits;
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u64 itlb_virt_miss_exits;
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u64 dtlb_real_miss_exits;
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u64 dtlb_virt_miss_exits;
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u64 syscall_exits;
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u64 isi_exits;
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u64 dsi_exits;
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u64 emulated_inst_exits;
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u64 dec_exits;
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u64 ext_intr_exits;
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u64 halt_successful_wait;
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u64 dbell_exits;
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u64 gdbell_exits;
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u64 ld;
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u64 st;
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#ifdef CONFIG_PPC_BOOK3S
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u64 pf_storage;
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u64 pf_instruc;
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u64 sp_storage;
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u64 sp_instruc;
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u64 queue_intr;
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u64 ld_slow;
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u64 st_slow;
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#endif
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u64 pthru_all;
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u64 pthru_host;
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u64 pthru_bad_aff;
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};
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enum kvm_exit_types {
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MMIO_EXITS,
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SIGNAL_EXITS,
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ITLB_REAL_MISS_EXITS,
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ITLB_VIRT_MISS_EXITS,
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DTLB_REAL_MISS_EXITS,
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DTLB_VIRT_MISS_EXITS,
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SYSCALL_EXITS,
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ISI_EXITS,
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DSI_EXITS,
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EMULATED_INST_EXITS,
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EMULATED_MTMSRWE_EXITS,
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EMULATED_WRTEE_EXITS,
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EMULATED_MTSPR_EXITS,
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EMULATED_MFSPR_EXITS,
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EMULATED_MTMSR_EXITS,
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EMULATED_MFMSR_EXITS,
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EMULATED_TLBSX_EXITS,
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EMULATED_TLBWE_EXITS,
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EMULATED_RFI_EXITS,
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EMULATED_RFCI_EXITS,
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EMULATED_RFDI_EXITS,
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DEC_EXITS,
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EXT_INTR_EXITS,
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HALT_WAKEUP,
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USR_PR_INST,
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FP_UNAVAIL,
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DEBUG_EXITS,
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TIMEINGUEST,
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DBELL_EXITS,
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GDBELL_EXITS,
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__NUMBER_OF_KVM_EXIT_TYPES
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};
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/* allow access to big endian 32bit upper/lower parts and 64bit var */
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struct kvmppc_exit_timing {
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union {
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u64 tv64;
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struct {
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u32 tbu, tbl;
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} tv32;
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};
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};
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struct kvmppc_pginfo {
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unsigned long pfn;
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atomic_t refcnt;
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};
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struct kvmppc_spapr_tce_iommu_table {
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struct rcu_head rcu;
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struct list_head next;
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struct iommu_table *tbl;
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struct kref kref;
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};
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#define TCES_PER_PAGE (PAGE_SIZE / sizeof(u64))
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struct kvmppc_spapr_tce_table {
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struct list_head list;
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struct kvm *kvm;
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u64 liobn;
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struct rcu_head rcu;
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u32 page_shift;
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u64 offset; /* in pages */
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u64 size; /* window size in pages */
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struct list_head iommu_tables;
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struct mutex alloc_lock;
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struct page *pages[];
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};
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/* XICS components, defined in book3s_xics.c */
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struct kvmppc_xics;
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struct kvmppc_icp;
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extern struct kvm_device_ops kvm_xics_ops;
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/* XIVE components, defined in book3s_xive.c */
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struct kvmppc_xive;
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struct kvmppc_xive_vcpu;
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extern struct kvm_device_ops kvm_xive_ops;
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extern struct kvm_device_ops kvm_xive_native_ops;
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struct kvmppc_passthru_irqmap;
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/*
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* The reverse mapping array has one entry for each HPTE,
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* which stores the guest's view of the second word of the HPTE
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* (including the guest physical address of the mapping),
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* plus forward and backward pointers in a doubly-linked ring
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* of HPTEs that map the same host page. The pointers in this
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* ring are 32-bit HPTE indexes, to save space.
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*/
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struct revmap_entry {
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unsigned long guest_rpte;
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unsigned int forw, back;
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};
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/*
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* The rmap array of size number of guest pages is allocated for each memslot.
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* This array is used to store usage specific information about the guest page.
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* Below are the encodings of the various possible usage types.
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*/
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/* Free bits which can be used to define a new usage */
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#define KVMPPC_RMAP_TYPE_MASK 0xff00000000000000
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#define KVMPPC_RMAP_NESTED 0xc000000000000000 /* Nested rmap array */
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#define KVMPPC_RMAP_HPT 0x0100000000000000 /* HPT guest */
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/*
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* rmap usage definition for a hash page table (hpt) guest:
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* 0x0000080000000000 Lock bit
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* 0x0000018000000000 RC bits
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* 0x0000000100000000 Present bit
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* 0x00000000ffffffff HPT index bits
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* The bottom 32 bits are the index in the guest HPT of a HPTE that points to
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* the page.
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*/
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#define KVMPPC_RMAP_LOCK_BIT 43
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#define KVMPPC_RMAP_RC_SHIFT 32
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#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
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#define KVMPPC_RMAP_PRESENT 0x100000000ul
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#define KVMPPC_RMAP_INDEX 0xfffffffful
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struct kvm_arch_memory_slot {
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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unsigned long *rmap;
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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};
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struct kvm_hpt_info {
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/* Host virtual (linear mapping) address of guest HPT */
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unsigned long virt;
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/* Array of reverse mapping entries for each guest HPTE */
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struct revmap_entry *rev;
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/* Guest HPT size is 2**(order) bytes */
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u32 order;
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/* 1 if HPT allocated with CMA, 0 otherwise */
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int cma;
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};
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struct kvm_resize_hpt;
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/* Flag values for kvm_arch.secure_guest */
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#define KVMPPC_SECURE_INIT_START 0x1 /* H_SVM_INIT_START has been called */
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#define KVMPPC_SECURE_INIT_DONE 0x2 /* H_SVM_INIT_DONE completed */
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#define KVMPPC_SECURE_INIT_ABORT 0x4 /* H_SVM_INIT_ABORT issued */
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struct kvm_arch {
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unsigned int lpid;
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unsigned int smt_mode; /* # vcpus per virtual core */
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unsigned int emul_smt_mode; /* emualted SMT mode, on P9 */
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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unsigned int tlb_sets;
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struct kvm_hpt_info hpt;
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atomic64_t mmio_update;
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unsigned int host_lpid;
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unsigned long host_lpcr;
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unsigned long sdr1;
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unsigned long host_sdr1;
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unsigned long lpcr;
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unsigned long vrma_slb_v;
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int mmu_ready;
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atomic_t vcpus_running;
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u32 online_vcores;
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atomic_t hpte_mod_interest;
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cpumask_t need_tlb_flush;
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u8 radix;
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u8 fwnmi_enabled;
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u8 secure_guest;
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u8 svm_enabled;
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bool nested_enable;
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bool dawr1_enabled;
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pgd_t *pgtable;
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u64 process_table;
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struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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struct mutex hpt_mutex;
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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struct list_head spapr_tce_tables;
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struct list_head rtas_tokens;
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struct mutex rtas_token_lock;
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DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
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#endif
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#ifdef CONFIG_KVM_MPIC
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struct openpic *mpic;
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#endif
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#ifdef CONFIG_KVM_XICS
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struct kvmppc_xics *xics;
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struct kvmppc_xics *xics_device;
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struct kvmppc_xive *xive; /* Current XIVE device in use */
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struct {
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struct kvmppc_xive *native;
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struct kvmppc_xive *xics_on_xive;
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} xive_devices;
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struct kvmppc_passthru_irqmap *pimap;
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#endif
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struct kvmppc_ops *kvm_ops;
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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struct mutex uvmem_lock;
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struct list_head uvmem_pfns;
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struct mutex mmu_setup_lock; /* nests inside vcpu mutexes */
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u64 l1_ptcr;
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struct idr kvm_nested_guest_idr;
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/* This array can grow quite large, keep it at the end */
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struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
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#endif
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};
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#define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff)
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#define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8)
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#define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0)
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/* This bit is used when a vcore exit is triggered from outside the vcore */
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#define VCORE_EXIT_REQ 0x10000
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/*
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* Values for vcore_state.
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* Note that these are arranged such that lower values
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* (< VCORE_SLEEPING) don't require stolen time accounting
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* on load/unload, and higher values do.
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*/
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#define VCORE_INACTIVE 0
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#define VCORE_PREEMPT 1
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#define VCORE_PIGGYBACK 2
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#define VCORE_SLEEPING 3
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#define VCORE_RUNNING 4
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#define VCORE_EXITING 5
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#define VCORE_POLLING 6
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/*
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* Struct used to manage memory for a virtual processor area
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* registered by a PAPR guest. There are three types of area
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* that a guest can register.
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*/
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struct kvmppc_vpa {
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unsigned long gpa; /* Current guest phys addr */
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void *pinned_addr; /* Address in kernel linear mapping */
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void *pinned_end; /* End of region */
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unsigned long next_gpa; /* Guest phys addr for update */
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unsigned long len; /* Number of bytes required */
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u8 update_pending; /* 1 => update pinned_addr from next_gpa */
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bool dirty; /* true => area has been modified by kernel */
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};
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struct kvmppc_pte {
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ulong eaddr;
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u64 vpage;
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ulong raddr;
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bool may_read : 1;
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bool may_write : 1;
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bool may_execute : 1;
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unsigned long wimg;
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unsigned long rc;
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u8 page_size; /* MMU_PAGE_xxx */
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u8 page_shift;
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};
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struct kvmppc_mmu {
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/* book3s_64 only */
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void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
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u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
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u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
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int (*slbfee)(struct kvm_vcpu *vcpu, gva_t eaddr, ulong *ret_slb);
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void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
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void (*slbia)(struct kvm_vcpu *vcpu);
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/* book3s */
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void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
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u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
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int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
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struct kvmppc_pte *pte, bool data, bool iswrite);
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void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
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int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
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u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
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bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
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};
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struct kvmppc_slb {
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u64 esid;
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u64 vsid;
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u64 orige;
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u64 origv;
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bool valid : 1;
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bool Ks : 1;
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bool Kp : 1;
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bool nx : 1;
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bool large : 1; /* PTEs are 16MB */
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bool tb : 1; /* 1TB segment */
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bool class : 1;
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u8 base_page_size; /* MMU_PAGE_xxx */
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};
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/* Struct used to accumulate timing information in HV real mode code */
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struct kvmhv_tb_accumulator {
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u64 seqcount; /* used to synchronize access, also count * 2 */
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u64 tb_total; /* total time in timebase ticks */
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u64 tb_min; /* min time */
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u64 tb_max; /* max time */
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};
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#ifdef CONFIG_PPC_BOOK3S_64
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struct kvmppc_irq_map {
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u32 r_hwirq;
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u32 v_hwirq;
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struct irq_desc *desc;
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};
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#define KVMPPC_PIRQ_MAPPED 1024
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struct kvmppc_passthru_irqmap {
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int n_mapped;
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struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
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};
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#endif
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# ifdef CONFIG_PPC_E500
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#define KVMPPC_BOOKE_IAC_NUM 2
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#define KVMPPC_BOOKE_DAC_NUM 2
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# else
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#define KVMPPC_BOOKE_IAC_NUM 4
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#define KVMPPC_BOOKE_DAC_NUM 2
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# endif
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#define KVMPPC_BOOKE_MAX_IAC 4
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#define KVMPPC_BOOKE_MAX_DAC 2
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/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
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#define KVMPPC_EPR_NONE 0 /* EPR not supported */
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#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
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#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
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#define KVMPPC_IRQ_DEFAULT 0
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#define KVMPPC_IRQ_MPIC 1
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#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */
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#define KVMPPC_IRQ_XIVE 3 /* XIVE native exploitation mode */
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#define MMIO_HPTE_CACHE_SIZE 4
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struct mmio_hpte_cache_entry {
|
|
unsigned long hpte_v;
|
|
unsigned long hpte_r;
|
|
unsigned long rpte;
|
|
unsigned long pte_index;
|
|
unsigned long eaddr;
|
|
unsigned long slb_v;
|
|
long mmio_update;
|
|
unsigned int slb_base_pshift;
|
|
};
|
|
|
|
struct mmio_hpte_cache {
|
|
struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
|
|
unsigned int index;
|
|
};
|
|
|
|
#define KVMPPC_VSX_COPY_NONE 0
|
|
#define KVMPPC_VSX_COPY_WORD 1
|
|
#define KVMPPC_VSX_COPY_DWORD 2
|
|
#define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP 3
|
|
#define KVMPPC_VSX_COPY_WORD_LOAD_DUMP 4
|
|
|
|
#define KVMPPC_VMX_COPY_BYTE 8
|
|
#define KVMPPC_VMX_COPY_HWORD 9
|
|
#define KVMPPC_VMX_COPY_WORD 10
|
|
#define KVMPPC_VMX_COPY_DWORD 11
|
|
|
|
struct openpic;
|
|
|
|
/* W0 and W1 of a XIVE thread management context */
|
|
union xive_tma_w01 {
|
|
struct {
|
|
u8 nsr;
|
|
u8 cppr;
|
|
u8 ipb;
|
|
u8 lsmfb;
|
|
u8 ack;
|
|
u8 inc;
|
|
u8 age;
|
|
u8 pipr;
|
|
};
|
|
__be64 w01;
|
|
};
|
|
|
|
struct kvm_vcpu_arch {
|
|
ulong host_stack;
|
|
u32 host_pid;
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
struct kvmppc_slb slb[64];
|
|
int slb_max; /* 1 + index of last valid entry in slb[] */
|
|
int slb_nr; /* total number of entries in SLB */
|
|
struct kvmppc_mmu mmu;
|
|
struct kvmppc_vcpu_book3s *book3s;
|
|
#endif
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
|
struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
|
|
#endif
|
|
|
|
/*
|
|
* This is passed along to the HV via H_ENTER_NESTED. Align to
|
|
* prevent it crossing a real 4K page.
|
|
*/
|
|
struct pt_regs regs __aligned(512);
|
|
|
|
struct thread_fp_state fp;
|
|
|
|
#ifdef CONFIG_SPE
|
|
ulong evr[32];
|
|
ulong spefscr;
|
|
ulong host_spefscr;
|
|
u64 acc;
|
|
#endif
|
|
#ifdef CONFIG_ALTIVEC
|
|
struct thread_vr_state vr;
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_BOOKE_HV
|
|
u32 host_mas4;
|
|
u32 host_mas6;
|
|
u32 shadow_epcr;
|
|
u32 shadow_msrp;
|
|
u32 eplc;
|
|
u32 epsc;
|
|
u32 oldpir;
|
|
#endif
|
|
|
|
#if defined(CONFIG_BOOKE)
|
|
#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
|
|
u32 epcr;
|
|
#endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
/* For Gekko paired singles */
|
|
u32 qpr[32];
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
ulong tar;
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
ulong hflags;
|
|
ulong guest_owned_ext;
|
|
ulong purr;
|
|
ulong spurr;
|
|
ulong ic;
|
|
ulong dscr;
|
|
ulong amr;
|
|
ulong uamor;
|
|
ulong iamr;
|
|
u32 ctrl;
|
|
u32 dabrx;
|
|
ulong dabr;
|
|
ulong dawr0;
|
|
ulong dawrx0;
|
|
ulong dawr1;
|
|
ulong dawrx1;
|
|
ulong ciabr;
|
|
ulong cfar;
|
|
ulong ppr;
|
|
u32 pspb;
|
|
u8 load_ebb;
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
u8 load_tm;
|
|
#endif
|
|
ulong fscr;
|
|
ulong shadow_fscr;
|
|
ulong ebbhr;
|
|
ulong ebbrr;
|
|
ulong bescr;
|
|
ulong csigr;
|
|
ulong tacr;
|
|
ulong tcscr;
|
|
ulong acop;
|
|
ulong wort;
|
|
ulong tid;
|
|
ulong psscr;
|
|
ulong hfscr;
|
|
ulong shadow_srr1;
|
|
#endif
|
|
u32 vrsave; /* also USPRG0 */
|
|
u32 mmucr;
|
|
/* shadow_msr is unused for BookE HV */
|
|
ulong shadow_msr;
|
|
ulong csrr0;
|
|
ulong csrr1;
|
|
ulong dsrr0;
|
|
ulong dsrr1;
|
|
ulong mcsrr0;
|
|
ulong mcsrr1;
|
|
ulong mcsr;
|
|
ulong dec;
|
|
#ifdef CONFIG_BOOKE
|
|
u32 decar;
|
|
#endif
|
|
/* Time base value when we entered the guest */
|
|
u64 entry_tb;
|
|
u64 entry_vtb;
|
|
u64 entry_ic;
|
|
u32 tcr;
|
|
ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
|
|
u32 ivor[64];
|
|
ulong ivpr;
|
|
u32 pvr;
|
|
|
|
u32 shadow_pid;
|
|
u32 shadow_pid1;
|
|
u32 pid;
|
|
u32 swap_pid;
|
|
|
|
u32 ccr0;
|
|
u32 ccr1;
|
|
u32 dbsr;
|
|
|
|
u64 mmcr[4]; /* MMCR0, MMCR1, MMCR2, MMCR3 */
|
|
u64 mmcra;
|
|
u64 mmcrs;
|
|
u32 pmc[8];
|
|
u32 spmc[2];
|
|
u64 siar;
|
|
u64 sdar;
|
|
u64 sier[3];
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
u64 tfhar;
|
|
u64 texasr;
|
|
u64 tfiar;
|
|
u64 orig_texasr;
|
|
|
|
u32 cr_tm;
|
|
u64 xer_tm;
|
|
u64 lr_tm;
|
|
u64 ctr_tm;
|
|
u64 amr_tm;
|
|
u64 ppr_tm;
|
|
u64 dscr_tm;
|
|
u64 tar_tm;
|
|
|
|
ulong gpr_tm[32];
|
|
|
|
struct thread_fp_state fp_tm;
|
|
|
|
struct thread_vr_state vr_tm;
|
|
u32 vrsave_tm; /* also USPRG0 */
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_EXIT_TIMING
|
|
struct mutex exit_timing_lock;
|
|
struct kvmppc_exit_timing timing_exit;
|
|
struct kvmppc_exit_timing timing_last_enter;
|
|
u32 last_exit_type;
|
|
u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
|
|
u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
|
|
u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
|
|
u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
|
|
u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
|
|
u64 timing_last_exit;
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
ulong fault_dar;
|
|
u32 fault_dsisr;
|
|
unsigned long intr_msr;
|
|
/*
|
|
* POWER9 and later: fault_gpa contains the guest real address of page
|
|
* fault for a radix guest, or segment descriptor (equivalent to result
|
|
* from slbmfev of SLB entry that translated the EA) for hash guests.
|
|
*/
|
|
ulong fault_gpa;
|
|
#endif
|
|
|
|
#ifdef CONFIG_BOOKE
|
|
ulong fault_dear;
|
|
ulong fault_esr;
|
|
ulong queued_dear;
|
|
ulong queued_esr;
|
|
spinlock_t wdt_lock;
|
|
struct timer_list wdt_timer;
|
|
u32 tlbcfg[4];
|
|
u32 tlbps[4];
|
|
u32 mmucfg;
|
|
u32 eptcfg;
|
|
u32 epr;
|
|
u64 sprg9;
|
|
u32 pwrmgtcr0;
|
|
u32 crit_save;
|
|
/* guest debug registers*/
|
|
struct debug_reg dbg_reg;
|
|
#endif
|
|
gpa_t paddr_accessed;
|
|
gva_t vaddr_accessed;
|
|
pgd_t *pgdir;
|
|
|
|
u16 io_gpr; /* GPR used as IO source/target */
|
|
u8 mmio_host_swabbed;
|
|
u8 mmio_sign_extend;
|
|
/* conversion between single and double precision */
|
|
u8 mmio_sp64_extend;
|
|
/*
|
|
* Number of simulations for vsx.
|
|
* If we use 2*8bytes to simulate 1*16bytes,
|
|
* then the number should be 2 and
|
|
* mmio_copy_type=KVMPPC_VSX_COPY_DWORD.
|
|
* If we use 4*4bytes to simulate 1*16bytes,
|
|
* the number should be 4 and
|
|
* mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD.
|
|
*/
|
|
u8 mmio_vsx_copy_nums;
|
|
u8 mmio_vsx_offset;
|
|
u8 mmio_vmx_copy_nums;
|
|
u8 mmio_vmx_offset;
|
|
u8 mmio_copy_type;
|
|
u8 osi_needed;
|
|
u8 osi_enabled;
|
|
u8 papr_enabled;
|
|
u8 watchdog_enabled;
|
|
u8 sane;
|
|
u8 cpu_type;
|
|
u8 hcall_needed;
|
|
u8 epr_flags; /* KVMPPC_EPR_xxx */
|
|
u8 epr_needed;
|
|
u8 external_oneshot; /* clear external irq after delivery */
|
|
|
|
u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
|
|
|
|
struct hrtimer dec_timer;
|
|
u64 dec_jiffies;
|
|
u64 dec_expires; /* Relative to guest timebase. */
|
|
unsigned long pending_exceptions;
|
|
u8 ceded;
|
|
u8 prodded;
|
|
u8 doorbell_request;
|
|
u8 irq_pending; /* Used by XIVE to signal pending guest irqs */
|
|
u32 last_inst;
|
|
|
|
struct rcuwait wait;
|
|
struct rcuwait *waitp;
|
|
struct kvmppc_vcore *vcore;
|
|
int ret;
|
|
int trap;
|
|
int state;
|
|
int ptid;
|
|
int thread_cpu;
|
|
int prev_cpu;
|
|
bool timer_running;
|
|
wait_queue_head_t cpu_run;
|
|
struct machine_check_event mce_evt; /* Valid if trap == 0x200 */
|
|
|
|
struct kvm_vcpu_arch_shared *shared;
|
|
#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
|
|
bool shared_big_endian;
|
|
#endif
|
|
unsigned long magic_page_pa; /* phys addr to map the magic page to */
|
|
unsigned long magic_page_ea; /* effect. addr to map the magic page to */
|
|
bool disable_kernel_nx;
|
|
|
|
int irq_type; /* one of KVM_IRQ_* */
|
|
int irq_cpu_id;
|
|
struct openpic *mpic; /* KVM_IRQ_MPIC */
|
|
#ifdef CONFIG_KVM_XICS
|
|
struct kvmppc_icp *icp; /* XICS presentation controller */
|
|
struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */
|
|
__be32 xive_cam_word; /* Cooked W2 in proper endian with valid bit */
|
|
u8 xive_pushed; /* Is the VP pushed on the physical CPU ? */
|
|
u8 xive_esc_on; /* Is the escalation irq enabled ? */
|
|
union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */
|
|
u64 xive_esc_raddr; /* Escalation interrupt ESB real addr */
|
|
u64 xive_esc_vaddr; /* Escalation interrupt ESB virt addr */
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
|
struct kvm_vcpu_arch_shared shregs;
|
|
|
|
struct mmio_hpte_cache mmio_cache;
|
|
unsigned long pgfault_addr;
|
|
long pgfault_index;
|
|
unsigned long pgfault_hpte[2];
|
|
struct mmio_hpte_cache_entry *pgfault_cache;
|
|
|
|
struct task_struct *run_task;
|
|
|
|
spinlock_t vpa_update_lock;
|
|
struct kvmppc_vpa vpa;
|
|
struct kvmppc_vpa dtl;
|
|
struct dtl_entry *dtl_ptr;
|
|
unsigned long dtl_index;
|
|
u64 stolen_logged;
|
|
struct kvmppc_vpa slb_shadow;
|
|
|
|
spinlock_t tbacct_lock;
|
|
u64 busy_stolen;
|
|
u64 busy_preempt;
|
|
|
|
u32 emul_inst;
|
|
|
|
u32 online;
|
|
|
|
u64 hfscr_permitted; /* A mask of permitted HFSCR facilities */
|
|
|
|
/* For support of nested guests */
|
|
struct kvm_nested_guest *nested;
|
|
u64 nested_hfscr; /* HFSCR that the L1 requested for the nested guest */
|
|
u32 nested_vcpu_id;
|
|
gpa_t nested_io_gpr;
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
|
|
struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */
|
|
u64 cur_tb_start; /* when it started */
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_P9_TIMING
|
|
struct kvmhv_tb_accumulator vcpu_entry;
|
|
struct kvmhv_tb_accumulator vcpu_exit;
|
|
struct kvmhv_tb_accumulator in_guest;
|
|
struct kvmhv_tb_accumulator hcall;
|
|
struct kvmhv_tb_accumulator pg_fault;
|
|
struct kvmhv_tb_accumulator guest_entry;
|
|
struct kvmhv_tb_accumulator guest_exit;
|
|
#else
|
|
struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */
|
|
struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */
|
|
struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */
|
|
struct kvmhv_tb_accumulator guest_time; /* guest execution */
|
|
struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */
|
|
#endif
|
|
#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
|
|
};
|
|
|
|
#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
|
|
#define VCPU_VSX_FPR(vcpu, i, j) ((vcpu)->arch.fp.fpr[i][j])
|
|
#define VCPU_VSX_VR(vcpu, i) ((vcpu)->arch.vr.vr[i])
|
|
|
|
/* Values for vcpu->arch.state */
|
|
#define KVMPPC_VCPU_NOTREADY 0
|
|
#define KVMPPC_VCPU_RUNNABLE 1
|
|
#define KVMPPC_VCPU_BUSY_IN_HOST 2
|
|
|
|
/* Values for vcpu->arch.io_gpr */
|
|
#define KVM_MMIO_REG_MASK 0x003f
|
|
#define KVM_MMIO_REG_EXT_MASK 0xffc0
|
|
#define KVM_MMIO_REG_GPR 0x0000
|
|
#define KVM_MMIO_REG_FPR 0x0040
|
|
#define KVM_MMIO_REG_QPR 0x0080
|
|
#define KVM_MMIO_REG_FQPR 0x00c0
|
|
#define KVM_MMIO_REG_VSX 0x0100
|
|
#define KVM_MMIO_REG_VMX 0x0180
|
|
#define KVM_MMIO_REG_NESTED_GPR 0xffc0
|
|
|
|
|
|
#define __KVM_HAVE_ARCH_WQP
|
|
#define __KVM_HAVE_CREATE_DEVICE
|
|
|
|
static inline void kvm_arch_sync_events(struct kvm *kvm) {}
|
|
static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
|
|
static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
|
|
static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
|
|
static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
|
|
static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
|
|
|
|
#define kvm_arch_has_test_clear_young kvm_arch_has_test_clear_young
|
|
static inline bool kvm_arch_has_test_clear_young(void)
|
|
{
|
|
return IS_ENABLED(CONFIG_KVM_BOOK3S_HV_POSSIBLE) &&
|
|
cpu_has_feature(CPU_FTR_HVMODE) && cpu_has_feature(CPU_FTR_ARCH_300) &&
|
|
radix_enabled();
|
|
}
|
|
|
|
#endif /* __POWERPC_KVM_HOST_H__ */
|