342 lines
9.7 KiB
C
342 lines
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/extable.h>
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#include <linux/uaccess.h>
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#include <linux/sched/debug.h>
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#include <linux/bitfield.h>
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#include <xen/xen.h>
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#include <asm/fpu/api.h>
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#include <asm/sev.h>
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#include <asm/traps.h>
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#include <asm/kdebug.h>
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#include <asm/insn-eval.h>
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#include <asm/sgx.h>
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static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr)
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{
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int reg_offset = pt_regs_offset(regs, nr);
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static unsigned long __dummy;
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if (WARN_ON_ONCE(reg_offset < 0))
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return &__dummy;
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return (unsigned long *)((unsigned long)regs + reg_offset);
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}
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static inline unsigned long
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ex_fixup_addr(const struct exception_table_entry *x)
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{
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return (unsigned long)&x->fixup + x->fixup;
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}
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static bool ex_handler_default(const struct exception_table_entry *e,
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struct pt_regs *regs)
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{
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if (e->data & EX_FLAG_CLEAR_AX)
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regs->ax = 0;
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if (e->data & EX_FLAG_CLEAR_DX)
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regs->dx = 0;
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regs->ip = ex_fixup_addr(e);
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return true;
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}
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/*
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* This is the *very* rare case where we do a "load_unaligned_zeropad()"
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* and it's a page crosser into a non-existent page.
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*
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* This happens when we optimistically load a pathname a word-at-a-time
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* and the name is less than the full word and the next page is not
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* mapped. Typically that only happens for CONFIG_DEBUG_PAGEALLOC.
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*
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* NOTE! The faulting address is always a 'mov mem,reg' type instruction
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* of size 'long', and the exception fixup must always point to right
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* after the instruction.
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*/
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static bool ex_handler_zeropad(const struct exception_table_entry *e,
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struct pt_regs *regs,
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unsigned long fault_addr)
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{
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struct insn insn;
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const unsigned long mask = sizeof(long) - 1;
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unsigned long offset, addr, next_ip, len;
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unsigned long *reg;
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next_ip = ex_fixup_addr(e);
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len = next_ip - regs->ip;
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if (len > MAX_INSN_SIZE)
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return false;
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if (insn_decode(&insn, (void *) regs->ip, len, INSN_MODE_KERN))
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return false;
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if (insn.length != len)
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return false;
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if (insn.opcode.bytes[0] != 0x8b)
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return false;
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if (insn.opnd_bytes != sizeof(long))
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return false;
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addr = (unsigned long) insn_get_addr_ref(&insn, regs);
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if (addr == ~0ul)
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return false;
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offset = addr & mask;
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addr = addr & ~mask;
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if (fault_addr != addr + sizeof(long))
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return false;
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reg = insn_get_modrm_reg_ptr(&insn, regs);
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if (!reg)
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return false;
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*reg = *(unsigned long *)addr >> (offset * 8);
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return ex_handler_default(e, regs);
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}
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static bool ex_handler_fault(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ax = trapnr;
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return ex_handler_default(fixup, regs);
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}
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static bool ex_handler_sgx(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ax = trapnr | SGX_ENCLS_FAULT_FLAG;
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return ex_handler_default(fixup, regs);
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}
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/*
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* Handler for when we fail to restore a task's FPU state. We should never get
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* here because the FPU state of a task using the FPU (task->thread.fpu.state)
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* should always be valid. However, past bugs have allowed userspace to set
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* reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
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* These caused XRSTOR to fail when switching to the task, leaking the FPU
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* registers of the task previously executing on the CPU. Mitigate this class
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* of vulnerability by restoring from the initial state (essentially, zeroing
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* out all the FPU registers) if we can't restore from the task's FPU state.
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*/
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static bool ex_handler_fprestore(const struct exception_table_entry *fixup,
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struct pt_regs *regs)
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{
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regs->ip = ex_fixup_addr(fixup);
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WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
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(void *)instruction_pointer(regs));
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fpu_reset_from_exception_fixup();
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return true;
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}
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static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
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return ex_handler_default(fixup, regs);
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}
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static bool ex_handler_copy(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
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return ex_handler_fault(fixup, regs, trapnr);
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}
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static bool ex_handler_msr(const struct exception_table_entry *fixup,
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struct pt_regs *regs, bool wrmsr, bool safe, int reg)
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{
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if (__ONCE_LITE_IF(!safe && wrmsr)) {
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pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
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(unsigned int)regs->cx, (unsigned int)regs->dx,
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(unsigned int)regs->ax, regs->ip, (void *)regs->ip);
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show_stack_regs(regs);
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}
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if (__ONCE_LITE_IF(!safe && !wrmsr)) {
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pr_warn("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
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(unsigned int)regs->cx, regs->ip, (void *)regs->ip);
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show_stack_regs(regs);
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}
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if (!wrmsr) {
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/* Pretend that the read succeeded and returned 0. */
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regs->ax = 0;
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regs->dx = 0;
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}
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if (safe)
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*pt_regs_nr(regs, reg) = -EIO;
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return ex_handler_default(fixup, regs);
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}
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static bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
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struct pt_regs *regs)
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{
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if (static_cpu_has(X86_BUG_NULL_SEG))
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asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
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asm volatile ("mov %0, %%fs" : : "rm" (0));
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return ex_handler_default(fixup, regs);
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}
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static bool ex_handler_imm_reg(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int reg, int imm)
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{
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*pt_regs_nr(regs, reg) = (long)imm;
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return ex_handler_default(fixup, regs);
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}
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static bool ex_handler_ucopy_len(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr, int reg, int imm)
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{
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regs->cx = imm * regs->cx + *pt_regs_nr(regs, reg);
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return ex_handler_uaccess(fixup, regs, trapnr);
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}
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int ex_get_fixup_type(unsigned long ip)
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{
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const struct exception_table_entry *e = search_exception_tables(ip);
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return e ? FIELD_GET(EX_DATA_TYPE_MASK, e->data) : EX_TYPE_NONE;
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}
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int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
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unsigned long fault_addr)
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{
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const struct exception_table_entry *e;
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int type, reg, imm;
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#ifdef CONFIG_PNPBIOS
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if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
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extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
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extern u32 pnp_bios_is_utter_crap;
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pnp_bios_is_utter_crap = 1;
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printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
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__asm__ volatile(
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"movl %0, %%esp\n\t"
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"jmp *%1\n\t"
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: : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
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panic("do_trap: can't hit this");
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}
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#endif
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e = search_exception_tables(regs->ip);
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if (!e)
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return 0;
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type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
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reg = FIELD_GET(EX_DATA_REG_MASK, e->data);
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imm = FIELD_GET(EX_DATA_IMM_MASK, e->data);
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switch (type) {
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case EX_TYPE_DEFAULT:
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case EX_TYPE_DEFAULT_MCE_SAFE:
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return ex_handler_default(e, regs);
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case EX_TYPE_FAULT:
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case EX_TYPE_FAULT_MCE_SAFE:
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return ex_handler_fault(e, regs, trapnr);
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case EX_TYPE_UACCESS:
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return ex_handler_uaccess(e, regs, trapnr);
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case EX_TYPE_COPY:
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return ex_handler_copy(e, regs, trapnr);
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case EX_TYPE_CLEAR_FS:
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return ex_handler_clear_fs(e, regs);
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case EX_TYPE_FPU_RESTORE:
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return ex_handler_fprestore(e, regs);
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case EX_TYPE_BPF:
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return ex_handler_bpf(e, regs);
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case EX_TYPE_WRMSR:
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return ex_handler_msr(e, regs, true, false, reg);
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case EX_TYPE_RDMSR:
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return ex_handler_msr(e, regs, false, false, reg);
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case EX_TYPE_WRMSR_SAFE:
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return ex_handler_msr(e, regs, true, true, reg);
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case EX_TYPE_RDMSR_SAFE:
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return ex_handler_msr(e, regs, false, true, reg);
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case EX_TYPE_WRMSR_IN_MCE:
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ex_handler_msr_mce(regs, true);
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break;
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case EX_TYPE_RDMSR_IN_MCE:
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ex_handler_msr_mce(regs, false);
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break;
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case EX_TYPE_POP_REG:
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regs->sp += sizeof(long);
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fallthrough;
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case EX_TYPE_IMM_REG:
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return ex_handler_imm_reg(e, regs, reg, imm);
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case EX_TYPE_FAULT_SGX:
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return ex_handler_sgx(e, regs, trapnr);
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case EX_TYPE_UCOPY_LEN:
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return ex_handler_ucopy_len(e, regs, trapnr, reg, imm);
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case EX_TYPE_ZEROPAD:
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return ex_handler_zeropad(e, regs, fault_addr);
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}
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BUG();
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}
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extern unsigned int early_recursion_flag;
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/* Restricted version used during very early boot */
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void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
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{
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/* Ignore early NMIs. */
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if (trapnr == X86_TRAP_NMI)
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return;
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if (early_recursion_flag > 2)
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goto halt_loop;
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/*
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* Old CPUs leave the high bits of CS on the stack
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* undefined. I'm not sure which CPUs do this, but at least
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* the 486 DX works this way.
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* Xen pv domains are not using the default __KERNEL_CS.
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*/
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if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
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goto fail;
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/*
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* The full exception fixup machinery is available as soon as
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* the early IDT is loaded. This means that it is the
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* responsibility of extable users to either function correctly
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* when handlers are invoked early or to simply avoid causing
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* exceptions before they're ready to handle them.
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*
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* This is better than filtering which handlers can be used,
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* because refusing to call a handler here is guaranteed to
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* result in a hard-to-debug panic.
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*
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* Keep in mind that not all vectors actually get here. Early
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* page faults, for example, are special.
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*/
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if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
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return;
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if (trapnr == X86_TRAP_UD) {
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if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) {
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/* Skip the ud2. */
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regs->ip += LEN_UD2;
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return;
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}
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/*
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* If this was a BUG and report_bug returns or if this
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* was just a normal #UD, we want to continue onward and
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* crash.
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*/
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}
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fail:
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early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
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(unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
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regs->orig_ax, read_cr2());
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show_regs(regs);
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halt_loop:
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while (true)
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halt();
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}
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