233 lines
6.5 KiB
C
233 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* DMA translation between STA2x11 AMBA memory mapping and the x86 memory mapping
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*
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* ST Microelectronics ConneXt (STA2X11/STA2X10)
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*
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* Copyright (c) 2010-2011 Wind River Systems, Inc.
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*/
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/export.h>
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#include <linux/list.h>
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#include <linux/dma-map-ops.h>
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#include <linux/swiotlb.h>
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#include <asm/iommu.h>
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#define STA2X11_SWIOTLB_SIZE (4*1024*1024)
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/*
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* We build a list of bus numbers that are under the ConneXt. The
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* main bridge hosts 4 busses, which are the 4 endpoints, in order.
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*/
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#define STA2X11_NR_EP 4 /* 0..3 included */
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#define STA2X11_NR_FUNCS 8 /* 0..7 included */
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#define STA2X11_AMBA_SIZE (512 << 20)
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struct sta2x11_ahb_regs { /* saved during suspend */
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u32 base, pexlbase, pexhbase, crw;
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};
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struct sta2x11_mapping {
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int is_suspended;
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struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS];
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};
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struct sta2x11_instance {
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struct list_head list;
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int bus0;
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struct sta2x11_mapping map[STA2X11_NR_EP];
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};
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static LIST_HEAD(sta2x11_instance_list);
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/* At probe time, record new instances of this bridge (likely one only) */
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static void sta2x11_new_instance(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance;
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instance = kzalloc(sizeof(*instance), GFP_ATOMIC);
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if (!instance)
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return;
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/* This has a subordinate bridge, with 4 more-subordinate ones */
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instance->bus0 = pdev->subordinate->number + 1;
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if (list_empty(&sta2x11_instance_list)) {
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int size = STA2X11_SWIOTLB_SIZE;
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/* First instance: register your own swiotlb area */
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dev_info(&pdev->dev, "Using SWIOTLB (size %i)\n", size);
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if (swiotlb_init_late(size, GFP_DMA, NULL))
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dev_emerg(&pdev->dev, "init swiotlb failed\n");
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}
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list_add(&instance->list, &sta2x11_instance_list);
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}
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DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, 0xcc17, sta2x11_new_instance);
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/*
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* Utility functions used in this file from below
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*/
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static struct sta2x11_instance *sta2x11_pdev_to_instance(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance;
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int ep;
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list_for_each_entry(instance, &sta2x11_instance_list, list) {
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ep = pdev->bus->number - instance->bus0;
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if (ep >= 0 && ep < STA2X11_NR_EP)
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return instance;
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}
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return NULL;
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}
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static int sta2x11_pdev_to_ep(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance;
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instance = sta2x11_pdev_to_instance(pdev);
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if (!instance)
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return -1;
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return pdev->bus->number - instance->bus0;
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}
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/* This is exported, as some devices need to access the MFD registers */
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struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev)
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{
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return sta2x11_pdev_to_instance(pdev);
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}
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EXPORT_SYMBOL(sta2x11_get_instance);
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/* At setup time, we use our own ops if the device is a ConneXt one */
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static void sta2x11_setup_pdev(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
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if (!instance) /* either a sta2x11 bridge or another ST device */
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return;
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/* We must enable all devices as master, for audio DMA to work */
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pci_set_master(pdev);
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}
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DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev);
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/*
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* At boot we must set up the mappings for the pcie-to-amba bridge.
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* It involves device access, and the same happens at suspend/resume time
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*/
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#define AHB_MAPB 0xCA4
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#define AHB_CRW(i) (AHB_MAPB + 0 + (i) * 0x10)
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#define AHB_CRW_SZMASK 0xfffffc00UL
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#define AHB_CRW_ENABLE (1 << 0)
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#define AHB_CRW_WTYPE_MEM (2 << 1)
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#define AHB_CRW_ROE (1UL << 3) /* Relax Order Ena */
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#define AHB_CRW_NSE (1UL << 4) /* No Snoop Enable */
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#define AHB_BASE(i) (AHB_MAPB + 4 + (i) * 0x10)
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#define AHB_PEXLBASE(i) (AHB_MAPB + 8 + (i) * 0x10)
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#define AHB_PEXHBASE(i) (AHB_MAPB + 12 + (i) * 0x10)
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/* At probe time, enable mapping for each endpoint, using the pdev */
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static void sta2x11_map_ep(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev);
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struct device *dev = &pdev->dev;
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u32 amba_base, max_amba_addr;
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int i, ret;
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if (!instance)
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return;
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pci_read_config_dword(pdev, AHB_BASE(0), &amba_base);
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max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1;
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ret = dma_direct_set_offset(dev, 0, amba_base, STA2X11_AMBA_SIZE);
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if (ret)
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dev_err(dev, "sta2x11: could not set DMA offset\n");
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dev->bus_dma_limit = max_amba_addr;
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dma_set_mask_and_coherent(&pdev->dev, max_amba_addr);
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/* Configure AHB mapping */
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pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0);
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pci_write_config_dword(pdev, AHB_PEXHBASE(0), 0);
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pci_write_config_dword(pdev, AHB_CRW(0), STA2X11_AMBA_SIZE |
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AHB_CRW_WTYPE_MEM | AHB_CRW_ENABLE);
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/* Disable all the other windows */
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for (i = 1; i < STA2X11_NR_FUNCS; i++)
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pci_write_config_dword(pdev, AHB_CRW(i), 0);
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dev_info(&pdev->dev,
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"sta2x11: Map EP %i: AMBA address %#8x-%#8x\n",
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sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr);
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}
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DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep);
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#ifdef CONFIG_PM /* Some register values must be saved and restored */
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static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev)
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{
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struct sta2x11_instance *instance;
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int ep;
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instance = sta2x11_pdev_to_instance(pdev);
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if (!instance)
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return NULL;
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ep = sta2x11_pdev_to_ep(pdev);
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return instance->map + ep;
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}
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static void suspend_mapping(struct pci_dev *pdev)
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{
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struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
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int i;
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if (!map)
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return;
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if (map->is_suspended)
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return;
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map->is_suspended = 1;
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/* Save all window configs */
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for (i = 0; i < STA2X11_NR_FUNCS; i++) {
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struct sta2x11_ahb_regs *regs = map->regs + i;
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pci_read_config_dword(pdev, AHB_BASE(i), ®s->base);
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pci_read_config_dword(pdev, AHB_PEXLBASE(i), ®s->pexlbase);
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pci_read_config_dword(pdev, AHB_PEXHBASE(i), ®s->pexhbase);
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pci_read_config_dword(pdev, AHB_CRW(i), ®s->crw);
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}
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}
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DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, suspend_mapping);
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static void resume_mapping(struct pci_dev *pdev)
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{
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struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev);
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int i;
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if (!map)
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return;
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if (!map->is_suspended)
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goto out;
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map->is_suspended = 0;
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/* Restore all window configs */
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for (i = 0; i < STA2X11_NR_FUNCS; i++) {
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struct sta2x11_ahb_regs *regs = map->regs + i;
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pci_write_config_dword(pdev, AHB_BASE(i), regs->base);
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pci_write_config_dword(pdev, AHB_PEXLBASE(i), regs->pexlbase);
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pci_write_config_dword(pdev, AHB_PEXHBASE(i), regs->pexhbase);
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pci_write_config_dword(pdev, AHB_CRW(i), regs->crw);
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}
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out:
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pci_set_master(pdev); /* Like at boot, enable master on all devices */
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}
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DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, resume_mapping);
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#endif /* CONFIG_PM */
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