499 lines
14 KiB
C
499 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Cyrix MediaGX and NatSemi Geode Suspend Modulation
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* (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
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* (C) 2002 Hiroshi Miura <miura@da-cha.org>
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* All Rights Reserved
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*
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* The author(s) of this software shall not be held liable for damages
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* of any nature resulting due to the use of this software. This
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* software is provided AS-IS with no warranties.
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*
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* Theoretical note:
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*
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* (see Geode(tm) CS5530 manual (rev.4.1) page.56)
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*
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* CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
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* are based on Suspend Modulation.
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*
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* Suspend Modulation works by asserting and de-asserting the SUSP# pin
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* to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
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* the CPU enters an idle state. GX1 stops its core clock when SUSP# is
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* asserted then power consumption is reduced.
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*
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* Suspend Modulation's OFF/ON duration are configurable
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* with 'Suspend Modulation OFF Count Register'
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* and 'Suspend Modulation ON Count Register'.
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* These registers are 8bit counters that represent the number of
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* 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
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* to the processor.
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*
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* These counters define a ratio which is the effective frequency
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* of operation of the system.
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*
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* OFF Count
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* F_eff = Fgx * ----------------------
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* OFF Count + ON Count
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*
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* 0 <= On Count, Off Count <= 255
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*
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* From these limits, we can get register values
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*
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* off_duration + on_duration <= MAX_DURATION
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* on_duration = off_duration * (stock_freq - freq) / freq
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*
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* off_duration = (freq * DURATION) / stock_freq
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* on_duration = DURATION - off_duration
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*
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*---------------------------------------------------------------------------
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*
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* ChangeLog:
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* Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
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* - fix on/off register mistake
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* - fix cpu_khz calc when it stops cpu modulation.
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*
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* Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
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* - rewrite for Cyrix MediaGX Cx5510/5520 and
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* NatSemi Geode Cs5530(A).
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*
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* Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
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* - cs5530_mod patch for 2.4.19-rc1.
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*
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*---------------------------------------------------------------------------
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*
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* Todo
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* Test on machines with 5510, 5530, 5530A
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*/
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/************************************************************************
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* Suspend Modulation - Definitions *
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************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/cpufreq.h>
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#include <linux/pci.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <asm/cpu_device_id.h>
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#include <asm/processor-cyrix.h>
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/* PCI config registers, all at F0 */
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#define PCI_PMER1 0x80 /* power management enable register 1 */
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#define PCI_PMER2 0x81 /* power management enable register 2 */
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#define PCI_PMER3 0x82 /* power management enable register 3 */
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#define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
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#define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
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#define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
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#define PCI_MODON 0x95 /* suspend modulation ON counter register */
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#define PCI_SUSCFG 0x96 /* suspend configuration register */
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/* PMER1 bits */
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#define GPM (1<<0) /* global power management */
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#define GIT (1<<1) /* globally enable PM device idle timers */
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#define GTR (1<<2) /* globally enable IO traps */
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#define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
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#define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
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/* SUSCFG bits */
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#define SUSMOD (1<<0) /* enable/disable suspend modulation */
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/* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
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#define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
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/* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
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#define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
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/* the below is supported only with cs5530A */
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#define PWRSVE_ISA (1<<3) /* stop ISA clock */
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#define PWRSVE (1<<4) /* active idle */
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struct gxfreq_params {
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u8 on_duration;
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u8 off_duration;
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u8 pci_suscfg;
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u8 pci_pmer1;
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u8 pci_pmer2;
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struct pci_dev *cs55x0;
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};
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static struct gxfreq_params *gx_params;
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static int stock_freq;
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/* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
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static int pci_busclk;
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module_param(pci_busclk, int, 0444);
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/* maximum duration for which the cpu may be suspended
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* (32us * MAX_DURATION). If no parameter is given, this defaults
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* to 255.
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* Note that this leads to a maximum of 8 ms(!) where the CPU clock
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* is suspended -- processing power is just 0.39% of what it used to be,
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* though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
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static int max_duration = 255;
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module_param(max_duration, int, 0444);
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/* For the default policy, we want at least some processing power
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* - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
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*/
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#define POLICY_MIN_DIV 20
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/**
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* we can detect a core multiplier from dir0_lsb
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* from GX1 datasheet p.56,
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* MULT[3:0]:
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* 0000 = SYSCLK multiplied by 4 (test only)
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* 0001 = SYSCLK multiplied by 10
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* 0010 = SYSCLK multiplied by 4
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* 0011 = SYSCLK multiplied by 6
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* 0100 = SYSCLK multiplied by 9
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* 0101 = SYSCLK multiplied by 5
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* 0110 = SYSCLK multiplied by 7
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* 0111 = SYSCLK multiplied by 8
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* of 33.3MHz
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**/
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static int gx_freq_mult[16] = {
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4, 10, 4, 6, 9, 5, 7, 8,
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0, 0, 0, 0, 0, 0, 0, 0
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};
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/****************************************************************
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* Low Level chipset interface *
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****************************************************************/
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static struct pci_device_id gx_chipset_tbl[] __initdata = {
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, gx_chipset_tbl);
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static void gx_write_byte(int reg, int value)
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{
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pci_write_config_byte(gx_params->cs55x0, reg, value);
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}
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/**
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* gx_detect_chipset:
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*
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**/
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static struct pci_dev * __init gx_detect_chipset(void)
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{
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struct pci_dev *gx_pci = NULL;
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/* detect which companion chip is used */
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for_each_pci_dev(gx_pci) {
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if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
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return gx_pci;
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}
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pr_debug("error: no supported chipset found!\n");
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return NULL;
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}
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/**
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* gx_get_cpuspeed:
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*
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* Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
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* Geode CPU runs.
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*/
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static unsigned int gx_get_cpuspeed(unsigned int cpu)
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{
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if ((gx_params->pci_suscfg & SUSMOD) == 0)
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return stock_freq;
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return (stock_freq * gx_params->off_duration)
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/ (gx_params->on_duration + gx_params->off_duration);
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}
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/**
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* gx_validate_speed:
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* determine current cpu speed
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*
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**/
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static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
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u8 *off_duration)
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{
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unsigned int i;
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u8 tmp_on, tmp_off;
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int old_tmp_freq = stock_freq;
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int tmp_freq;
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*off_duration = 1;
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*on_duration = 0;
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for (i = max_duration; i > 0; i--) {
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tmp_off = ((khz * i) / stock_freq) & 0xff;
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tmp_on = i - tmp_off;
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tmp_freq = (stock_freq * tmp_off) / i;
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/* if this relation is closer to khz, use this. If it's equal,
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* prefer it, too - lower latency */
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if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
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*on_duration = tmp_on;
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*off_duration = tmp_off;
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old_tmp_freq = tmp_freq;
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}
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}
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return old_tmp_freq;
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}
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/**
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* gx_set_cpuspeed:
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* set cpu speed in khz.
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**/
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static void gx_set_cpuspeed(struct cpufreq_policy *policy, unsigned int khz)
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{
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u8 suscfg, pmer1;
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unsigned int new_khz;
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unsigned long flags;
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struct cpufreq_freqs freqs;
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freqs.old = gx_get_cpuspeed(0);
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new_khz = gx_validate_speed(khz, &gx_params->on_duration,
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&gx_params->off_duration);
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freqs.new = new_khz;
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cpufreq_freq_transition_begin(policy, &freqs);
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local_irq_save(flags);
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if (new_khz != stock_freq) {
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/* if new khz == 100% of CPU speed, it is special case */
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switch (gx_params->cs55x0->device) {
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case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
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pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
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/* FIXME: need to test other values -- Zwane,Miura */
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/* typical 2 to 4ms */
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gx_write_byte(PCI_IRQTC, 4);
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/* typical 50 to 100ms */
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gx_write_byte(PCI_VIDTC, 100);
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gx_write_byte(PCI_PMER1, pmer1);
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if (gx_params->cs55x0->revision < 0x10) {
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/* CS5530(rev 1.2, 1.3) */
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suscfg = gx_params->pci_suscfg|SUSMOD;
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} else {
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/* CS5530A,B.. */
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suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
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}
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break;
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case PCI_DEVICE_ID_CYRIX_5520:
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case PCI_DEVICE_ID_CYRIX_5510:
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suscfg = gx_params->pci_suscfg | SUSMOD;
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break;
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default:
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local_irq_restore(flags);
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pr_debug("fatal: try to set unknown chipset.\n");
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return;
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}
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} else {
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suscfg = gx_params->pci_suscfg & ~(SUSMOD);
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gx_params->off_duration = 0;
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gx_params->on_duration = 0;
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pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n");
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}
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gx_write_byte(PCI_MODOFF, gx_params->off_duration);
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gx_write_byte(PCI_MODON, gx_params->on_duration);
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gx_write_byte(PCI_SUSCFG, suscfg);
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pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
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local_irq_restore(flags);
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gx_params->pci_suscfg = suscfg;
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cpufreq_freq_transition_end(policy, &freqs, 0);
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pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
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gx_params->on_duration * 32, gx_params->off_duration * 32);
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pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
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}
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/****************************************************************
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* High level functions *
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****************************************************************/
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/*
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* cpufreq_gx_verify: test if frequency range is valid
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*
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* This function checks if a given frequency range in kHz is valid
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* for the hardware supported by the driver.
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*/
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static int cpufreq_gx_verify(struct cpufreq_policy_data *policy)
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{
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unsigned int tmp_freq = 0;
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u8 tmp1, tmp2;
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if (!stock_freq || !policy)
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return -EINVAL;
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policy->cpu = 0;
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cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
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stock_freq);
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/* it needs to be assured that at least one supported frequency is
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* within policy->min and policy->max. If it is not, policy->max
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* needs to be increased until one frequency is supported.
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* policy->min may not be decreased, though. This way we guarantee a
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* specific processing capacity.
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*/
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tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
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if (tmp_freq < policy->min)
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tmp_freq += stock_freq / max_duration;
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policy->min = tmp_freq;
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if (policy->min > policy->max)
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policy->max = tmp_freq;
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tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
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if (tmp_freq > policy->max)
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tmp_freq -= stock_freq / max_duration;
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policy->max = tmp_freq;
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if (policy->max < policy->min)
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policy->max = policy->min;
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cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
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stock_freq);
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return 0;
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}
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/*
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* cpufreq_gx_target:
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*
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*/
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static int cpufreq_gx_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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u8 tmp1, tmp2;
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unsigned int tmp_freq;
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if (!stock_freq || !policy)
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return -EINVAL;
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policy->cpu = 0;
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tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
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while (tmp_freq < policy->min) {
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tmp_freq += stock_freq / max_duration;
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tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
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}
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while (tmp_freq > policy->max) {
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tmp_freq -= stock_freq / max_duration;
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tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
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}
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gx_set_cpuspeed(policy, tmp_freq);
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return 0;
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}
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static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
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{
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unsigned int maxfreq;
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if (!policy || policy->cpu != 0)
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return -ENODEV;
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/* determine maximum frequency */
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if (pci_busclk)
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maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
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else if (cpu_khz)
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maxfreq = cpu_khz;
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else
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maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
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stock_freq = maxfreq;
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pr_debug("cpu max frequency is %d.\n", maxfreq);
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/* setup basic struct for cpufreq API */
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policy->cpu = 0;
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if (max_duration < POLICY_MIN_DIV)
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policy->min = maxfreq / max_duration;
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else
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policy->min = maxfreq / POLICY_MIN_DIV;
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policy->max = maxfreq;
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policy->cpuinfo.min_freq = maxfreq / max_duration;
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policy->cpuinfo.max_freq = maxfreq;
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return 0;
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}
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/*
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* cpufreq_gx_init:
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* MediaGX/Geode GX initialize cpufreq driver
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*/
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static struct cpufreq_driver gx_suspmod_driver = {
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.flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
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.get = gx_get_cpuspeed,
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.verify = cpufreq_gx_verify,
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.target = cpufreq_gx_target,
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.init = cpufreq_gx_cpu_init,
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.name = "gx-suspmod",
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};
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static int __init cpufreq_gx_init(void)
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{
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int ret;
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struct gxfreq_params *params;
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struct pci_dev *gx_pci;
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/* Test if we have the right hardware */
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gx_pci = gx_detect_chipset();
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if (gx_pci == NULL)
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return -ENODEV;
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/* check whether module parameters are sane */
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if (max_duration > 0xff)
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max_duration = 0xff;
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pr_debug("geode suspend modulation available.\n");
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params = kzalloc(sizeof(*params), GFP_KERNEL);
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if (params == NULL)
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return -ENOMEM;
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params->cs55x0 = gx_pci;
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gx_params = params;
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/* keep cs55x0 configurations */
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pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
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pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
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pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
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pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
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pci_read_config_byte(params->cs55x0, PCI_MODOFF,
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&(params->off_duration));
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ret = cpufreq_register_driver(&gx_suspmod_driver);
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if (ret) {
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kfree(params);
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return ret; /* register error! */
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}
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return 0;
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}
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static void __exit cpufreq_gx_exit(void)
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{
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cpufreq_unregister_driver(&gx_suspmod_driver);
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pci_dev_put(gx_params->cs55x0);
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kfree(gx_params);
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}
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MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
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MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
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MODULE_LICENSE("GPL");
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module_init(cpufreq_gx_init);
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module_exit(cpufreq_gx_exit);
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