436 lines
11 KiB
C
436 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Crypto acceleration support for Rockchip RK3288
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Zain Wang <zain.wang@rock-chips.com>
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*
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* Some ideas are from marvell-cesa.c and s5p-sss.c driver.
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*/
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#include "rk3288_crypto.h"
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/crypto.h>
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#include <linux/reset.h>
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static struct rockchip_ip rocklist = {
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.dev_list = LIST_HEAD_INIT(rocklist.dev_list),
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.lock = __SPIN_LOCK_UNLOCKED(rocklist.lock),
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};
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struct rk_crypto_info *get_rk_crypto(void)
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{
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struct rk_crypto_info *first;
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spin_lock(&rocklist.lock);
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first = list_first_entry_or_null(&rocklist.dev_list,
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struct rk_crypto_info, list);
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list_rotate_left(&rocklist.dev_list);
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spin_unlock(&rocklist.lock);
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return first;
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}
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static const struct rk_variant rk3288_variant = {
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.num_clks = 4,
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.rkclks = {
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{ "sclk", 150000000},
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}
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};
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static const struct rk_variant rk3328_variant = {
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.num_clks = 3,
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};
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static const struct rk_variant rk3399_variant = {
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.num_clks = 3,
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};
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static int rk_crypto_get_clks(struct rk_crypto_info *dev)
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{
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int i, j, err;
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unsigned long cr;
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dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks);
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if (dev->num_clks < dev->variant->num_clks) {
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dev_err(dev->dev, "Missing clocks, got %d instead of %d\n",
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dev->num_clks, dev->variant->num_clks);
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return -EINVAL;
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}
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for (i = 0; i < dev->num_clks; i++) {
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cr = clk_get_rate(dev->clks[i].clk);
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for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) {
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if (dev->variant->rkclks[j].max == 0)
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continue;
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if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id))
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continue;
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if (cr > dev->variant->rkclks[j].max) {
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err = clk_set_rate(dev->clks[i].clk,
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dev->variant->rkclks[j].max);
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if (err)
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dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n",
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dev->variant->rkclks[j].name, cr,
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dev->variant->rkclks[j].max);
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else
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dev_info(dev->dev, "Downclocking %s from %lu to %lu\n",
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dev->variant->rkclks[j].name, cr,
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dev->variant->rkclks[j].max);
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}
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}
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}
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return 0;
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}
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static int rk_crypto_enable_clk(struct rk_crypto_info *dev)
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{
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int err;
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err = clk_bulk_prepare_enable(dev->num_clks, dev->clks);
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if (err)
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dev_err(dev->dev, "Could not enable clock clks\n");
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return err;
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}
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static void rk_crypto_disable_clk(struct rk_crypto_info *dev)
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{
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clk_bulk_disable_unprepare(dev->num_clks, dev->clks);
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}
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/*
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* Power management strategy: The device is suspended until a request
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* is handled. For avoiding suspend/resume yoyo, the autosuspend is set to 2s.
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*/
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static int rk_crypto_pm_suspend(struct device *dev)
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{
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struct rk_crypto_info *rkdev = dev_get_drvdata(dev);
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rk_crypto_disable_clk(rkdev);
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reset_control_assert(rkdev->rst);
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return 0;
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}
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static int rk_crypto_pm_resume(struct device *dev)
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{
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struct rk_crypto_info *rkdev = dev_get_drvdata(dev);
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int ret;
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ret = rk_crypto_enable_clk(rkdev);
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if (ret)
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return ret;
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reset_control_deassert(rkdev->rst);
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return 0;
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}
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static const struct dev_pm_ops rk_crypto_pm_ops = {
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SET_RUNTIME_PM_OPS(rk_crypto_pm_suspend, rk_crypto_pm_resume, NULL)
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};
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static int rk_crypto_pm_init(struct rk_crypto_info *rkdev)
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{
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int err;
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pm_runtime_use_autosuspend(rkdev->dev);
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pm_runtime_set_autosuspend_delay(rkdev->dev, 2000);
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err = pm_runtime_set_suspended(rkdev->dev);
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if (err)
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return err;
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pm_runtime_enable(rkdev->dev);
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return err;
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}
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static void rk_crypto_pm_exit(struct rk_crypto_info *rkdev)
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{
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pm_runtime_disable(rkdev->dev);
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}
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static irqreturn_t rk_crypto_irq_handle(int irq, void *dev_id)
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{
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struct rk_crypto_info *dev = platform_get_drvdata(dev_id);
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u32 interrupt_status;
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interrupt_status = CRYPTO_READ(dev, RK_CRYPTO_INTSTS);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, interrupt_status);
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dev->status = 1;
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if (interrupt_status & 0x0a) {
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dev_warn(dev->dev, "DMA Error\n");
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dev->status = 0;
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}
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complete(&dev->complete);
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return IRQ_HANDLED;
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}
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static struct rk_crypto_tmp *rk_cipher_algs[] = {
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&rk_ecb_aes_alg,
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&rk_cbc_aes_alg,
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&rk_ecb_des_alg,
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&rk_cbc_des_alg,
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&rk_ecb_des3_ede_alg,
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&rk_cbc_des3_ede_alg,
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&rk_ahash_sha1,
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&rk_ahash_sha256,
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&rk_ahash_md5,
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};
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#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG
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static int rk_crypto_debugfs_show(struct seq_file *seq, void *v)
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{
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struct rk_crypto_info *dd;
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unsigned int i;
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spin_lock(&rocklist.lock);
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list_for_each_entry(dd, &rocklist.dev_list, list) {
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seq_printf(seq, "%s %s requests: %lu\n",
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dev_driver_string(dd->dev), dev_name(dd->dev),
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dd->nreq);
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}
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spin_unlock(&rocklist.lock);
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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if (!rk_cipher_algs[i]->dev)
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continue;
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switch (rk_cipher_algs[i]->type) {
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case CRYPTO_ALG_TYPE_SKCIPHER:
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seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
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rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name,
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rk_cipher_algs[i]->alg.skcipher.base.cra_name,
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rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb);
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seq_printf(seq, "\tfallback due to length: %lu\n",
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rk_cipher_algs[i]->stat_fb_len);
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seq_printf(seq, "\tfallback due to alignment: %lu\n",
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rk_cipher_algs[i]->stat_fb_align);
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seq_printf(seq, "\tfallback due to SGs: %lu\n",
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rk_cipher_algs[i]->stat_fb_sgdiff);
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break;
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case CRYPTO_ALG_TYPE_AHASH:
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seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
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rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name,
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rk_cipher_algs[i]->alg.hash.halg.base.cra_name,
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rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb);
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break;
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}
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}
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(rk_crypto_debugfs);
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#endif
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static void register_debugfs(struct rk_crypto_info *crypto_info)
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{
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#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG
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/* Ignore error of debugfs */
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rocklist.dbgfs_dir = debugfs_create_dir("rk3288_crypto", NULL);
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rocklist.dbgfs_stats = debugfs_create_file("stats", 0444,
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rocklist.dbgfs_dir,
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&rocklist,
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&rk_crypto_debugfs_fops);
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#endif
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}
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static int rk_crypto_register(struct rk_crypto_info *crypto_info)
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{
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unsigned int i, k;
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int err = 0;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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rk_cipher_algs[i]->dev = crypto_info;
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switch (rk_cipher_algs[i]->type) {
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case CRYPTO_ALG_TYPE_SKCIPHER:
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dev_info(crypto_info->dev, "Register %s as %s\n",
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rk_cipher_algs[i]->alg.skcipher.base.cra_name,
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rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name);
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err = crypto_register_skcipher(&rk_cipher_algs[i]->alg.skcipher);
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break;
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case CRYPTO_ALG_TYPE_AHASH:
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dev_info(crypto_info->dev, "Register %s as %s\n",
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rk_cipher_algs[i]->alg.hash.halg.base.cra_name,
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rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name);
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err = crypto_register_ahash(&rk_cipher_algs[i]->alg.hash);
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break;
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default:
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dev_err(crypto_info->dev, "unknown algorithm\n");
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}
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if (err)
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goto err_cipher_algs;
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}
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return 0;
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err_cipher_algs:
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for (k = 0; k < i; k++) {
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if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER)
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crypto_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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return err;
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}
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static void rk_crypto_unregister(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) {
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if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER)
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crypto_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher);
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else
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crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash);
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}
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}
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static const struct of_device_id crypto_of_id_table[] = {
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{ .compatible = "rockchip,rk3288-crypto",
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.data = &rk3288_variant,
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},
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{ .compatible = "rockchip,rk3328-crypto",
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.data = &rk3328_variant,
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},
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{ .compatible = "rockchip,rk3399-crypto",
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.data = &rk3399_variant,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, crypto_of_id_table);
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static int rk_crypto_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rk_crypto_info *crypto_info, *first;
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int err = 0;
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crypto_info = devm_kzalloc(&pdev->dev,
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sizeof(*crypto_info), GFP_KERNEL);
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if (!crypto_info) {
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err = -ENOMEM;
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goto err_crypto;
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}
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crypto_info->dev = &pdev->dev;
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platform_set_drvdata(pdev, crypto_info);
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crypto_info->variant = of_device_get_match_data(&pdev->dev);
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if (!crypto_info->variant) {
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dev_err(&pdev->dev, "Missing variant\n");
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return -EINVAL;
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}
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crypto_info->rst = devm_reset_control_array_get_exclusive(dev);
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if (IS_ERR(crypto_info->rst)) {
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err = PTR_ERR(crypto_info->rst);
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goto err_crypto;
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}
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reset_control_assert(crypto_info->rst);
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usleep_range(10, 20);
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reset_control_deassert(crypto_info->rst);
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crypto_info->reg = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(crypto_info->reg)) {
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err = PTR_ERR(crypto_info->reg);
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goto err_crypto;
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}
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err = rk_crypto_get_clks(crypto_info);
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if (err)
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goto err_crypto;
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crypto_info->irq = platform_get_irq(pdev, 0);
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if (crypto_info->irq < 0) {
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err = crypto_info->irq;
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goto err_crypto;
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}
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err = devm_request_irq(&pdev->dev, crypto_info->irq,
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rk_crypto_irq_handle, IRQF_SHARED,
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"rk-crypto", pdev);
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if (err) {
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dev_err(&pdev->dev, "irq request failed.\n");
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goto err_crypto;
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}
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crypto_info->engine = crypto_engine_alloc_init(&pdev->dev, true);
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crypto_engine_start(crypto_info->engine);
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init_completion(&crypto_info->complete);
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err = rk_crypto_pm_init(crypto_info);
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if (err)
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goto err_pm;
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spin_lock(&rocklist.lock);
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first = list_first_entry_or_null(&rocklist.dev_list,
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struct rk_crypto_info, list);
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list_add_tail(&crypto_info->list, &rocklist.dev_list);
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spin_unlock(&rocklist.lock);
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if (!first) {
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err = rk_crypto_register(crypto_info);
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if (err) {
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dev_err(dev, "Fail to register crypto algorithms");
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goto err_register_alg;
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}
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register_debugfs(crypto_info);
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}
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return 0;
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err_register_alg:
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rk_crypto_pm_exit(crypto_info);
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err_pm:
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crypto_engine_exit(crypto_info->engine);
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err_crypto:
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dev_err(dev, "Crypto Accelerator not successfully registered\n");
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return err;
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}
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static int rk_crypto_remove(struct platform_device *pdev)
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{
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struct rk_crypto_info *crypto_tmp = platform_get_drvdata(pdev);
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struct rk_crypto_info *first;
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spin_lock_bh(&rocklist.lock);
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list_del(&crypto_tmp->list);
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first = list_first_entry_or_null(&rocklist.dev_list,
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struct rk_crypto_info, list);
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spin_unlock_bh(&rocklist.lock);
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if (!first) {
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#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG
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debugfs_remove_recursive(rocklist.dbgfs_dir);
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#endif
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rk_crypto_unregister();
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}
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rk_crypto_pm_exit(crypto_tmp);
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crypto_engine_exit(crypto_tmp->engine);
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return 0;
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}
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static struct platform_driver crypto_driver = {
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.probe = rk_crypto_probe,
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.remove = rk_crypto_remove,
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.driver = {
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.name = "rk3288-crypto",
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.pm = &rk_crypto_pm_ops,
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.of_match_table = crypto_of_id_table,
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},
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};
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module_platform_driver(crypto_driver);
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MODULE_AUTHOR("Zain Wang <zain.wang@rock-chips.com>");
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MODULE_DESCRIPTION("Support for Rockchip's cryptographic engine");
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MODULE_LICENSE("GPL");
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