641 lines
16 KiB
C
641 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* DesignWare HDMI audio driver
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*
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* Written and tested against the Designware HDMI Tx found in iMX6.
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*/
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <drm/bridge/dw_hdmi.h>
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#include <drm/drm_edid.h>
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#include <sound/asoundef.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_drm_eld.h>
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#include <sound/pcm_iec958.h>
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#include "dw-hdmi-audio.h"
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#define DRIVER_NAME "dw-hdmi-ahb-audio"
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/* Provide some bits rather than bit offsets */
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enum {
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HDMI_AHB_DMA_CONF0_SW_FIFO_RST = BIT(7),
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HDMI_AHB_DMA_CONF0_EN_HLOCK = BIT(3),
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HDMI_AHB_DMA_START_START = BIT(0),
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HDMI_AHB_DMA_STOP_STOP = BIT(0),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = BIT(5),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = BIT(4),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = BIT(3),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = BIT(2),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL =
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR |
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST |
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY |
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE |
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL |
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HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY,
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HDMI_IH_AHBDMAAUD_STAT0_ERROR = BIT(5),
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HDMI_IH_AHBDMAAUD_STAT0_LOST = BIT(4),
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HDMI_IH_AHBDMAAUD_STAT0_RETRY = BIT(3),
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HDMI_IH_AHBDMAAUD_STAT0_DONE = BIT(2),
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HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = BIT(1),
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HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = BIT(0),
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HDMI_IH_AHBDMAAUD_STAT0_ALL =
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HDMI_IH_AHBDMAAUD_STAT0_ERROR |
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HDMI_IH_AHBDMAAUD_STAT0_LOST |
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HDMI_IH_AHBDMAAUD_STAT0_RETRY |
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HDMI_IH_AHBDMAAUD_STAT0_DONE |
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HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL |
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HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY,
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HDMI_AHB_DMA_CONF0_INCR16 = 2 << 1,
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HDMI_AHB_DMA_CONF0_INCR8 = 1 << 1,
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HDMI_AHB_DMA_CONF0_INCR4 = 0,
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HDMI_AHB_DMA_CONF0_BURST_MODE = BIT(0),
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HDMI_AHB_DMA_MASK_DONE = BIT(7),
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HDMI_REVISION_ID = 0x0001,
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HDMI_IH_AHBDMAAUD_STAT0 = 0x0109,
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HDMI_IH_MUTE_AHBDMAAUD_STAT0 = 0x0189,
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HDMI_AHB_DMA_CONF0 = 0x3600,
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HDMI_AHB_DMA_START = 0x3601,
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HDMI_AHB_DMA_STOP = 0x3602,
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HDMI_AHB_DMA_THRSLD = 0x3603,
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HDMI_AHB_DMA_STRADDR0 = 0x3604,
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HDMI_AHB_DMA_STPADDR0 = 0x3608,
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HDMI_AHB_DMA_MASK = 0x3614,
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HDMI_AHB_DMA_POL = 0x3615,
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HDMI_AHB_DMA_CONF1 = 0x3616,
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HDMI_AHB_DMA_BUFFPOL = 0x361a,
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};
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struct dw_hdmi_channel_conf {
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u8 conf1;
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u8 ca;
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};
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/*
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* The default mapping of ALSA channels to HDMI channels and speaker
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* allocation bits. Note that we can't do channel remapping here -
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* channels must be in the same order.
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*
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* Mappings for alsa-lib pcm/surround*.conf files:
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*
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* Front Sur4.0 Sur4.1 Sur5.0 Sur5.1 Sur7.1
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* Channels 2 4 6 6 6 8
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*
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* Our mapping from ALSA channel to CEA686D speaker name and HDMI channel:
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*
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* Number of ALSA channels
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* ALSA Channel 2 3 4 5 6 7 8
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* 0 FL:0 = = = = = =
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* 1 FR:1 = = = = = =
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* 2 FC:3 RL:4 LFE:2 = = =
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* 3 RR:5 RL:4 FC:3 = =
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* 4 RR:5 RL:4 = =
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* 5 RR:5 = =
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* 6 RC:6 =
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* 7 RLC/FRC RLC/FRC
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*/
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static struct dw_hdmi_channel_conf default_hdmi_channel_config[7] = {
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{ 0x03, 0x00 }, /* FL,FR */
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{ 0x0b, 0x02 }, /* FL,FR,FC */
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{ 0x33, 0x08 }, /* FL,FR,RL,RR */
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{ 0x37, 0x09 }, /* FL,FR,LFE,RL,RR */
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{ 0x3f, 0x0b }, /* FL,FR,LFE,FC,RL,RR */
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{ 0x7f, 0x0f }, /* FL,FR,LFE,FC,RL,RR,RC */
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{ 0xff, 0x13 }, /* FL,FR,LFE,FC,RL,RR,[FR]RC,[FR]LC */
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};
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struct snd_dw_hdmi {
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struct snd_card *card;
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struct snd_pcm *pcm;
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spinlock_t lock;
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struct dw_hdmi_audio_data data;
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struct snd_pcm_substream *substream;
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void (*reformat)(struct snd_dw_hdmi *, size_t, size_t);
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void *buf_src;
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void *buf_dst;
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dma_addr_t buf_addr;
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unsigned buf_offset;
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unsigned buf_period;
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unsigned buf_size;
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unsigned channels;
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u8 revision;
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u8 iec_offset;
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u8 cs[192][8];
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};
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static void dw_hdmi_writel(u32 val, void __iomem *ptr)
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{
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writeb_relaxed(val, ptr);
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writeb_relaxed(val >> 8, ptr + 1);
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writeb_relaxed(val >> 16, ptr + 2);
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writeb_relaxed(val >> 24, ptr + 3);
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}
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/*
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* Convert to hardware format: The userspace buffer contains IEC958 samples,
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* with the PCUV bits in bits 31..28 and audio samples in bits 27..4. We
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* need these to be in bits 27..24, with the IEC B bit in bit 28, and audio
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* samples in 23..0.
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*
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* Default preamble in bits 3..0: 8 = block start, 4 = even 2 = odd
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*
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* Ideally, we could do with having the data properly formatted in userspace.
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*/
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static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw,
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size_t offset, size_t bytes)
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{
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u32 *src = dw->buf_src + offset;
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u32 *dst = dw->buf_dst + offset;
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u32 *end = dw->buf_src + offset + bytes;
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do {
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u32 b, sample = *src++;
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b = (sample & 8) << (28 - 3);
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sample >>= 4;
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*dst++ = sample | b;
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} while (src < end);
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}
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static u32 parity(u32 sample)
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{
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sample ^= sample >> 16;
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sample ^= sample >> 8;
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sample ^= sample >> 4;
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sample ^= sample >> 2;
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sample ^= sample >> 1;
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return (sample & 1) << 27;
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}
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static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw,
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size_t offset, size_t bytes)
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{
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u32 *src = dw->buf_src + offset;
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u32 *dst = dw->buf_dst + offset;
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u32 *end = dw->buf_src + offset + bytes;
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do {
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unsigned i;
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u8 *cs;
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cs = dw->cs[dw->iec_offset++];
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if (dw->iec_offset >= 192)
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dw->iec_offset = 0;
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i = dw->channels;
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do {
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u32 sample = *src++;
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sample &= ~0xff000000;
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sample |= *cs++ << 24;
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sample |= parity(sample & ~0xf8000000);
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*dst++ = sample;
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} while (--i);
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} while (src < end);
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}
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static void dw_hdmi_create_cs(struct snd_dw_hdmi *dw,
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struct snd_pcm_runtime *runtime)
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{
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u8 cs[4];
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unsigned ch, i, j;
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snd_pcm_create_iec958_consumer(runtime, cs, sizeof(cs));
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memset(dw->cs, 0, sizeof(dw->cs));
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for (ch = 0; ch < 8; ch++) {
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cs[2] &= ~IEC958_AES2_CON_CHANNEL;
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cs[2] |= (ch + 1) << 4;
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for (i = 0; i < ARRAY_SIZE(cs); i++) {
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unsigned c = cs[i];
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for (j = 0; j < 8; j++, c >>= 1)
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dw->cs[i * 8 + j][ch] = (c & 1) << 2;
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}
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}
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dw->cs[0][0] |= BIT(4);
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}
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static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
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{
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void __iomem *base = dw->data.base;
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unsigned offset = dw->buf_offset;
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unsigned period = dw->buf_period;
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u32 start, stop;
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dw->reformat(dw, offset, period);
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/* Clear all irqs before enabling irqs and starting DMA */
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writeb_relaxed(HDMI_IH_AHBDMAAUD_STAT0_ALL,
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base + HDMI_IH_AHBDMAAUD_STAT0);
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start = dw->buf_addr + offset;
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stop = start + period - 1;
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/* Setup the hardware start/stop addresses */
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dw_hdmi_writel(start, base + HDMI_AHB_DMA_STRADDR0);
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dw_hdmi_writel(stop, base + HDMI_AHB_DMA_STPADDR0);
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writeb_relaxed((u8)~HDMI_AHB_DMA_MASK_DONE, base + HDMI_AHB_DMA_MASK);
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writeb(HDMI_AHB_DMA_START_START, base + HDMI_AHB_DMA_START);
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offset += period;
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if (offset >= dw->buf_size)
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offset = 0;
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dw->buf_offset = offset;
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}
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static void dw_hdmi_stop_dma(struct snd_dw_hdmi *dw)
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{
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/* Disable interrupts before disabling DMA */
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writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK);
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writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, dw->data.base + HDMI_AHB_DMA_STOP);
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}
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static irqreturn_t snd_dw_hdmi_irq(int irq, void *data)
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{
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struct snd_dw_hdmi *dw = data;
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struct snd_pcm_substream *substream;
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unsigned stat;
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stat = readb_relaxed(dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
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if (!stat)
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return IRQ_NONE;
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writeb_relaxed(stat, dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
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substream = dw->substream;
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if (stat & HDMI_IH_AHBDMAAUD_STAT0_DONE && substream) {
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snd_pcm_period_elapsed(substream);
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spin_lock(&dw->lock);
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if (dw->substream)
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dw_hdmi_start_dma(dw);
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spin_unlock(&dw->lock);
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}
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return IRQ_HANDLED;
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}
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static const struct snd_pcm_hardware dw_hdmi_hw = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID,
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.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE |
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SNDRV_PCM_FMTBIT_S24_LE,
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.rates = SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_88200 |
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SNDRV_PCM_RATE_96000 |
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SNDRV_PCM_RATE_176400 |
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SNDRV_PCM_RATE_192000,
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.channels_min = 2,
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.channels_max = 8,
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.buffer_bytes_max = 1024 * 1024,
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.period_bytes_min = 256,
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.period_bytes_max = 8192, /* ERR004323: must limit to 8k */
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.periods_min = 2,
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.periods_max = 16,
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.fifo_size = 0,
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};
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static int dw_hdmi_open(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_dw_hdmi *dw = substream->private_data;
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void __iomem *base = dw->data.base;
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u8 *eld;
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int ret;
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runtime->hw = dw_hdmi_hw;
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eld = dw->data.get_eld(dw->data.hdmi);
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if (eld) {
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ret = snd_pcm_hw_constraint_eld(runtime, eld);
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if (ret < 0)
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return ret;
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}
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ret = snd_pcm_limit_hw_rates(runtime);
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if (ret < 0)
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return ret;
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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return ret;
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/* Limit the buffer size to the size of the preallocated buffer */
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ret = snd_pcm_hw_constraint_minmax(runtime,
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SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
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0, substream->dma_buffer.bytes);
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if (ret < 0)
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return ret;
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/* Clear FIFO */
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writeb_relaxed(HDMI_AHB_DMA_CONF0_SW_FIFO_RST,
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base + HDMI_AHB_DMA_CONF0);
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/* Configure interrupt polarities */
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writeb_relaxed(~0, base + HDMI_AHB_DMA_POL);
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writeb_relaxed(~0, base + HDMI_AHB_DMA_BUFFPOL);
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/* Keep interrupts masked, and clear any pending */
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writeb_relaxed(~0, base + HDMI_AHB_DMA_MASK);
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writeb_relaxed(~0, base + HDMI_IH_AHBDMAAUD_STAT0);
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ret = request_irq(dw->data.irq, snd_dw_hdmi_irq, IRQF_SHARED,
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"dw-hdmi-audio", dw);
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if (ret)
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return ret;
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/* Un-mute done interrupt */
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writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL &
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~HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE,
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base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
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return 0;
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}
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static int dw_hdmi_close(struct snd_pcm_substream *substream)
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{
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struct snd_dw_hdmi *dw = substream->private_data;
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/* Mute all interrupts */
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writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
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dw->data.base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
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free_irq(dw->data.irq, dw);
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return 0;
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}
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static int dw_hdmi_hw_free(struct snd_pcm_substream *substream)
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{
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return snd_pcm_lib_free_vmalloc_buffer(substream);
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}
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static int dw_hdmi_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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/* Allocate the PCM runtime buffer, which is exposed to userspace. */
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return snd_pcm_lib_alloc_vmalloc_buffer(substream,
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params_buffer_bytes(params));
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}
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static int dw_hdmi_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_dw_hdmi *dw = substream->private_data;
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u8 threshold, conf0, conf1, ca;
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/* Setup as per 3.0.5 FSL 4.1.0 BSP */
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switch (dw->revision) {
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case 0x0a:
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conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
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HDMI_AHB_DMA_CONF0_INCR4;
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if (runtime->channels == 2)
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threshold = 126;
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else
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threshold = 124;
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break;
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case 0x1a:
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conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
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HDMI_AHB_DMA_CONF0_INCR8;
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threshold = 128;
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break;
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default:
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/* NOTREACHED */
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return -EINVAL;
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}
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dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate);
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/* Minimum number of bytes in the fifo. */
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runtime->hw.fifo_size = threshold * 32;
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conf0 |= HDMI_AHB_DMA_CONF0_EN_HLOCK;
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conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1;
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ca = default_hdmi_channel_config[runtime->channels - 2].ca;
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writeb_relaxed(threshold, dw->data.base + HDMI_AHB_DMA_THRSLD);
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writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0);
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writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1);
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dw_hdmi_set_channel_count(dw->data.hdmi, runtime->channels);
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dw_hdmi_set_channel_allocation(dw->data.hdmi, ca);
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switch (runtime->format) {
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case SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE:
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dw->reformat = dw_hdmi_reformat_iec958;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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dw_hdmi_create_cs(dw, runtime);
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dw->reformat = dw_hdmi_reformat_s24;
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break;
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}
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dw->iec_offset = 0;
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dw->channels = runtime->channels;
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dw->buf_src = runtime->dma_area;
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dw->buf_dst = substream->dma_buffer.area;
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dw->buf_addr = substream->dma_buffer.addr;
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dw->buf_period = snd_pcm_lib_period_bytes(substream);
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dw->buf_size = snd_pcm_lib_buffer_bytes(substream);
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|
return 0;
|
|
}
|
|
|
|
static int dw_hdmi_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
struct snd_dw_hdmi *dw = substream->private_data;
|
|
unsigned long flags;
|
|
int ret = 0;
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
spin_lock_irqsave(&dw->lock, flags);
|
|
dw->buf_offset = 0;
|
|
dw->substream = substream;
|
|
dw_hdmi_start_dma(dw);
|
|
dw_hdmi_audio_enable(dw->data.hdmi);
|
|
spin_unlock_irqrestore(&dw->lock, flags);
|
|
substream->runtime->delay = substream->runtime->period_size;
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
spin_lock_irqsave(&dw->lock, flags);
|
|
dw->substream = NULL;
|
|
dw_hdmi_stop_dma(dw);
|
|
dw_hdmi_audio_disable(dw->data.hdmi);
|
|
spin_unlock_irqrestore(&dw->lock, flags);
|
|
break;
|
|
|
|
default:
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static snd_pcm_uframes_t dw_hdmi_pointer(struct snd_pcm_substream *substream)
|
|
{
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
struct snd_dw_hdmi *dw = substream->private_data;
|
|
|
|
/*
|
|
* We are unable to report the exact hardware position as
|
|
* reading the 32-bit DMA position using 8-bit reads is racy.
|
|
*/
|
|
return bytes_to_frames(runtime, dw->buf_offset);
|
|
}
|
|
|
|
static const struct snd_pcm_ops snd_dw_hdmi_ops = {
|
|
.open = dw_hdmi_open,
|
|
.close = dw_hdmi_close,
|
|
.ioctl = snd_pcm_lib_ioctl,
|
|
.hw_params = dw_hdmi_hw_params,
|
|
.hw_free = dw_hdmi_hw_free,
|
|
.prepare = dw_hdmi_prepare,
|
|
.trigger = dw_hdmi_trigger,
|
|
.pointer = dw_hdmi_pointer,
|
|
.page = snd_pcm_lib_get_vmalloc_page,
|
|
};
|
|
|
|
static int snd_dw_hdmi_probe(struct platform_device *pdev)
|
|
{
|
|
const struct dw_hdmi_audio_data *data = pdev->dev.platform_data;
|
|
struct device *dev = pdev->dev.parent;
|
|
struct snd_dw_hdmi *dw;
|
|
struct snd_card *card;
|
|
struct snd_pcm *pcm;
|
|
unsigned revision;
|
|
int ret;
|
|
|
|
writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
|
|
data->base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
|
|
revision = readb_relaxed(data->base + HDMI_REVISION_ID);
|
|
if (revision != 0x0a && revision != 0x1a) {
|
|
dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n",
|
|
revision);
|
|
return -ENXIO;
|
|
}
|
|
|
|
ret = snd_card_new(dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
|
|
THIS_MODULE, sizeof(struct snd_dw_hdmi), &card);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
strscpy(card->driver, DRIVER_NAME, sizeof(card->driver));
|
|
strscpy(card->shortname, "DW-HDMI", sizeof(card->shortname));
|
|
snprintf(card->longname, sizeof(card->longname),
|
|
"%s rev 0x%02x, irq %d", card->shortname, revision,
|
|
data->irq);
|
|
|
|
dw = card->private_data;
|
|
dw->card = card;
|
|
dw->data = *data;
|
|
dw->revision = revision;
|
|
|
|
spin_lock_init(&dw->lock);
|
|
|
|
ret = snd_pcm_new(card, "DW HDMI", 0, 1, 0, &pcm);
|
|
if (ret < 0)
|
|
goto err;
|
|
|
|
dw->pcm = pcm;
|
|
pcm->private_data = dw;
|
|
strscpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
|
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_dw_hdmi_ops);
|
|
|
|
/*
|
|
* To support 8-channel 96kHz audio reliably, we need 512k
|
|
* to satisfy alsa with our restricted period (ERR004323).
|
|
*/
|
|
snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
|
|
dev, 128 * 1024, 1024 * 1024);
|
|
|
|
ret = snd_card_register(card);
|
|
if (ret < 0)
|
|
goto err;
|
|
|
|
platform_set_drvdata(pdev, dw);
|
|
|
|
return 0;
|
|
|
|
err:
|
|
snd_card_free(card);
|
|
return ret;
|
|
}
|
|
|
|
static int snd_dw_hdmi_remove(struct platform_device *pdev)
|
|
{
|
|
struct snd_dw_hdmi *dw = platform_get_drvdata(pdev);
|
|
|
|
snd_card_free(dw->card);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_PM_SLEEP) && defined(IS_NOT_BROKEN)
|
|
/*
|
|
* This code is fine, but requires implementation in the dw_hdmi_trigger()
|
|
* method which is currently missing as I have no way to test this.
|
|
*/
|
|
static int snd_dw_hdmi_suspend(struct device *dev)
|
|
{
|
|
struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
|
|
|
|
snd_power_change_state(dw->card, SNDRV_CTL_POWER_D3cold);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int snd_dw_hdmi_resume(struct device *dev)
|
|
{
|
|
struct snd_dw_hdmi *dw = dev_get_drvdata(dev);
|
|
|
|
snd_power_change_state(dw->card, SNDRV_CTL_POWER_D0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(snd_dw_hdmi_pm, snd_dw_hdmi_suspend,
|
|
snd_dw_hdmi_resume);
|
|
#define PM_OPS &snd_dw_hdmi_pm
|
|
#else
|
|
#define PM_OPS NULL
|
|
#endif
|
|
|
|
static struct platform_driver snd_dw_hdmi_driver = {
|
|
.probe = snd_dw_hdmi_probe,
|
|
.remove = snd_dw_hdmi_remove,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.pm = PM_OPS,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(snd_dw_hdmi_driver);
|
|
|
|
MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
|
|
MODULE_DESCRIPTION("Synopsis Designware HDMI AHB ALSA interface");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|