217 lines
6.1 KiB
C
217 lines
6.1 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "base.h"
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#include <nvif/push507c.h>
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#include <nvhw/class/cl907c.h>
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static int
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base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 10)))
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return ret;
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PUSH_MTHD(push, NV907C, SET_PRESENT_CONTROL,
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NVVAL(NV907C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
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NVDEF(NV907C, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE) |
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NVVAL(NV907C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
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PUSH_MTHD(push, NV907C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1);
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PUSH_MTHD(push, NV907C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8,
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SURFACE_SET_OFFSET(0, 1), 0x00000000,
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SURFACE_SET_SIZE(0),
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NVVAL(NV907C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
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NVVAL(NV907C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
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SURFACE_SET_STORAGE(0),
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NVVAL(NV907C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
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NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
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NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
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NVVAL(NV907C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
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SURFACE_SET_PARAMS(0),
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NVVAL(NV907C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
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NVDEF(NV907C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
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NVDEF(NV907C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
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NVDEF(NV907C, SURFACE_SET_PARAMS, LAYOUT, FRM));
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return 0;
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}
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static int
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base907c_xlut_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 6)))
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return ret;
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PUSH_MTHD(push, NV907C, SET_BASE_LUT_LO,
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NVDEF(NV907C, SET_BASE_LUT_LO, ENABLE, DISABLE));
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PUSH_MTHD(push, NV907C, SET_OUTPUT_LUT_LO,
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NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, DISABLE));
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PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, 0x00000000);
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return 0;
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}
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static int
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base907c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 6)))
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return ret;
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PUSH_MTHD(push, NV907C, SET_BASE_LUT_LO,
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NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) |
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NVVAL(NV907C, SET_BASE_LUT_LO, MODE, asyw->xlut.i.mode),
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SET_BASE_LUT_HI, asyw->xlut.i.offset >> 8,
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SET_OUTPUT_LUT_LO,
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NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, USE_CORE_LUT));
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PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, asyw->xlut.handle);
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return 0;
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}
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static void
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base907c_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
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{
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if (size == 1024)
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asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE;
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else
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asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE;
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asyw->xlut.i.enable = NV907C_SET_BASE_LUT_LO_ENABLE_ENABLE;
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asyw->xlut.i.load = head907d_olut_load;
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}
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static inline u32
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csc_drm_to_base(u64 in)
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{
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/* base takes a 19-bit 2's complement value in S3.16 format */
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bool sign = in & BIT_ULL(63);
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u32 integer = (in >> 32) & 0x7fffffff;
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u32 fraction = in & 0xffffffff;
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if (integer >= 4) {
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return (1 << 18) - (sign ? 0 : 1);
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} else {
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u32 ret = (integer << 16) | (fraction >> 16);
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if (sign)
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ret = -ret;
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return ret & GENMASK(18, 0);
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}
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}
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void
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base907c_csc(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
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const struct drm_color_ctm *ctm)
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{
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int i, j;
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for (j = 0; j < 3; j++) {
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for (i = 0; i < 4; i++) {
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u32 *val = &asyw->csc.matrix[j * 4 + i];
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/* DRM does not support constant offset, while
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* HW CSC does. Skip it. */
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if (i == 3) {
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*val = 0;
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} else {
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*val = csc_drm_to_base(ctm->matrix[j * 3 + i]);
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}
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}
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}
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}
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static int
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base907c_csc_clr(struct nv50_wndw *wndw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NV907C, SET_CSC_RED2RED,
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NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE));
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return 0;
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}
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static int
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base907c_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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struct nvif_push *push = wndw->wndw.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 13)))
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return ret;
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PUSH_MTHD(push, NV907C, SET_CSC_RED2RED,
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NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) |
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NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]),
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SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11);
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return 0;
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}
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const struct nv50_wndw_func
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base907c = {
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.acquire = base507c_acquire,
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.release = base507c_release,
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.sema_set = base507c_sema_set,
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.sema_clr = base507c_sema_clr,
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.ntfy_reset = base507c_ntfy_reset,
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.ntfy_set = base507c_ntfy_set,
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.ntfy_clr = base507c_ntfy_clr,
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.ntfy_wait_begun = base507c_ntfy_wait_begun,
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.ilut = base907c_ilut,
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.csc = base907c_csc,
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.csc_set = base907c_csc_set,
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.csc_clr = base907c_csc_clr,
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.olut_core = true,
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.ilut_size = 1024,
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.xlut_set = base907c_xlut_set,
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.xlut_clr = base907c_xlut_clr,
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.image_set = base907c_image_set,
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.image_clr = base507c_image_clr,
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.update = base507c_update,
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};
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int
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base907c_new(struct nouveau_drm *drm, int head, s32 oclass,
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struct nv50_wndw **pwndw)
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{
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return base507c_new_(&base907c, base507c_format, drm, head, oclass,
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0x00000002 << (head * 4), pwndw);
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}
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