73 lines
2.5 KiB
C
73 lines
2.5 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "core.h"
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#include <nvif/class.h>
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void
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nv50_core_del(struct nv50_core **pcore)
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{
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struct nv50_core *core = *pcore;
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if (core) {
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nv50_dmac_destroy(&core->chan);
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kfree(*pcore);
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*pcore = NULL;
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}
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}
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int
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nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore)
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{
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struct {
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s32 oclass;
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int version;
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int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
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} cores[] = {
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{ GA102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
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{ TU102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
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{ GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
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{ GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
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{ GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new },
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{ GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
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{ GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
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{ GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
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{ G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
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{ NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
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{}
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};
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struct nv50_disp *disp = nv50_disp(drm->dev);
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int cid;
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cid = nvif_mclass(&disp->disp->object, cores);
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if (cid < 0) {
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NV_ERROR(drm, "No supported core channel class\n");
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return cid;
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}
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return cores[cid].new(drm, cores[cid].oclass, pcore);
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}
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