403 lines
11 KiB
C
403 lines
11 KiB
C
/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "gf100.h"
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#include "gk104.h"
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#include "ctxgf100.h"
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#include <subdev/timer.h>
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#include <nvif/class.h>
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/*******************************************************************************
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* PGRAPH register lists
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******************************************************************************/
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const struct gf100_gr_init
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gk110_gr_init_fe_0[] = {
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{ 0x40415c, 1, 0x04, 0x00000000 },
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{ 0x404170, 1, 0x04, 0x00000000 },
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{ 0x4041b4, 1, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_ds_0[] = {
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{ 0x405844, 1, 0x04, 0x00ffffff },
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{ 0x405850, 1, 0x04, 0x00000000 },
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{ 0x405900, 1, 0x04, 0x0000ff00 },
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{ 0x405908, 1, 0x04, 0x00000000 },
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{ 0x405928, 2, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_sked_0[] = {
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{ 0x407010, 1, 0x04, 0x00000000 },
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{ 0x407040, 1, 0x04, 0x80440424 },
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{ 0x407048, 1, 0x04, 0x0000000a },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_cwd_0[] = {
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{ 0x405b44, 1, 0x04, 0x00000000 },
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{ 0x405b50, 1, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_gpc_unk_1[] = {
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{ 0x418d00, 1, 0x04, 0x00000000 },
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{ 0x418d28, 2, 0x04, 0x00000000 },
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{ 0x418f00, 1, 0x04, 0x00000400 },
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{ 0x418f08, 1, 0x04, 0x00000000 },
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{ 0x418f20, 2, 0x04, 0x00000000 },
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{ 0x418e00, 1, 0x04, 0x00000000 },
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{ 0x418e08, 1, 0x04, 0x00000000 },
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{ 0x418e1c, 2, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_tex_0[] = {
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{ 0x419ab0, 1, 0x04, 0x00000000 },
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{ 0x419ac8, 1, 0x04, 0x00000000 },
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{ 0x419ab8, 1, 0x04, 0x000000e7 },
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{ 0x419aec, 1, 0x04, 0x00000000 },
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{ 0x419abc, 2, 0x04, 0x00000000 },
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{ 0x419ab4, 1, 0x04, 0x00000000 },
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{ 0x419aa8, 2, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gk110_gr_init_l1c_0[] = {
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{ 0x419c98, 1, 0x04, 0x00000000 },
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{ 0x419ca8, 1, 0x04, 0x00000000 },
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{ 0x419cb0, 1, 0x04, 0x01000000 },
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{ 0x419cb4, 1, 0x04, 0x00000000 },
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{ 0x419cb8, 1, 0x04, 0x00b08bea },
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{ 0x419c84, 1, 0x04, 0x00010384 },
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{ 0x419cbc, 1, 0x04, 0x281b3646 },
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{ 0x419cc0, 2, 0x04, 0x00000000 },
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{ 0x419c80, 1, 0x04, 0x00020230 },
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{ 0x419ccc, 2, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk110_gr_init_sm_0[] = {
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{ 0x419e00, 1, 0x04, 0x00000080 },
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{ 0x419ea0, 1, 0x04, 0x00000000 },
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{ 0x419ee4, 1, 0x04, 0x00000000 },
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{ 0x419ea4, 1, 0x04, 0x00000100 },
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{ 0x419ea8, 1, 0x04, 0x00000000 },
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{ 0x419eb4, 1, 0x04, 0x00000000 },
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{ 0x419ebc, 2, 0x04, 0x00000000 },
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{ 0x419edc, 1, 0x04, 0x00000000 },
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{ 0x419f00, 1, 0x04, 0x00000000 },
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{ 0x419ed0, 1, 0x04, 0x00003234 },
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{ 0x419f74, 1, 0x04, 0x00015555 },
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{ 0x419f80, 4, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_pack
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gk110_gr_pack_mmio[] = {
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{ gk104_gr_init_main_0 },
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{ gk110_gr_init_fe_0 },
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{ gf100_gr_init_pri_0 },
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{ gf100_gr_init_rstr2d_0 },
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{ gf119_gr_init_pd_0 },
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{ gk110_gr_init_ds_0 },
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{ gf100_gr_init_scc_0 },
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{ gk110_gr_init_sked_0 },
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{ gk110_gr_init_cwd_0 },
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{ gf119_gr_init_prop_0 },
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{ gf108_gr_init_gpc_unk_0 },
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{ gf100_gr_init_setup_0 },
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{ gf100_gr_init_crstr_0 },
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{ gf108_gr_init_setup_1 },
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{ gf100_gr_init_zcull_0 },
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{ gf119_gr_init_gpm_0 },
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{ gk110_gr_init_gpc_unk_1 },
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{ gf100_gr_init_gcc_0 },
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{ gk104_gr_init_gpc_unk_2 },
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{ gk104_gr_init_tpccs_0 },
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{ gk110_gr_init_tex_0 },
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{ gk104_gr_init_pe_0 },
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{ gk110_gr_init_l1c_0 },
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{ gf100_gr_init_mpc_0 },
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{ gk110_gr_init_sm_0 },
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{ gf117_gr_init_pes_0 },
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{ gf117_gr_init_wwdx_0 },
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{ gf117_gr_init_cbm_0 },
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{ gk104_gr_init_be_0 },
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{ gf100_gr_init_fe_1 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_blcg_init_sked_0[] = {
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{ 0x407000, 1, 0x00004041 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_blcg_init_gpc_gcc_0[] = {
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{ 0x419020, 1, 0x00000042 },
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{ 0x419038, 1, 0x00000042 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_blcg_init_gpc_l1c_0[] = {
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{ 0x419cd4, 2, 0x00004042 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_blcg_init_gpc_mp_0[] = {
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{ 0x419fd0, 1, 0x00004043 },
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{ 0x419fd8, 1, 0x00004049 },
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{ 0x419fe0, 2, 0x00004042 },
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{ 0x419ff0, 1, 0x00000046 },
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{ 0x419ff8, 1, 0x00004042 },
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{ 0x419f90, 1, 0x00004042 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_main_0[] = {
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{ 0x4041f4, 1, 0x00000000 },
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{ 0x409894, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_unk_0[] = {
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{ 0x406004, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_sked_0[] = {
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{ 0x407004, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_ctxctl_0[] = {
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{ 0x41a894, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_unk_0[] = {
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{ 0x418504, 1, 0x00000000 },
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{ 0x41860c, 1, 0x00000000 },
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{ 0x41868c, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_esetup_0[] = {
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{ 0x41882c, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_zcull_0[] = {
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{ 0x418974, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_l1c_0[] = {
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{ 0x419cd8, 2, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_unk_1[] = {
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{ 0x419c74, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_mp_0[] = {
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{ 0x419fd4, 1, 0x00004a4a },
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{ 0x419fdc, 1, 0x00000014 },
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{ 0x419fe4, 1, 0x00000000 },
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{ 0x419ff4, 1, 0x00001724 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_gpc_ppc_0[] = {
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{ 0x41be2c, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_init
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gk110_clkgate_slcg_init_pcounter_0[] = {
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{ 0x1be018, 1, 0x000001ff },
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{ 0x1bc018, 1, 0x000001ff },
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{ 0x1b8018, 1, 0x000001ff },
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{ 0x1b4124, 1, 0x00000000 },
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{}
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};
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static const struct nvkm_therm_clkgate_pack
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gk110_clkgate_pack[] = {
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{ gk104_clkgate_blcg_init_main_0 },
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{ gk104_clkgate_blcg_init_rstr2d_0 },
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{ gk104_clkgate_blcg_init_unk_0 },
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{ gk104_clkgate_blcg_init_gcc_0 },
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{ gk110_clkgate_blcg_init_sked_0 },
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{ gk104_clkgate_blcg_init_unk_1 },
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{ gk104_clkgate_blcg_init_gpc_ctxctl_0 },
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{ gk104_clkgate_blcg_init_gpc_unk_0 },
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{ gk104_clkgate_blcg_init_gpc_esetup_0 },
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{ gk104_clkgate_blcg_init_gpc_tpbus_0 },
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{ gk104_clkgate_blcg_init_gpc_zcull_0 },
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{ gk104_clkgate_blcg_init_gpc_tpconf_0 },
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{ gk104_clkgate_blcg_init_gpc_unk_1 },
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{ gk110_clkgate_blcg_init_gpc_gcc_0 },
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{ gk104_clkgate_blcg_init_gpc_ffb_0 },
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{ gk104_clkgate_blcg_init_gpc_tex_0 },
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{ gk104_clkgate_blcg_init_gpc_poly_0 },
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{ gk110_clkgate_blcg_init_gpc_l1c_0 },
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{ gk104_clkgate_blcg_init_gpc_unk_2 },
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{ gk110_clkgate_blcg_init_gpc_mp_0 },
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{ gk104_clkgate_blcg_init_gpc_ppc_0 },
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{ gk104_clkgate_blcg_init_rop_zrop_0 },
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{ gk104_clkgate_blcg_init_rop_0 },
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{ gk104_clkgate_blcg_init_rop_crop_0 },
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{ gk104_clkgate_blcg_init_pxbar_0 },
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{ gk110_clkgate_slcg_init_main_0 },
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{ gk110_clkgate_slcg_init_unk_0 },
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{ gk110_clkgate_slcg_init_sked_0 },
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{ gk110_clkgate_slcg_init_gpc_ctxctl_0 },
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{ gk110_clkgate_slcg_init_gpc_unk_0 },
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{ gk110_clkgate_slcg_init_gpc_esetup_0 },
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{ gk110_clkgate_slcg_init_gpc_zcull_0 },
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{ gk110_clkgate_slcg_init_gpc_l1c_0 },
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{ gk110_clkgate_slcg_init_gpc_unk_1 },
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{ gk110_clkgate_slcg_init_gpc_mp_0 },
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{ gk110_clkgate_slcg_init_gpc_ppc_0 },
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{ gk110_clkgate_slcg_init_pcounter_0 },
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{}
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};
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/*******************************************************************************
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* PGRAPH engine/subdev functions
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******************************************************************************/
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#include "fuc/hubgk110.fuc3.h"
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struct gf100_gr_ucode
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gk110_gr_fecs_ucode = {
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.code.data = gk110_grhub_code,
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.code.size = sizeof(gk110_grhub_code),
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.data.data = gk110_grhub_data,
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.data.size = sizeof(gk110_grhub_data),
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};
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#include "fuc/gpcgk110.fuc3.h"
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struct gf100_gr_ucode
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gk110_gr_gpccs_ucode = {
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.code.data = gk110_grgpc_code,
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.code.size = sizeof(gk110_grgpc_code),
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.data.data = gk110_grgpc_data,
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.data.size = sizeof(gk110_grgpc_data),
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};
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void
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gk110_gr_init_419eb4(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
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nvkm_mask(device, 0x419eb4, 0x00002000, 0x00002000);
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nvkm_mask(device, 0x419eb4, 0x00004000, 0x00004000);
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nvkm_mask(device, 0x419eb4, 0x00008000, 0x00008000);
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nvkm_mask(device, 0x419eb4, 0x00001000, 0x00000000);
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nvkm_mask(device, 0x419eb4, 0x00002000, 0x00000000);
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nvkm_mask(device, 0x419eb4, 0x00004000, 0x00000000);
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nvkm_mask(device, 0x419eb4, 0x00008000, 0x00000000);
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}
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static const struct gf100_gr_func
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gk110_gr = {
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.oneinit_tiles = gf100_gr_oneinit_tiles,
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.oneinit_sm_id = gf100_gr_oneinit_sm_id,
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
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.init_zcull = gf117_gr_init_zcull,
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.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
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.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
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.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
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.init_sked_hww_esr = gk104_gr_init_sked_hww_esr,
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.init_419cc0 = gf100_gr_init_419cc0,
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.init_419eb4 = gk110_gr_init_419eb4,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_rop_exceptions = gf100_gr_init_rop_exceptions,
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.init_exception2 = gf100_gr_init_exception2,
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.init_400054 = gf100_gr_init_400054,
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.trap_mp = gf100_gr_trap_mp,
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.mmio = gk110_gr_pack_mmio,
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.fecs.ucode = &gk110_gr_fecs_ucode,
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.fecs.reset = gf100_gr_fecs_reset,
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.gpccs.ucode = &gk110_gr_gpccs_ucode,
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.rops = gf100_gr_rops,
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.ppc_nr = 2,
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.grctx = &gk110_grctx,
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.clkgate_pack = gk110_clkgate_pack,
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.zbc = &gf100_gr_zbc,
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.sclass = {
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{ -1, -1, FERMI_TWOD_A },
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{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
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{ -1, -1, KEPLER_B, &gf100_fermi },
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{ -1, -1, KEPLER_COMPUTE_B },
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{}
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}
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};
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static const struct gf100_gr_fwif
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gk110_gr_fwif[] = {
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{ -1, gf100_gr_load, &gk110_gr },
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{ -1, gf100_gr_nofw, &gk110_gr },
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{}
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};
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int
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gk110_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
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{
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return gf100_gr_new_(gk110_gr_fwif, device, type, inst, pgr);
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}
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