448 lines
9.0 KiB
Plaintext
448 lines
9.0 KiB
Plaintext
/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#ifdef INCLUDE_PROC
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process(PROC_MEMX, #memx_init, #memx_recv)
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#endif
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/******************************************************************************
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* MEMX data segment
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*****************************************************************************/
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#ifdef INCLUDE_DATA
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.equ #memx_opcode 0
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.equ #memx_header 2
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.equ #memx_length 4
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.equ #memx_func 8
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#define handler(cmd,hdr,len,func) /*
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*/ .b16 MEMX_##cmd /*
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*/ .b16 hdr /*
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*/ .b16 len /*
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*/ .b16 0 /*
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*/ .b32 func
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memx_func_head:
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handler(ENTER , 0x0000, 0x0000, #memx_func_enter)
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memx_func_next:
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handler(LEAVE , 0x0000, 0x0000, #memx_func_leave)
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handler(WR32 , 0x0000, 0x0002, #memx_func_wr32)
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handler(WAIT , 0x0004, 0x0000, #memx_func_wait)
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handler(DELAY , 0x0001, 0x0000, #memx_func_delay)
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handler(VBLANK, 0x0001, 0x0000, #memx_func_wait_vblank)
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handler(TRAIN , 0x0000, 0x0000, #memx_func_train)
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memx_func_tail:
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.equ #memx_func_size #memx_func_next - #memx_func_head
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.equ #memx_func_num (#memx_func_tail - #memx_func_head) / #memx_func_size
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memx_ts_start:
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.b32 0
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memx_ts_end:
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.b32 0
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memx_data_head:
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.skip 0x0800
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memx_data_tail:
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memx_train_head:
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.skip 0x0100
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memx_train_tail:
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#endif
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/******************************************************************************
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* MEMX code segment
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*****************************************************************************/
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#ifdef INCLUDE_CODE
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_enter:
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#if NVKM_PPWR_CHIPSET == GT215
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mov $r8 0x1610
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nv_rd32($r7, $r8)
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imm32($r6, 0xfffffffc)
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and $r7 $r6
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mov $r6 0x2
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or $r7 $r6
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nv_wr32($r8, $r7)
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#else
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mov $r6 0x001620
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imm32($r7, ~0x00000aa2);
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nv_rd32($r8, $r6)
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and $r8 $r7
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nv_wr32($r6, $r8)
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imm32($r7, ~0x00000001)
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nv_rd32($r8, $r6)
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and $r8 $r7
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nv_wr32($r6, $r8)
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mov $r6 0x0026f0
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nv_rd32($r8, $r6)
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and $r8 $r7
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nv_wr32($r6, $r8)
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#endif
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mov $r6 NV_PPWR_OUTPUT_SET_FB_PAUSE
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nv_iowr(NV_PPWR_OUTPUT_SET, $r6)
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memx_func_enter_wait:
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nv_iord($r6, NV_PPWR_OUTPUT)
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and $r6 NV_PPWR_OUTPUT_FB_PAUSE
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bra z #memx_func_enter_wait
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nv_iord($r6, NV_PPWR_TIMER_LOW)
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st b32 D[$r0 + #memx_ts_start] $r6
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ret
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_leave:
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nv_iord($r6, NV_PPWR_TIMER_LOW)
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st b32 D[$r0 + #memx_ts_end] $r6
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mov $r6 NV_PPWR_OUTPUT_CLR_FB_PAUSE
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nv_iowr(NV_PPWR_OUTPUT_CLR, $r6)
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memx_func_leave_wait:
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nv_iord($r6, NV_PPWR_OUTPUT)
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and $r6 NV_PPWR_OUTPUT_FB_PAUSE
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bra nz #memx_func_leave_wait
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#if NVKM_PPWR_CHIPSET == GT215
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mov $r8 0x1610
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nv_rd32($r7, $r8)
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imm32($r6, 0xffffffcc)
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and $r7 $r6
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nv_wr32($r8, $r7)
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#else
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mov $r6 0x0026f0
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imm32($r7, 0x00000001)
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nv_rd32($r8, $r6)
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or $r8 $r7
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nv_wr32($r6, $r8)
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mov $r6 0x001620
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nv_rd32($r8, $r6)
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or $r8 $r7
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nv_wr32($r6, $r8)
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imm32($r7, 0x00000aa2);
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nv_rd32($r8, $r6)
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or $r8 $r7
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nv_wr32($r6, $r8)
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#endif
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ret
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#if NVKM_PPWR_CHIPSET < GF119
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// +00: head to wait for vblank on
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_wait_vblank:
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ld b32 $r6 D[$r1 + 0x00]
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cmp b32 $r6 0x0
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bra z #memx_func_wait_vblank_head0
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cmp b32 $r6 0x1
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bra z #memx_func_wait_vblank_head1
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bra #memx_func_wait_vblank_fini
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memx_func_wait_vblank_head1:
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mov $r7 0x20
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bra #memx_func_wait_vblank_0
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memx_func_wait_vblank_head0:
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mov $r7 0x8
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memx_func_wait_vblank_0:
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nv_iord($r6, NV_PPWR_INPUT)
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and $r6 $r7
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bra nz #memx_func_wait_vblank_0
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memx_func_wait_vblank_1:
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nv_iord($r6, NV_PPWR_INPUT)
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and $r6 $r7
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bra z #memx_func_wait_vblank_1
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memx_func_wait_vblank_fini:
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add b32 $r1 0x4
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ret
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#else
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// XXX: currently no-op
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// +00: head to wait for vblank on
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_wait_vblank:
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add b32 $r1 0x4
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ret
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#endif
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// +00*n: addr
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// +04*n: data
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_wr32:
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ld b32 $r6 D[$r1 + 0x00]
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ld b32 $r5 D[$r1 + 0x04]
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add b32 $r1 0x08
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nv_wr32($r6, $r5)
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sub b32 $r4 0x02
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bra nz #memx_func_wr32
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ret
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// +00: addr
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// +04: mask
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// +08: data
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// +0c: timeout (ns)
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_wait:
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nv_iord($r8, NV_PPWR_TIMER_LOW)
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ld b32 $r14 D[$r1 + 0x00]
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ld b32 $r13 D[$r1 + 0x04]
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ld b32 $r12 D[$r1 + 0x08]
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ld b32 $r11 D[$r1 + 0x0c]
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add b32 $r1 0x10
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call(wait)
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ret
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// +00: time (ns)
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_delay:
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ld b32 $r14 D[$r1 + 0x00]
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add b32 $r1 0x04
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call(nsec)
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ret
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// description
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//
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// $r15 - current (memx)
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// $r4 - packet length
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// $r3 - opcode desciption
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// $r0 - zero
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memx_func_train:
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#if NVKM_PPWR_CHIPSET == GT215
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// $r5 - outer loop counter
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// $r6 - inner loop counter
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// $r7 - entry counter (#memx_train_head + $r7)
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mov $r5 0x3
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mov $r7 0x0
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// Read random memory to wake up... things
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imm32($r9, 0x700000)
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nv_rd32($r8,$r9)
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mov $r14 0x2710
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call(nsec)
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memx_func_train_loop_outer:
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mulu $r8 $r5 0x101
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sethi $r8 0x02000000
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imm32($r9, 0x1111e0)
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nv_wr32($r9, $r8)
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push $r5
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mov $r6 0x0
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memx_func_train_loop_inner:
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mov $r8 0x1111
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mulu $r9 $r6 $r8
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shl b32 $r8 $r9 0x10
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or $r8 $r9
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imm32($r9, 0x100720)
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nv_wr32($r9, $r8)
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imm32($r9, 0x100080)
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nv_rd32($r8, $r9)
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or $r8 $r8 0x20
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nv_wr32($r9, $r8)
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imm32($r9, 0x10053c)
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imm32($r8, 0x80003002)
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nv_wr32($r9, $r8)
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imm32($r14, 0x100560)
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imm32($r13, 0x80000000)
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add b32 $r12 $r13 0
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imm32($r11, 0x001e8480)
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call(wait)
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// $r5 - inner inner loop counter
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// $r9 - result
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mov $r5 0
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imm32($r9, 0x8300ffff)
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memx_func_train_loop_4x:
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imm32($r10, 0x100080)
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nv_rd32($r8, $r10)
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imm32($r11, 0xffffffdf)
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and $r8 $r11
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nv_wr32($r10, $r8)
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imm32($r10, 0x10053c)
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imm32($r8, 0x80003002)
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nv_wr32($r10, $r8)
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imm32($r14, 0x100560)
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imm32($r13, 0x80000000)
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mov b32 $r12 $r13
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imm32($r11, 0x00002710)
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call(wait)
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nv_rd32($r13, $r14)
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and $r9 $r9 $r13
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add b32 $r5 1
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cmp b16 $r5 0x4
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bra l #memx_func_train_loop_4x
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add b32 $r10 $r7 #memx_train_head
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st b32 D[$r10 + 0] $r9
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add b32 $r6 1
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add b32 $r7 4
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cmp b16 $r6 0x10
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bra l #memx_func_train_loop_inner
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pop $r5
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add b32 $r5 1
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cmp b16 $r5 7
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bra l #memx_func_train_loop_outer
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#endif
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ret
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// description
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//
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// $r15 - current (memx)
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// $r14 - sender process name
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// $r13 - message (exec)
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// $r12 - head of script
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// $r11 - tail of script
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// $r0 - zero
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memx_exec:
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push $r14
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push $r13
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mov b32 $r1 $r12
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mov b32 $r2 $r11
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memx_exec_next:
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// fetch the packet header
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ld b32 $r3 D[$r1]
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add b32 $r1 4
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extr $r4 $r3 16:31
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extr $r3 $r3 0:15
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// execute the opcode handler
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sub b32 $r3 1
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mulu $r3 #memx_func_size
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ld b32 $r5 D[$r3 + #memx_func_head + #memx_func]
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call $r5
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// keep going, if we haven't reached the end
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cmp b32 $r1 $r2
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bra l #memx_exec_next
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// send completion reply
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ld b32 $r11 D[$r0 + #memx_ts_start]
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ld b32 $r12 D[$r0 + #memx_ts_end]
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sub b32 $r12 $r11
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nv_iord($r11, NV_PPWR_INPUT)
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pop $r13
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pop $r14
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call(send)
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ret
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// description
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//
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// $r15 - current (memx)
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// $r14 - sender process name
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// $r13 - message
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// $r12 - data0
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// $r11 - data1
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// $r0 - zero
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memx_info:
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cmp b16 $r12 0x1
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bra e #memx_info_train
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memx_info_data:
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mov $r12 #memx_data_head
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mov $r11 #memx_data_tail - #memx_data_head
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bra #memx_info_send
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memx_info_train:
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mov $r12 #memx_train_head
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mov $r11 #memx_train_tail - #memx_train_head
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memx_info_send:
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call(send)
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ret
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// description
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//
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// $r15 - current (memx)
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// $r14 - sender process name
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// $r13 - message
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// $r12 - data0
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// $r11 - data1
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// $r0 - zero
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memx_recv:
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cmp b32 $r13 MEMX_MSG_EXEC
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bra e #memx_exec
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cmp b32 $r13 MEMX_MSG_INFO
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bra e #memx_info
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ret
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// description
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//
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// $r15 - current (memx)
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// $r0 - zero
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memx_init:
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ret
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#endif
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