176 lines
5.1 KiB
C
176 lines
5.1 KiB
C
/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <trace/events/dma_fence.h>
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#include "virtgpu_drv.h"
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#define to_virtio_gpu_fence(x) \
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container_of(x, struct virtio_gpu_fence, f)
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static const char *virtio_gpu_get_driver_name(struct dma_fence *f)
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{
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return "virtio_gpu";
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}
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static const char *virtio_gpu_get_timeline_name(struct dma_fence *f)
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{
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return "controlq";
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}
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static bool virtio_gpu_fence_signaled(struct dma_fence *f)
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{
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/* leaked fence outside driver before completing
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* initialization with virtio_gpu_fence_emit.
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*/
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WARN_ON_ONCE(f->seqno == 0);
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return false;
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}
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static void virtio_gpu_fence_value_str(struct dma_fence *f, char *str, int size)
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{
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snprintf(str, size, "[%llu, %llu]", f->context, f->seqno);
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}
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static void virtio_gpu_timeline_value_str(struct dma_fence *f, char *str,
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int size)
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{
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struct virtio_gpu_fence *fence = to_virtio_gpu_fence(f);
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snprintf(str, size, "%llu",
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(u64)atomic64_read(&fence->drv->last_fence_id));
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}
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static const struct dma_fence_ops virtio_gpu_fence_ops = {
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.get_driver_name = virtio_gpu_get_driver_name,
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.get_timeline_name = virtio_gpu_get_timeline_name,
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.signaled = virtio_gpu_fence_signaled,
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.fence_value_str = virtio_gpu_fence_value_str,
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.timeline_value_str = virtio_gpu_timeline_value_str,
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};
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struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
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uint64_t base_fence_ctx,
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uint32_t ring_idx)
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{
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uint64_t fence_context = base_fence_ctx + ring_idx;
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struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
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struct virtio_gpu_fence *fence = kzalloc(sizeof(struct virtio_gpu_fence),
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GFP_KERNEL);
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if (!fence)
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return fence;
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fence->drv = drv;
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fence->ring_idx = ring_idx;
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fence->emit_fence_info = !(base_fence_ctx == drv->context);
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/* This only partially initializes the fence because the seqno is
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* unknown yet. The fence must not be used outside of the driver
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* until virtio_gpu_fence_emit is called.
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*/
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dma_fence_init(&fence->f, &virtio_gpu_fence_ops, &drv->lock,
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fence_context, 0);
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return fence;
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}
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void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_ctrl_hdr *cmd_hdr,
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struct virtio_gpu_fence *fence)
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{
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struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
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unsigned long irq_flags;
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spin_lock_irqsave(&drv->lock, irq_flags);
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fence->fence_id = fence->f.seqno = ++drv->current_fence_id;
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dma_fence_get(&fence->f);
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list_add_tail(&fence->node, &drv->fences);
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spin_unlock_irqrestore(&drv->lock, irq_flags);
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trace_dma_fence_emit(&fence->f);
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cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
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cmd_hdr->fence_id = cpu_to_le64(fence->fence_id);
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/* Only currently defined fence param. */
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if (fence->emit_fence_info) {
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cmd_hdr->flags |=
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cpu_to_le32(VIRTIO_GPU_FLAG_INFO_RING_IDX);
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cmd_hdr->ring_idx = (u8)fence->ring_idx;
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}
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}
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void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
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u64 fence_id)
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{
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struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
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struct virtio_gpu_fence *signaled, *curr, *tmp;
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unsigned long irq_flags;
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spin_lock_irqsave(&drv->lock, irq_flags);
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atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id);
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list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
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if (fence_id != curr->fence_id)
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continue;
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signaled = curr;
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/*
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* Signal any fences with a strictly smaller sequence number
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* than the current signaled fence.
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*/
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list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
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/* dma-fence contexts must match */
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if (signaled->f.context != curr->f.context)
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continue;
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if (!dma_fence_is_later(&signaled->f, &curr->f))
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continue;
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dma_fence_signal_locked(&curr->f);
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if (curr->e) {
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drm_send_event(vgdev->ddev, &curr->e->base);
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curr->e = NULL;
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}
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list_del(&curr->node);
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dma_fence_put(&curr->f);
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}
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dma_fence_signal_locked(&signaled->f);
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if (signaled->e) {
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drm_send_event(vgdev->ddev, &signaled->e->base);
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signaled->e = NULL;
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}
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list_del(&signaled->node);
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dma_fence_put(&signaled->f);
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break;
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}
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spin_unlock_irqrestore(&drv->lock, irq_flags);
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}
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