707 lines
20 KiB
C
707 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Driver for SMM665 Power Controller / Monitor
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*
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* Copyright (C) 2010 Ericsson AB.
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*
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* This driver should also work for SMM465, SMM764, and SMM766, but is untested
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* for those chips. Only monitoring functionality is implemented.
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*
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* Datasheets:
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* http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf
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* http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/i2c.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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/* Internal reference voltage (VREF, x 1000 */
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#define SMM665_VREF_ADC_X1000 1250
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/* module parameters */
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static int vref = SMM665_VREF_ADC_X1000;
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module_param(vref, int, 0);
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MODULE_PARM_DESC(vref, "Reference voltage in mV");
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enum chips { smm465, smm665, smm665c, smm764, smm766 };
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/*
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* ADC channel addresses
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*/
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#define SMM665_MISC16_ADC_DATA_A 0x00
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#define SMM665_MISC16_ADC_DATA_B 0x01
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#define SMM665_MISC16_ADC_DATA_C 0x02
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#define SMM665_MISC16_ADC_DATA_D 0x03
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#define SMM665_MISC16_ADC_DATA_E 0x04
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#define SMM665_MISC16_ADC_DATA_F 0x05
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#define SMM665_MISC16_ADC_DATA_VDD 0x06
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#define SMM665_MISC16_ADC_DATA_12V 0x07
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#define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08
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#define SMM665_MISC16_ADC_DATA_AIN1 0x09
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#define SMM665_MISC16_ADC_DATA_AIN2 0x0a
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/*
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* Command registers
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*/
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#define SMM665_MISC8_CMD_STS 0x80
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#define SMM665_MISC8_STATUS1 0x81
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#define SMM665_MISC8_STATUSS2 0x82
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#define SMM665_MISC8_IO_POLARITY 0x83
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#define SMM665_MISC8_PUP_POLARITY 0x84
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#define SMM665_MISC8_ADOC_STATUS1 0x85
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#define SMM665_MISC8_ADOC_STATUS2 0x86
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#define SMM665_MISC8_WRITE_PROT 0x87
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#define SMM665_MISC8_STS_TRACK 0x88
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/*
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* Configuration registers and register groups
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*/
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#define SMM665_ADOC_ENABLE 0x0d
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#define SMM665_LIMIT_BASE 0x80 /* First limit register */
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/*
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* Limit register bit masks
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*/
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#define SMM665_TRIGGER_RST 0x8000
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#define SMM665_TRIGGER_HEALTHY 0x4000
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#define SMM665_TRIGGER_POWEROFF 0x2000
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#define SMM665_TRIGGER_SHUTDOWN 0x1000
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#define SMM665_ADC_MASK 0x03ff
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#define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \
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| SMM665_TRIGGER_POWEROFF \
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| SMM665_TRIGGER_SHUTDOWN))
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/*
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* Fault register bit definitions
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* Values are merged from status registers 1/2,
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* with status register 1 providing the upper 8 bits.
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*/
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#define SMM665_FAULT_A 0x0001
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#define SMM665_FAULT_B 0x0002
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#define SMM665_FAULT_C 0x0004
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#define SMM665_FAULT_D 0x0008
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#define SMM665_FAULT_E 0x0010
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#define SMM665_FAULT_F 0x0020
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#define SMM665_FAULT_VDD 0x0040
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#define SMM665_FAULT_12V 0x0080
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#define SMM665_FAULT_TEMP 0x0100
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#define SMM665_FAULT_AIN1 0x0200
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#define SMM665_FAULT_AIN2 0x0400
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/*
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* I2C Register addresses
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*
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* The configuration register needs to be the configured base register.
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* The command/status register address is derived from it.
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*/
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#define SMM665_REGMASK 0x78
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#define SMM665_CMDREG_BASE 0x48
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#define SMM665_CONFREG_BASE 0x50
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/*
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* Equations given by chip manufacturer to calculate voltage/temperature values
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* vref = Reference voltage on VREF_ADC pin (module parameter)
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* adc = 10bit ADC value read back from registers
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*/
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/* Voltage A-F and VDD */
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#define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256)
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/* Voltage 12VIN */
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#define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256)
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/* Voltage AIN1, AIN2 */
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#define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512)
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/* Temp Sensor */
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#define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \
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((int)(adc) * 1000 / 4) : \
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(((int)(adc) - 0x400) * 1000 / 4))
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#define SMM665_NUM_ADC 11
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/*
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* Chip dependent ADC conversion time, in uS
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*/
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#define SMM665_ADC_WAIT_SMM665 70
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#define SMM665_ADC_WAIT_SMM766 185
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struct smm665_data {
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enum chips type;
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int conversion_time; /* ADC conversion time */
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struct i2c_client *client;
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struct mutex update_lock;
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bool valid;
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unsigned long last_updated; /* in jiffies */
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u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */
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u16 faults; /* fault status */
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/* The following values are in mV */
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int critical_min_limit[SMM665_NUM_ADC];
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int alarm_min_limit[SMM665_NUM_ADC];
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int critical_max_limit[SMM665_NUM_ADC];
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int alarm_max_limit[SMM665_NUM_ADC];
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struct i2c_client *cmdreg;
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};
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/*
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* smm665_read16()
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*
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* Read 16 bit value from <reg>, <reg+1>. Upper 8 bits are in <reg>.
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*/
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static int smm665_read16(struct i2c_client *client, int reg)
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{
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int rv, val;
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rv = i2c_smbus_read_byte_data(client, reg);
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if (rv < 0)
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return rv;
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val = rv << 8;
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rv = i2c_smbus_read_byte_data(client, reg + 1);
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if (rv < 0)
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return rv;
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val |= rv;
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return val;
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}
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/*
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* Read adc value.
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*/
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static int smm665_read_adc(struct smm665_data *data, int adc)
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{
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struct i2c_client *client = data->cmdreg;
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int rv;
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int radc;
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/*
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* Algorithm for reading ADC, per SMM665 datasheet
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*
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* {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]}
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* [wait conversion time]
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* {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]}
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*
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* To implement the first part of this exchange,
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* do a full read transaction and expect a failure/Nack.
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* This sets up the address pointer on the SMM665
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* and starts the ADC conversion.
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* Then do a two-byte read transaction.
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*/
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rv = i2c_smbus_read_byte_data(client, adc << 3);
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if (rv != -ENXIO) {
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/*
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* We expect ENXIO to reflect NACK
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* (per Documentation/i2c/fault-codes.rst).
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* Everything else is an error.
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*/
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dev_dbg(&client->dev,
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"Unexpected return code %d when setting ADC index", rv);
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return (rv < 0) ? rv : -EIO;
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}
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udelay(data->conversion_time);
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/*
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* Now read two bytes.
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*
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* Neither i2c_smbus_read_byte() nor
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* i2c_smbus_read_block_data() worked here,
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* so use i2c_smbus_read_word_swapped() instead.
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* We could also try to use i2c_master_recv(),
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* but that is not always supported.
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*/
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rv = i2c_smbus_read_word_swapped(client, 0);
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if (rv < 0) {
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dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv);
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return rv;
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}
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/*
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* Validate/verify readback adc channel (in bit 11..14).
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*/
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radc = (rv >> 11) & 0x0f;
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if (radc != adc) {
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dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d",
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adc, radc);
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return -EIO;
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}
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return rv & SMM665_ADC_MASK;
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}
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static struct smm665_data *smm665_update_device(struct device *dev)
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{
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struct smm665_data *data = dev_get_drvdata(dev);
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struct i2c_client *client = data->client;
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struct smm665_data *ret = data;
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mutex_lock(&data->update_lock);
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if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
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int i, val;
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/*
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* read status registers
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*/
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val = smm665_read16(client, SMM665_MISC8_STATUS1);
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if (unlikely(val < 0)) {
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ret = ERR_PTR(val);
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goto abort;
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}
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data->faults = val;
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/* Read adc registers */
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for (i = 0; i < SMM665_NUM_ADC; i++) {
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val = smm665_read_adc(data, i);
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if (unlikely(val < 0)) {
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ret = ERR_PTR(val);
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goto abort;
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}
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data->adc[i] = val;
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}
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data->last_updated = jiffies;
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data->valid = true;
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}
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abort:
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mutex_unlock(&data->update_lock);
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return ret;
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}
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/* Return converted value from given adc */
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static int smm665_convert(u16 adcval, int index)
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{
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int val = 0;
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switch (index) {
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case SMM665_MISC16_ADC_DATA_12V:
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val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
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break;
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case SMM665_MISC16_ADC_DATA_VDD:
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case SMM665_MISC16_ADC_DATA_A:
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case SMM665_MISC16_ADC_DATA_B:
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case SMM665_MISC16_ADC_DATA_C:
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case SMM665_MISC16_ADC_DATA_D:
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case SMM665_MISC16_ADC_DATA_E:
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case SMM665_MISC16_ADC_DATA_F:
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val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
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break;
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case SMM665_MISC16_ADC_DATA_AIN1:
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case SMM665_MISC16_ADC_DATA_AIN2:
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val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
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break;
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case SMM665_MISC16_ADC_DATA_INT_TEMP:
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val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK);
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break;
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default:
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/* If we get here, the developer messed up */
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WARN_ON_ONCE(1);
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break;
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}
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return val;
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}
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static int smm665_get_min(struct device *dev, int index)
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{
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struct smm665_data *data = dev_get_drvdata(dev);
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return data->alarm_min_limit[index];
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}
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static int smm665_get_max(struct device *dev, int index)
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{
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struct smm665_data *data = dev_get_drvdata(dev);
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return data->alarm_max_limit[index];
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}
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static int smm665_get_lcrit(struct device *dev, int index)
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{
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struct smm665_data *data = dev_get_drvdata(dev);
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return data->critical_min_limit[index];
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}
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static int smm665_get_crit(struct device *dev, int index)
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{
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struct smm665_data *data = dev_get_drvdata(dev);
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return data->critical_max_limit[index];
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}
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static ssize_t smm665_show_crit_alarm(struct device *dev,
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struct device_attribute *da, char *buf)
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{
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struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
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struct smm665_data *data = smm665_update_device(dev);
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int val = 0;
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if (IS_ERR(data))
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return PTR_ERR(data);
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if (data->faults & (1 << attr->index))
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val = 1;
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return sysfs_emit(buf, "%d\n", val);
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}
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static ssize_t smm665_show_input(struct device *dev,
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struct device_attribute *da, char *buf)
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{
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struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
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struct smm665_data *data = smm665_update_device(dev);
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int adc = attr->index;
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int val;
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if (IS_ERR(data))
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return PTR_ERR(data);
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val = smm665_convert(data->adc[adc], adc);
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return sysfs_emit(buf, "%d\n", val);
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}
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#define SMM665_SHOW(what) \
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static ssize_t smm665_show_##what(struct device *dev, \
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struct device_attribute *da, char *buf) \
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{ \
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struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
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const int val = smm665_get_##what(dev, attr->index); \
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return snprintf(buf, PAGE_SIZE, "%d\n", val); \
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}
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SMM665_SHOW(min);
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SMM665_SHOW(max);
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SMM665_SHOW(lcrit);
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SMM665_SHOW(crit);
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/*
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* These macros are used below in constructing device attribute objects
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* for use with sysfs_create_group() to make a sysfs device file
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* for each register.
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*/
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#define SMM665_ATTR(name, type, cmd_idx) \
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static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \
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smm665_show_##type, NULL, cmd_idx)
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/* Construct a sensor_device_attribute structure for each register */
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/* Input voltages */
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SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V);
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SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD);
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SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A);
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SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B);
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SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C);
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SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D);
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SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E);
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SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F);
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SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1);
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SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2);
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/* Input voltages min */
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SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V);
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SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD);
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SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A);
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SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B);
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SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C);
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SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D);
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SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E);
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SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F);
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SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1);
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SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2);
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/* Input voltages max */
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SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V);
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SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD);
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SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A);
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SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B);
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SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C);
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SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D);
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SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E);
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SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F);
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SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1);
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SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2);
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/* Input voltages lcrit */
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SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V);
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SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD);
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SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A);
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SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B);
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SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C);
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SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D);
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SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E);
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SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F);
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SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1);
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SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2);
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/* Input voltages crit */
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SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V);
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SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD);
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SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A);
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SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B);
|
|
SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C);
|
|
SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D);
|
|
SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E);
|
|
SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F);
|
|
SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1);
|
|
SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2);
|
|
|
|
/* critical alarms */
|
|
SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V);
|
|
SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD);
|
|
SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A);
|
|
SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B);
|
|
SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C);
|
|
SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D);
|
|
SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E);
|
|
SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F);
|
|
SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1);
|
|
SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2);
|
|
|
|
/* Temperature */
|
|
SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP);
|
|
SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP);
|
|
SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP);
|
|
SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP);
|
|
SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP);
|
|
SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP);
|
|
|
|
/*
|
|
* Finally, construct an array of pointers to members of the above objects,
|
|
* as required for sysfs_create_group()
|
|
*/
|
|
static struct attribute *smm665_attrs[] = {
|
|
&sensor_dev_attr_in1_input.dev_attr.attr,
|
|
&sensor_dev_attr_in1_min.dev_attr.attr,
|
|
&sensor_dev_attr_in1_max.dev_attr.attr,
|
|
&sensor_dev_attr_in1_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in1_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in2_input.dev_attr.attr,
|
|
&sensor_dev_attr_in2_min.dev_attr.attr,
|
|
&sensor_dev_attr_in2_max.dev_attr.attr,
|
|
&sensor_dev_attr_in2_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in2_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in2_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in3_input.dev_attr.attr,
|
|
&sensor_dev_attr_in3_min.dev_attr.attr,
|
|
&sensor_dev_attr_in3_max.dev_attr.attr,
|
|
&sensor_dev_attr_in3_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in3_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in3_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in4_input.dev_attr.attr,
|
|
&sensor_dev_attr_in4_min.dev_attr.attr,
|
|
&sensor_dev_attr_in4_max.dev_attr.attr,
|
|
&sensor_dev_attr_in4_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in4_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in4_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in5_input.dev_attr.attr,
|
|
&sensor_dev_attr_in5_min.dev_attr.attr,
|
|
&sensor_dev_attr_in5_max.dev_attr.attr,
|
|
&sensor_dev_attr_in5_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in5_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in5_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in6_input.dev_attr.attr,
|
|
&sensor_dev_attr_in6_min.dev_attr.attr,
|
|
&sensor_dev_attr_in6_max.dev_attr.attr,
|
|
&sensor_dev_attr_in6_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in6_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in6_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in7_input.dev_attr.attr,
|
|
&sensor_dev_attr_in7_min.dev_attr.attr,
|
|
&sensor_dev_attr_in7_max.dev_attr.attr,
|
|
&sensor_dev_attr_in7_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in7_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in7_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in8_input.dev_attr.attr,
|
|
&sensor_dev_attr_in8_min.dev_attr.attr,
|
|
&sensor_dev_attr_in8_max.dev_attr.attr,
|
|
&sensor_dev_attr_in8_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in8_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in8_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in9_input.dev_attr.attr,
|
|
&sensor_dev_attr_in9_min.dev_attr.attr,
|
|
&sensor_dev_attr_in9_max.dev_attr.attr,
|
|
&sensor_dev_attr_in9_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in9_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in9_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_in10_input.dev_attr.attr,
|
|
&sensor_dev_attr_in10_min.dev_attr.attr,
|
|
&sensor_dev_attr_in10_max.dev_attr.attr,
|
|
&sensor_dev_attr_in10_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_in10_crit.dev_attr.attr,
|
|
&sensor_dev_attr_in10_crit_alarm.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_temp1_input.dev_attr.attr,
|
|
&sensor_dev_attr_temp1_min.dev_attr.attr,
|
|
&sensor_dev_attr_temp1_max.dev_attr.attr,
|
|
&sensor_dev_attr_temp1_lcrit.dev_attr.attr,
|
|
&sensor_dev_attr_temp1_crit.dev_attr.attr,
|
|
&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
|
|
|
|
NULL,
|
|
};
|
|
|
|
ATTRIBUTE_GROUPS(smm665);
|
|
|
|
static const struct i2c_device_id smm665_id[];
|
|
|
|
static int smm665_probe(struct i2c_client *client)
|
|
{
|
|
struct i2c_adapter *adapter = client->adapter;
|
|
struct smm665_data *data;
|
|
struct device *hwmon_dev;
|
|
int i, ret;
|
|
|
|
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
|
|
| I2C_FUNC_SMBUS_WORD_DATA))
|
|
return -ENODEV;
|
|
|
|
if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0)
|
|
return -ENODEV;
|
|
|
|
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
i2c_set_clientdata(client, data);
|
|
mutex_init(&data->update_lock);
|
|
|
|
data->client = client;
|
|
data->type = i2c_match_id(smm665_id, client)->driver_data;
|
|
data->cmdreg = i2c_new_dummy_device(adapter, (client->addr & ~SMM665_REGMASK)
|
|
| SMM665_CMDREG_BASE);
|
|
if (IS_ERR(data->cmdreg))
|
|
return PTR_ERR(data->cmdreg);
|
|
|
|
switch (data->type) {
|
|
case smm465:
|
|
case smm665:
|
|
data->conversion_time = SMM665_ADC_WAIT_SMM665;
|
|
break;
|
|
case smm665c:
|
|
case smm764:
|
|
case smm766:
|
|
data->conversion_time = SMM665_ADC_WAIT_SMM766;
|
|
break;
|
|
}
|
|
|
|
ret = -ENODEV;
|
|
if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0)
|
|
goto out_unregister;
|
|
|
|
/*
|
|
* Read limits.
|
|
*
|
|
* Limit registers start with register SMM665_LIMIT_BASE.
|
|
* Each channel uses 8 registers, providing four limit values
|
|
* per channel. Each limit value requires two registers, with the
|
|
* high byte in the first register and the low byte in the second
|
|
* register. The first two limits are under limit values, followed
|
|
* by two over limit values.
|
|
*
|
|
* Limit register order matches the ADC register order, so we use
|
|
* ADC register defines throughout the code to index limit registers.
|
|
*
|
|
* We save the first retrieved value both as "critical" and "alarm"
|
|
* value. The second value overwrites either the critical or the
|
|
* alarm value, depending on its configuration. This ensures that both
|
|
* critical and alarm values are initialized, even if both registers are
|
|
* configured as critical or non-critical.
|
|
*/
|
|
for (i = 0; i < SMM665_NUM_ADC; i++) {
|
|
int val;
|
|
|
|
val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8);
|
|
if (unlikely(val < 0))
|
|
goto out_unregister;
|
|
data->critical_min_limit[i] = data->alarm_min_limit[i]
|
|
= smm665_convert(val, i);
|
|
val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2);
|
|
if (unlikely(val < 0))
|
|
goto out_unregister;
|
|
if (smm665_is_critical(val))
|
|
data->critical_min_limit[i] = smm665_convert(val, i);
|
|
else
|
|
data->alarm_min_limit[i] = smm665_convert(val, i);
|
|
val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4);
|
|
if (unlikely(val < 0))
|
|
goto out_unregister;
|
|
data->critical_max_limit[i] = data->alarm_max_limit[i]
|
|
= smm665_convert(val, i);
|
|
val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6);
|
|
if (unlikely(val < 0))
|
|
goto out_unregister;
|
|
if (smm665_is_critical(val))
|
|
data->critical_max_limit[i] = smm665_convert(val, i);
|
|
else
|
|
data->alarm_max_limit[i] = smm665_convert(val, i);
|
|
}
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
|
|
client->name, data,
|
|
smm665_groups);
|
|
if (IS_ERR(hwmon_dev)) {
|
|
ret = PTR_ERR(hwmon_dev);
|
|
goto out_unregister;
|
|
}
|
|
|
|
return 0;
|
|
|
|
out_unregister:
|
|
i2c_unregister_device(data->cmdreg);
|
|
return ret;
|
|
}
|
|
|
|
static void smm665_remove(struct i2c_client *client)
|
|
{
|
|
struct smm665_data *data = i2c_get_clientdata(client);
|
|
|
|
i2c_unregister_device(data->cmdreg);
|
|
}
|
|
|
|
static const struct i2c_device_id smm665_id[] = {
|
|
{"smm465", smm465},
|
|
{"smm665", smm665},
|
|
{"smm665c", smm665c},
|
|
{"smm764", smm764},
|
|
{"smm766", smm766},
|
|
{}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, smm665_id);
|
|
|
|
/* This is the driver that will be inserted */
|
|
static struct i2c_driver smm665_driver = {
|
|
.driver = {
|
|
.name = "smm665",
|
|
},
|
|
.probe_new = smm665_probe,
|
|
.remove = smm665_remove,
|
|
.id_table = smm665_id,
|
|
};
|
|
|
|
module_i2c_driver(smm665_driver);
|
|
|
|
MODULE_AUTHOR("Guenter Roeck");
|
|
MODULE_DESCRIPTION("SMM665 driver");
|
|
MODULE_LICENSE("GPL");
|