643 lines
16 KiB
C
643 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
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*
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* Copyright (C) 2017 Matt Ranostay <matt.ranostay@konsulko.com>
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*
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* Support for MAX30105 optical particle sensor
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* Copyright (C) 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
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*
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* 7-bit I2C chip address: 0x57
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* TODO: proximity power saving feature
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/mod_devicetable.h>
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#include <linux/regmap.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/kfifo_buf.h>
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#define MAX30102_REGMAP_NAME "max30102_regmap"
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#define MAX30102_DRV_NAME "max30102"
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#define MAX30102_PART_NUMBER 0x15
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enum max30102_chip_id {
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max30102,
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max30105,
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};
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enum max3012_led_idx {
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MAX30102_LED_RED,
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MAX30102_LED_IR,
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MAX30105_LED_GREEN,
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};
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#define MAX30102_REG_INT_STATUS 0x00
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#define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
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#define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
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#define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
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#define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
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#define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
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#define MAX30102_REG_INT_ENABLE 0x02
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#define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
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#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
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#define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
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#define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
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#define MAX30102_REG_INT_ENABLE_MASK 0xf0
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#define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
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#define MAX30102_REG_FIFO_WR_PTR 0x04
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#define MAX30102_REG_FIFO_OVR_CTR 0x05
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#define MAX30102_REG_FIFO_RD_PTR 0x06
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#define MAX30102_REG_FIFO_DATA 0x07
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#define MAX30102_REG_FIFO_DATA_BYTES 3
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#define MAX30102_REG_FIFO_CONFIG 0x08
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#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
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#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
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#define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
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#define MAX30102_REG_MODE_CONFIG 0x09
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#define MAX30102_REG_MODE_CONFIG_MODE_NONE 0x00
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#define MAX30102_REG_MODE_CONFIG_MODE_HR 0x02 /* red LED */
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#define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2 0x03 /* red + IR LED */
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#define MAX30102_REG_MODE_CONFIG_MODE_MULTI 0x07 /* multi-LED mode */
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#define MAX30102_REG_MODE_CONFIG_MODE_MASK GENMASK(2, 0)
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#define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
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#define MAX30102_REG_MODE_CONTROL_SLOT21 0x11 /* multi-LED control */
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#define MAX30102_REG_MODE_CONTROL_SLOT43 0x12
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#define MAX30102_REG_MODE_CONTROL_SLOT_MASK (GENMASK(6, 4) | GENMASK(2, 0))
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#define MAX30102_REG_MODE_CONTROL_SLOT_SHIFT 4
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#define MAX30102_REG_SPO2_CONFIG 0x0a
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#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
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#define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
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#define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
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#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
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#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
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#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
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#define MAX30102_REG_RED_LED_CONFIG 0x0c
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#define MAX30102_REG_IR_LED_CONFIG 0x0d
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#define MAX30105_REG_GREEN_LED_CONFIG 0x0e
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#define MAX30102_REG_TEMP_CONFIG 0x21
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#define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
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#define MAX30102_REG_TEMP_INTEGER 0x1f
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#define MAX30102_REG_TEMP_FRACTION 0x20
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#define MAX30102_REG_REV_ID 0xfe
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#define MAX30102_REG_PART_ID 0xff
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struct max30102_data {
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struct i2c_client *client;
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struct iio_dev *indio_dev;
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struct mutex lock;
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struct regmap *regmap;
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enum max30102_chip_id chip_id;
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u8 buffer[12];
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__be32 processed_buffer[3]; /* 3 x 18-bit (padded to 32-bits) */
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};
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static const struct regmap_config max30102_regmap_config = {
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.name = MAX30102_REGMAP_NAME,
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.reg_bits = 8,
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.val_bits = 8,
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};
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static const unsigned long max30102_scan_masks[] = {
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BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
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0
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};
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static const unsigned long max30105_scan_masks[] = {
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BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
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BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
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BIT(MAX30105_LED_GREEN),
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0
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};
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#define MAX30102_INTENSITY_CHANNEL(_si, _mod) { \
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.type = IIO_INTENSITY, \
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.channel2 = _mod, \
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.modified = 1, \
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.scan_index = _si, \
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.scan_type = { \
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.sign = 'u', \
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.shift = 8, \
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.realbits = 18, \
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.storagebits = 32, \
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.endianness = IIO_BE, \
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}, \
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}
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static const struct iio_chan_spec max30102_channels[] = {
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MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
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MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
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{
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.type = IIO_TEMP,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = -1,
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},
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};
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static const struct iio_chan_spec max30105_channels[] = {
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MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
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MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
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MAX30102_INTENSITY_CHANNEL(MAX30105_LED_GREEN, IIO_MOD_LIGHT_GREEN),
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{
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.type = IIO_TEMP,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = -1,
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},
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};
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static int max30102_set_power(struct max30102_data *data, bool en)
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{
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return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
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MAX30102_REG_MODE_CONFIG_PWR,
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en ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
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}
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static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en)
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{
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u8 reg = mode;
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if (!en)
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reg |= MAX30102_REG_MODE_CONFIG_PWR;
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return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
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MAX30102_REG_MODE_CONFIG_PWR |
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MAX30102_REG_MODE_CONFIG_MODE_MASK, reg);
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}
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#define MAX30102_MODE_CONTROL_LED_SLOTS(slot2, slot1) \
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((slot2 << MAX30102_REG_MODE_CONTROL_SLOT_SHIFT) | slot1)
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static int max30102_buffer_postenable(struct iio_dev *indio_dev)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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int ret;
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u8 reg;
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switch (*indio_dev->active_scan_mask) {
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case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR):
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reg = MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2;
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break;
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case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
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BIT(MAX30105_LED_GREEN):
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ret = regmap_update_bits(data->regmap,
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MAX30102_REG_MODE_CONTROL_SLOT21,
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MAX30102_REG_MODE_CONTROL_SLOT_MASK,
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MAX30102_MODE_CONTROL_LED_SLOTS(2, 1));
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if (ret)
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return ret;
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ret = regmap_update_bits(data->regmap,
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MAX30102_REG_MODE_CONTROL_SLOT43,
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MAX30102_REG_MODE_CONTROL_SLOT_MASK,
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MAX30102_MODE_CONTROL_LED_SLOTS(0, 3));
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if (ret)
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return ret;
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reg = MAX30102_REG_MODE_CONFIG_MODE_MULTI;
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break;
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default:
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return -EINVAL;
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}
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return max30102_set_powermode(data, reg, true);
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}
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static int max30102_buffer_predisable(struct iio_dev *indio_dev)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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return max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
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false);
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}
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static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
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.postenable = max30102_buffer_postenable,
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.predisable = max30102_buffer_predisable,
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};
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static inline int max30102_fifo_count(struct max30102_data *data)
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{
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unsigned int val;
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int ret;
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ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
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if (ret)
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return ret;
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/* FIFO has one sample slot left */
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if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
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return 1;
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return 0;
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}
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#define MAX30102_COPY_DATA(i) \
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memcpy(&data->processed_buffer[(i)], \
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&buffer[(i) * MAX30102_REG_FIFO_DATA_BYTES], \
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MAX30102_REG_FIFO_DATA_BYTES)
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static int max30102_read_measurement(struct max30102_data *data,
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unsigned int measurements)
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{
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int ret;
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u8 *buffer = (u8 *) &data->buffer;
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ret = i2c_smbus_read_i2c_block_data(data->client,
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MAX30102_REG_FIFO_DATA,
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measurements *
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MAX30102_REG_FIFO_DATA_BYTES,
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buffer);
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switch (measurements) {
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case 3:
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MAX30102_COPY_DATA(2);
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fallthrough;
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case 2:
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MAX30102_COPY_DATA(1);
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fallthrough;
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case 1:
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MAX30102_COPY_DATA(0);
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break;
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default:
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return -EINVAL;
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}
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return (ret == measurements * MAX30102_REG_FIFO_DATA_BYTES) ?
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0 : -EINVAL;
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}
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static irqreturn_t max30102_interrupt_handler(int irq, void *private)
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{
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struct iio_dev *indio_dev = private;
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struct max30102_data *data = iio_priv(indio_dev);
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unsigned int measurements = bitmap_weight(indio_dev->active_scan_mask,
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indio_dev->masklength);
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int ret, cnt = 0;
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mutex_lock(&data->lock);
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while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
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ret = max30102_read_measurement(data, measurements);
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if (ret)
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break;
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iio_push_to_buffers(data->indio_dev, data->processed_buffer);
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cnt--;
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}
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mutex_unlock(&data->lock);
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return IRQ_HANDLED;
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}
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static int max30102_get_current_idx(unsigned int val, int *reg)
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{
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/* each step is 0.200 mA */
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*reg = val / 200;
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return *reg > 0xff ? -EINVAL : 0;
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}
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static int max30102_led_init(struct max30102_data *data)
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{
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struct device *dev = &data->client->dev;
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unsigned int val;
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int reg, ret;
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ret = device_property_read_u32(dev, "maxim,red-led-current-microamp", &val);
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if (ret) {
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dev_info(dev, "no red-led-current-microamp set\n");
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/* Default to 7 mA RED LED */
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val = 7000;
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}
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ret = max30102_get_current_idx(val, ®);
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if (ret) {
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dev_err(dev, "invalid RED LED current setting %d\n", val);
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return ret;
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}
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ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
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if (ret)
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return ret;
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if (data->chip_id == max30105) {
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ret = device_property_read_u32(dev,
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"maxim,green-led-current-microamp", &val);
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if (ret) {
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dev_info(dev, "no green-led-current-microamp set\n");
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/* Default to 7 mA green LED */
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val = 7000;
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}
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ret = max30102_get_current_idx(val, ®);
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if (ret) {
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dev_err(dev, "invalid green LED current setting %d\n",
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val);
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return ret;
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}
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ret = regmap_write(data->regmap, MAX30105_REG_GREEN_LED_CONFIG,
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reg);
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if (ret)
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return ret;
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}
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ret = device_property_read_u32(dev, "maxim,ir-led-current-microamp", &val);
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if (ret) {
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dev_info(dev, "no ir-led-current-microamp set\n");
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/* Default to 7 mA IR LED */
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val = 7000;
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}
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ret = max30102_get_current_idx(val, ®);
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if (ret) {
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dev_err(dev, "invalid IR LED current setting %d\n", val);
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return ret;
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}
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return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
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}
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static int max30102_chip_init(struct max30102_data *data)
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{
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int ret;
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/* setup LED current settings */
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ret = max30102_led_init(data);
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if (ret)
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return ret;
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/* configure 18-bit HR + SpO2 readings at 400Hz */
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ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
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(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
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<< MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
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(MAX30102_REG_SPO2_CONFIG_SR_400HZ
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<< MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
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MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
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if (ret)
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return ret;
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/* average 4 samples + generate FIFO interrupt */
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ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
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(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
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<< MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
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MAX30102_REG_FIFO_CONFIG_AFULL);
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if (ret)
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return ret;
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/* enable FIFO interrupt */
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return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
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MAX30102_REG_INT_ENABLE_MASK,
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MAX30102_REG_INT_ENABLE_FIFO_EN);
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}
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static int max30102_read_temp(struct max30102_data *data, int *val)
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{
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int ret;
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unsigned int reg;
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ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, ®);
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if (ret < 0)
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return ret;
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*val = reg << 4;
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ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, ®);
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if (ret < 0)
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return ret;
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*val |= reg & 0xf;
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*val = sign_extend32(*val, 11);
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return 0;
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}
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static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
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{
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int ret;
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if (en) {
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ret = max30102_set_power(data, true);
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if (ret)
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return ret;
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}
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/* start acquisition */
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ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
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MAX30102_REG_TEMP_CONFIG_TEMP_EN,
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MAX30102_REG_TEMP_CONFIG_TEMP_EN);
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if (ret)
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goto out;
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msleep(35);
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ret = max30102_read_temp(data, val);
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out:
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if (en)
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max30102_set_power(data, false);
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return ret;
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}
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static int max30102_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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int ret = -EINVAL;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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/*
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* Temperature reading can only be acquired when not in
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* shutdown; leave shutdown briefly when buffer not running
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*/
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any_mode_retry:
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if (iio_device_claim_buffer_mode(indio_dev)) {
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/*
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* This one is a *bit* hacky. If we cannot claim buffer
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* mode, then try direct mode so that we make sure
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|
* things cannot concurrently change. And we just keep
|
|
* trying until we get one of the modes...
|
|
*/
|
|
if (iio_device_claim_direct_mode(indio_dev))
|
|
goto any_mode_retry;
|
|
|
|
ret = max30102_get_temp(data, val, true);
|
|
iio_device_release_direct_mode(indio_dev);
|
|
} else {
|
|
ret = max30102_get_temp(data, val, false);
|
|
iio_device_release_buffer_mode(indio_dev);
|
|
}
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = IIO_VAL_INT;
|
|
break;
|
|
case IIO_CHAN_INFO_SCALE:
|
|
*val = 1000; /* 62.5 */
|
|
*val2 = 16;
|
|
ret = IIO_VAL_FRACTIONAL;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct iio_info max30102_info = {
|
|
.read_raw = max30102_read_raw,
|
|
};
|
|
|
|
static int max30102_probe(struct i2c_client *client)
|
|
{
|
|
const struct i2c_device_id *id = i2c_client_get_device_id(client);
|
|
struct max30102_data *data;
|
|
struct iio_dev *indio_dev;
|
|
int ret;
|
|
unsigned int reg;
|
|
|
|
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
indio_dev->name = MAX30102_DRV_NAME;
|
|
indio_dev->info = &max30102_info;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
data = iio_priv(indio_dev);
|
|
data->indio_dev = indio_dev;
|
|
data->client = client;
|
|
data->chip_id = id->driver_data;
|
|
|
|
mutex_init(&data->lock);
|
|
i2c_set_clientdata(client, indio_dev);
|
|
|
|
switch (data->chip_id) {
|
|
case max30105:
|
|
indio_dev->channels = max30105_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(max30105_channels);
|
|
indio_dev->available_scan_masks = max30105_scan_masks;
|
|
break;
|
|
case max30102:
|
|
indio_dev->channels = max30102_channels;
|
|
indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
|
|
indio_dev->available_scan_masks = max30102_scan_masks;
|
|
break;
|
|
default:
|
|
return -ENODEV;
|
|
}
|
|
|
|
ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
|
|
&max30102_buffer_setup_ops);
|
|
if (ret)
|
|
return ret;
|
|
|
|
data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
|
|
if (IS_ERR(data->regmap)) {
|
|
dev_err(&client->dev, "regmap initialization failed\n");
|
|
return PTR_ERR(data->regmap);
|
|
}
|
|
|
|
/* check part ID */
|
|
ret = regmap_read(data->regmap, MAX30102_REG_PART_ID, ®);
|
|
if (ret)
|
|
return ret;
|
|
if (reg != MAX30102_PART_NUMBER)
|
|
return -ENODEV;
|
|
|
|
/* show revision ID */
|
|
ret = regmap_read(data->regmap, MAX30102_REG_REV_ID, ®);
|
|
if (ret)
|
|
return ret;
|
|
dev_dbg(&client->dev, "max3010x revision %02x\n", reg);
|
|
|
|
/* clear mode setting, chip shutdown */
|
|
ret = max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
|
|
false);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = max30102_chip_init(data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (client->irq <= 0) {
|
|
dev_err(&client->dev, "no valid irq defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(&client->dev, client->irq,
|
|
NULL, max30102_interrupt_handler,
|
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
|
|
"max30102_irq", indio_dev);
|
|
if (ret) {
|
|
dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
|
|
return ret;
|
|
}
|
|
|
|
return iio_device_register(indio_dev);
|
|
}
|
|
|
|
static void max30102_remove(struct i2c_client *client)
|
|
{
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
struct max30102_data *data = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
max30102_set_power(data, false);
|
|
}
|
|
|
|
static const struct i2c_device_id max30102_id[] = {
|
|
{ "max30102", max30102 },
|
|
{ "max30105", max30105 },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, max30102_id);
|
|
|
|
static const struct of_device_id max30102_dt_ids[] = {
|
|
{ .compatible = "maxim,max30102" },
|
|
{ .compatible = "maxim,max30105" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, max30102_dt_ids);
|
|
|
|
static struct i2c_driver max30102_driver = {
|
|
.driver = {
|
|
.name = MAX30102_DRV_NAME,
|
|
.of_match_table = max30102_dt_ids,
|
|
},
|
|
.probe_new = max30102_probe,
|
|
.remove = max30102_remove,
|
|
.id_table = max30102_id,
|
|
};
|
|
module_i2c_driver(max30102_driver);
|
|
|
|
MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
|
|
MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
|
|
MODULE_LICENSE("GPL");
|