403 lines
9.2 KiB
C
403 lines
9.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Device access for Dialog DA9055 PMICs.
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*
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* Copyright(c) 2012 Dialog Semiconductor Ltd.
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*
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* Author: David Dajun Chen <dchen@diasemi.com>
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/input.h>
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#include <linux/irq.h>
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#include <linux/mutex.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/da9055/core.h>
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#include <linux/mfd/da9055/pdata.h>
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#include <linux/mfd/da9055/reg.h>
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#define DA9055_IRQ_NONKEY_MASK 0x01
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#define DA9055_IRQ_ALM_MASK 0x02
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#define DA9055_IRQ_TICK_MASK 0x04
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#define DA9055_IRQ_ADC_MASK 0x08
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#define DA9055_IRQ_BUCK_ILIM_MASK 0x08
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static bool da9055_register_readable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9055_REG_STATUS_A:
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case DA9055_REG_STATUS_B:
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case DA9055_REG_EVENT_A:
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case DA9055_REG_EVENT_B:
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case DA9055_REG_EVENT_C:
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case DA9055_REG_IRQ_MASK_A:
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case DA9055_REG_IRQ_MASK_B:
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case DA9055_REG_IRQ_MASK_C:
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case DA9055_REG_CONTROL_A:
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case DA9055_REG_CONTROL_B:
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case DA9055_REG_CONTROL_C:
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case DA9055_REG_CONTROL_D:
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case DA9055_REG_CONTROL_E:
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case DA9055_REG_ADC_MAN:
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case DA9055_REG_ADC_CONT:
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case DA9055_REG_VSYS_MON:
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case DA9055_REG_ADC_RES_L:
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case DA9055_REG_ADC_RES_H:
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case DA9055_REG_VSYS_RES:
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case DA9055_REG_ADCIN1_RES:
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case DA9055_REG_ADCIN2_RES:
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case DA9055_REG_ADCIN3_RES:
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case DA9055_REG_COUNT_S:
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case DA9055_REG_COUNT_MI:
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case DA9055_REG_COUNT_H:
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case DA9055_REG_COUNT_D:
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case DA9055_REG_COUNT_MO:
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case DA9055_REG_COUNT_Y:
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case DA9055_REG_ALARM_H:
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case DA9055_REG_ALARM_D:
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case DA9055_REG_ALARM_MI:
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case DA9055_REG_ALARM_MO:
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case DA9055_REG_ALARM_Y:
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case DA9055_REG_GPIO0_1:
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case DA9055_REG_GPIO2:
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case DA9055_REG_GPIO_MODE0_2:
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case DA9055_REG_BCORE_CONT:
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case DA9055_REG_BMEM_CONT:
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case DA9055_REG_LDO1_CONT:
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case DA9055_REG_LDO2_CONT:
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case DA9055_REG_LDO3_CONT:
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case DA9055_REG_LDO4_CONT:
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case DA9055_REG_LDO5_CONT:
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case DA9055_REG_LDO6_CONT:
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case DA9055_REG_BUCK_LIM:
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case DA9055_REG_BCORE_MODE:
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case DA9055_REG_VBCORE_A:
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case DA9055_REG_VBMEM_A:
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case DA9055_REG_VLDO1_A:
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case DA9055_REG_VLDO2_A:
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case DA9055_REG_VLDO3_A:
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case DA9055_REG_VLDO4_A:
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case DA9055_REG_VLDO5_A:
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case DA9055_REG_VLDO6_A:
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case DA9055_REG_VBCORE_B:
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case DA9055_REG_VBMEM_B:
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case DA9055_REG_VLDO1_B:
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case DA9055_REG_VLDO2_B:
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case DA9055_REG_VLDO3_B:
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case DA9055_REG_VLDO4_B:
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case DA9055_REG_VLDO5_B:
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case DA9055_REG_VLDO6_B:
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return true;
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default:
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return false;
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}
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}
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static bool da9055_register_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9055_REG_STATUS_A:
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case DA9055_REG_STATUS_B:
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case DA9055_REG_EVENT_A:
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case DA9055_REG_EVENT_B:
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case DA9055_REG_EVENT_C:
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case DA9055_REG_IRQ_MASK_A:
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case DA9055_REG_IRQ_MASK_B:
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case DA9055_REG_IRQ_MASK_C:
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case DA9055_REG_CONTROL_A:
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case DA9055_REG_CONTROL_B:
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case DA9055_REG_CONTROL_C:
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case DA9055_REG_CONTROL_D:
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case DA9055_REG_CONTROL_E:
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case DA9055_REG_ADC_MAN:
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case DA9055_REG_ADC_CONT:
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case DA9055_REG_VSYS_MON:
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case DA9055_REG_ADC_RES_L:
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case DA9055_REG_ADC_RES_H:
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case DA9055_REG_VSYS_RES:
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case DA9055_REG_ADCIN1_RES:
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case DA9055_REG_ADCIN2_RES:
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case DA9055_REG_ADCIN3_RES:
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case DA9055_REG_COUNT_S:
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case DA9055_REG_COUNT_MI:
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case DA9055_REG_COUNT_H:
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case DA9055_REG_COUNT_D:
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case DA9055_REG_COUNT_MO:
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case DA9055_REG_COUNT_Y:
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case DA9055_REG_ALARM_H:
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case DA9055_REG_ALARM_D:
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case DA9055_REG_ALARM_MI:
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case DA9055_REG_ALARM_MO:
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case DA9055_REG_ALARM_Y:
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case DA9055_REG_GPIO0_1:
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case DA9055_REG_GPIO2:
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case DA9055_REG_GPIO_MODE0_2:
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case DA9055_REG_BCORE_CONT:
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case DA9055_REG_BMEM_CONT:
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case DA9055_REG_LDO1_CONT:
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case DA9055_REG_LDO2_CONT:
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case DA9055_REG_LDO3_CONT:
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case DA9055_REG_LDO4_CONT:
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case DA9055_REG_LDO5_CONT:
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case DA9055_REG_LDO6_CONT:
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case DA9055_REG_BUCK_LIM:
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case DA9055_REG_BCORE_MODE:
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case DA9055_REG_VBCORE_A:
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case DA9055_REG_VBMEM_A:
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case DA9055_REG_VLDO1_A:
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case DA9055_REG_VLDO2_A:
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case DA9055_REG_VLDO3_A:
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case DA9055_REG_VLDO4_A:
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case DA9055_REG_VLDO5_A:
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case DA9055_REG_VLDO6_A:
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case DA9055_REG_VBCORE_B:
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case DA9055_REG_VBMEM_B:
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case DA9055_REG_VLDO1_B:
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case DA9055_REG_VLDO2_B:
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case DA9055_REG_VLDO3_B:
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case DA9055_REG_VLDO4_B:
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case DA9055_REG_VLDO5_B:
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case DA9055_REG_VLDO6_B:
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return true;
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default:
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return false;
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}
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}
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static bool da9055_register_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case DA9055_REG_STATUS_A:
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case DA9055_REG_STATUS_B:
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case DA9055_REG_EVENT_A:
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case DA9055_REG_EVENT_B:
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case DA9055_REG_EVENT_C:
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case DA9055_REG_CONTROL_A:
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case DA9055_REG_CONTROL_E:
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case DA9055_REG_ADC_MAN:
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case DA9055_REG_ADC_RES_L:
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case DA9055_REG_ADC_RES_H:
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case DA9055_REG_VSYS_RES:
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case DA9055_REG_ADCIN1_RES:
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case DA9055_REG_ADCIN2_RES:
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case DA9055_REG_ADCIN3_RES:
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case DA9055_REG_COUNT_S:
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case DA9055_REG_COUNT_MI:
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case DA9055_REG_COUNT_H:
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case DA9055_REG_COUNT_D:
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case DA9055_REG_COUNT_MO:
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case DA9055_REG_COUNT_Y:
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case DA9055_REG_ALARM_MI:
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case DA9055_REG_BCORE_CONT:
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case DA9055_REG_BMEM_CONT:
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case DA9055_REG_LDO1_CONT:
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case DA9055_REG_LDO2_CONT:
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case DA9055_REG_LDO3_CONT:
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case DA9055_REG_LDO4_CONT:
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case DA9055_REG_LDO5_CONT:
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case DA9055_REG_LDO6_CONT:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_irq da9055_irqs[] = {
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[DA9055_IRQ_NONKEY] = {
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.reg_offset = 0,
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.mask = DA9055_IRQ_NONKEY_MASK,
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},
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[DA9055_IRQ_ALARM] = {
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.reg_offset = 0,
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.mask = DA9055_IRQ_ALM_MASK,
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},
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[DA9055_IRQ_TICK] = {
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.reg_offset = 0,
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.mask = DA9055_IRQ_TICK_MASK,
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},
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[DA9055_IRQ_HWMON] = {
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.reg_offset = 0,
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.mask = DA9055_IRQ_ADC_MASK,
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},
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[DA9055_IRQ_REGULATOR] = {
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.reg_offset = 1,
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.mask = DA9055_IRQ_BUCK_ILIM_MASK,
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},
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};
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const struct regmap_config da9055_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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.max_register = DA9055_MAX_REGISTER_CNT,
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.readable_reg = da9055_register_readable,
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.writeable_reg = da9055_register_writeable,
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.volatile_reg = da9055_register_volatile,
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};
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EXPORT_SYMBOL_GPL(da9055_regmap_config);
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static const struct resource da9055_onkey_resource =
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DEFINE_RES_IRQ_NAMED(DA9055_IRQ_NONKEY, "ONKEY");
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static const struct resource da9055_rtc_resource[] = {
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DEFINE_RES_IRQ_NAMED(DA9055_IRQ_ALARM, "ALM"),
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DEFINE_RES_IRQ_NAMED(DA9055_IRQ_TICK, "TICK"),
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};
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static const struct resource da9055_hwmon_resource =
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DEFINE_RES_IRQ_NAMED(DA9055_IRQ_HWMON, "HWMON");
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static const struct resource da9055_ld05_6_resource =
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DEFINE_RES_IRQ_NAMED(DA9055_IRQ_REGULATOR, "REGULATOR");
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static const struct mfd_cell da9055_devs[] = {
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{
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.of_compatible = "dlg,da9055-gpio",
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.name = "da9055-gpio",
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 1,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 2,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 3,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 4,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 5,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 6,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.id = 7,
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.resources = &da9055_ld05_6_resource,
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.num_resources = 1,
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},
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{
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.of_compatible = "dlg,da9055-regulator",
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.name = "da9055-regulator",
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.resources = &da9055_ld05_6_resource,
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.num_resources = 1,
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.id = 8,
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},
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{
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.of_compatible = "dlg,da9055-onkey",
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.name = "da9055-onkey",
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.resources = &da9055_onkey_resource,
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.num_resources = 1,
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},
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{
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.of_compatible = "dlg,da9055-rtc",
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.name = "da9055-rtc",
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.resources = da9055_rtc_resource,
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.num_resources = ARRAY_SIZE(da9055_rtc_resource),
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},
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{
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.of_compatible = "dlg,da9055-hwmon",
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.name = "da9055-hwmon",
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.resources = &da9055_hwmon_resource,
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.num_resources = 1,
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},
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{
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.of_compatible = "dlg,da9055-watchdog",
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.name = "da9055-watchdog",
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},
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};
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static const struct regmap_irq_chip da9055_regmap_irq_chip = {
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.name = "da9055_irq",
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.status_base = DA9055_REG_EVENT_A,
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.mask_base = DA9055_REG_IRQ_MASK_A,
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.ack_base = DA9055_REG_EVENT_A,
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.num_regs = 3,
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.irqs = da9055_irqs,
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.num_irqs = ARRAY_SIZE(da9055_irqs),
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};
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int da9055_device_init(struct da9055 *da9055)
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{
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struct da9055_pdata *pdata = dev_get_platdata(da9055->dev);
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int ret;
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uint8_t clear_events[3] = {0xFF, 0xFF, 0xFF};
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if (pdata && pdata->init != NULL)
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pdata->init(da9055);
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if (!pdata || !pdata->irq_base)
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da9055->irq_base = -1;
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else
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da9055->irq_base = pdata->irq_base;
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ret = da9055_group_write(da9055, DA9055_REG_EVENT_A, 3, clear_events);
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if (ret < 0)
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return ret;
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ret = regmap_add_irq_chip(da9055->regmap, da9055->chip_irq,
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IRQF_TRIGGER_LOW | IRQF_ONESHOT,
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da9055->irq_base, &da9055_regmap_irq_chip,
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&da9055->irq_data);
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if (ret < 0)
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return ret;
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da9055->irq_base = regmap_irq_chip_get_base(da9055->irq_data);
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ret = mfd_add_devices(da9055->dev, -1,
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da9055_devs, ARRAY_SIZE(da9055_devs),
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NULL, da9055->irq_base, NULL);
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if (ret)
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goto err;
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return 0;
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err:
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mfd_remove_devices(da9055->dev);
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return ret;
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}
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void da9055_device_exit(struct da9055 *da9055)
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{
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regmap_del_irq_chip(da9055->chip_irq, da9055->irq_data);
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mfd_remove_devices(da9055->dev);
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}
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MODULE_DESCRIPTION("Core support for the DA9055 PMIC");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
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