167 lines
5.1 KiB
C
167 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell CN10K RPM driver
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*
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* Copyright (C) 2020 Marvell.
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*
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*/
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#ifndef LMAC_COMMON_H
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#define LMAC_COMMON_H
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#include "rvu.h"
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#include "cgx.h"
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/**
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* struct lmac - per lmac locks and properties
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* @wq_cmd_cmplt: waitq to keep the process blocked until cmd completion
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* @cmd_lock: Lock to serialize the command interface
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* @resp: command response
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* @link_info: link related information
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* @mac_to_index_bmap: Mac address to CGX table index mapping
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* @rx_fc_pfvf_bmap: Receive flow control enabled netdev mapping
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* @tx_fc_pfvf_bmap: Transmit flow control enabled netdev mapping
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* @event_cb: callback for linkchange events
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* @event_cb_lock: lock for serializing callback with unregister
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* @cgx: parent cgx port
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* @mcast_filters_count: Number of multicast filters installed
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* @lmac_id: lmac port id
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* @cmd_pend: flag set before new command is started
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* flag cleared after command response is received
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* @name: lmac port name
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*/
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struct lmac {
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wait_queue_head_t wq_cmd_cmplt;
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/* Lock to serialize the command interface */
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struct mutex cmd_lock;
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u64 resp;
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struct cgx_link_user_info link_info;
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struct rsrc_bmap mac_to_index_bmap;
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struct rsrc_bmap rx_fc_pfvf_bmap;
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struct rsrc_bmap tx_fc_pfvf_bmap;
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struct cgx_event_cb event_cb;
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/* lock for serializing callback with unregister */
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spinlock_t event_cb_lock;
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struct cgx *cgx;
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u8 mcast_filters_count;
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u8 lmac_id;
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bool cmd_pend;
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char *name;
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};
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/* CGX & RPM has different feature set
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* update the structure fields with different one
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*/
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struct mac_ops {
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char *name;
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/* Features like RXSTAT, TXSTAT, DMAC FILTER csrs differs by fixed
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* bar offset for example
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* CGX DMAC_CTL0 0x1f8
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* RPM DMAC_CTL0 0x4ff8
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*/
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u64 csr_offset;
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/* For ATF to send events to kernel, there is no dedicated interrupt
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* defined hence CGX uses OVERFLOW bit in CMR_INT. RPM block supports
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* SW_INT so that ATF triggers this interrupt after processing of
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* requested command
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*/
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u64 int_register;
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u64 int_set_reg;
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/* lmac offset is different is RPM */
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u8 lmac_offset;
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u8 irq_offset;
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u8 int_ena_bit;
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u8 lmac_fwi;
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u32 fifo_len;
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bool non_contiguous_serdes_lane;
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/* RPM & CGX differs in number of Receive/transmit stats */
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u8 rx_stats_cnt;
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u8 tx_stats_cnt;
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/* Unlike CN10K which shares same CSR offset with CGX
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* CNF10KB has different csr offset
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*/
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u64 rxid_map_offset;
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u8 dmac_filter_count;
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/* Incase of RPM get number of lmacs from RPMX_CMR_RX_LMACS[LMAC_EXIST]
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* number of setbits in lmac_exist tells number of lmacs
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*/
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int (*get_nr_lmacs)(void *cgx);
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u8 (*get_lmac_type)(void *cgx, int lmac_id);
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u32 (*lmac_fifo_len)(void *cgx, int lmac_id);
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int (*mac_lmac_intl_lbk)(void *cgx, int lmac_id,
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bool enable);
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/* Register Stats related functions */
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int (*mac_get_rx_stats)(void *cgx, int lmac_id,
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int idx, u64 *rx_stat);
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int (*mac_get_tx_stats)(void *cgx, int lmac_id,
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int idx, u64 *tx_stat);
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/* Enable LMAC Pause Frame Configuration */
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void (*mac_enadis_rx_pause_fwding)(void *cgxd,
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int lmac_id,
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bool enable);
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int (*mac_get_pause_frm_status)(void *cgxd,
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int lmac_id,
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u8 *tx_pause,
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u8 *rx_pause);
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int (*mac_enadis_pause_frm)(void *cgxd,
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int lmac_id,
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u8 tx_pause,
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u8 rx_pause);
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void (*mac_pause_frm_config)(void *cgxd,
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int lmac_id,
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bool enable);
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/* Enable/Disable Inbound PTP */
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void (*mac_enadis_ptp_config)(void *cgxd,
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int lmac_id,
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bool enable);
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int (*mac_rx_tx_enable)(void *cgxd, int lmac_id, bool enable);
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int (*mac_tx_enable)(void *cgxd, int lmac_id, bool enable);
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int (*pfc_config)(void *cgxd, int lmac_id,
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u8 tx_pause, u8 rx_pause, u16 pfc_en);
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int (*mac_get_pfc_frm_cfg)(void *cgxd, int lmac_id,
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u8 *tx_pause, u8 *rx_pause);
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/* FEC stats */
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int (*get_fec_stats)(void *cgxd, int lmac_id,
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struct cgx_fec_stats_rsp *rsp);
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};
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struct cgx {
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void __iomem *reg_base;
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struct pci_dev *pdev;
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u8 cgx_id;
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u8 lmac_count;
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/* number of LMACs per MAC could be 4 or 8 */
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u8 max_lmac_per_mac;
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#define MAX_LMAC_COUNT 8
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struct lmac *lmac_idmap[MAX_LMAC_COUNT];
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struct work_struct cgx_cmd_work;
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struct workqueue_struct *cgx_cmd_workq;
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struct list_head cgx_list;
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u64 hw_features;
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struct mac_ops *mac_ops;
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unsigned long lmac_bmap; /* bitmap of enabled lmacs */
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/* Lock to serialize read/write of global csrs like
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* RPMX_MTI_STAT_DATA_HI_CDC etc
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*/
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struct mutex lock;
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};
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typedef struct cgx rpm_t;
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/* Function Declarations */
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void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val);
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u64 cgx_read(struct cgx *cgx, u64 lmac, u64 offset);
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struct lmac *lmac_pdata(u8 lmac_id, struct cgx *cgx);
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int cgx_fwi_cmd_send(u64 req, u64 *resp, struct lmac *lmac);
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int cgx_fwi_cmd_generic(u64 req, u64 *resp, struct cgx *cgx, int lmac_id);
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bool is_lmac_valid(struct cgx *cgx, int lmac_id);
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struct mac_ops *rpm_get_mac_ops(struct cgx *cgx);
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#endif /* LMAC_COMMON_H */
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