689 lines
17 KiB
C
689 lines
17 KiB
C
// SPDX-License-Identifier: ISC
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/*
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* Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/moduleparam.h>
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#include <linux/interrupt.h>
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#include <linux/suspend.h>
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#include "wil6210.h"
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#include <linux/rtnetlink.h>
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#include <linux/pm_runtime.h>
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static int n_msi = 3;
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module_param(n_msi, int, 0444);
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MODULE_PARM_DESC(n_msi, " Use MSI interrupt: 0 - use INTx, 1 - single, or 3 - (default) ");
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bool ftm_mode;
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module_param(ftm_mode, bool, 0444);
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MODULE_PARM_DESC(ftm_mode, " Set factory test mode, default - false");
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static int wil6210_pm_notify(struct notifier_block *notify_block,
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unsigned long mode, void *unused);
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static
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int wil_set_capabilities(struct wil6210_priv *wil)
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{
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const char *wil_fw_name;
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u32 jtag_id = wil_r(wil, RGF_USER_JTAG_DEV_ID);
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u8 chip_revision = (wil_r(wil, RGF_USER_REVISION_ID) &
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RGF_USER_REVISION_ID_MASK);
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int platform_capa;
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struct fw_map *iccm_section, *sct;
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bitmap_zero(wil->hw_capa, hw_capa_last);
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bitmap_zero(wil->fw_capabilities, WMI_FW_CAPABILITY_MAX);
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bitmap_zero(wil->platform_capa, WIL_PLATFORM_CAPA_MAX);
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wil->wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_DEFAULT :
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WIL_FW_NAME_DEFAULT;
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wil->chip_revision = chip_revision;
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switch (jtag_id) {
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case JTAG_DEV_ID_SPARROW:
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memcpy(fw_mapping, sparrow_fw_mapping,
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sizeof(sparrow_fw_mapping));
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switch (chip_revision) {
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case REVISION_ID_SPARROW_D0:
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wil->hw_name = "Sparrow D0";
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wil->hw_version = HW_VER_SPARROW_D0;
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wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_SPARROW_PLUS :
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WIL_FW_NAME_SPARROW_PLUS;
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if (wil_fw_verify_file_exists(wil, wil_fw_name))
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wil->wil_fw_name = wil_fw_name;
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sct = wil_find_fw_mapping("mac_rgf_ext");
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if (!sct) {
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wil_err(wil, "mac_rgf_ext section not found in fw_mapping\n");
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return -EINVAL;
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}
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memcpy(sct, &sparrow_d0_mac_rgf_ext, sizeof(*sct));
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break;
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case REVISION_ID_SPARROW_B0:
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wil->hw_name = "Sparrow B0";
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wil->hw_version = HW_VER_SPARROW_B0;
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break;
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default:
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wil->hw_name = "Unknown";
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wil->hw_version = HW_VER_UNKNOWN;
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break;
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}
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wil->rgf_fw_assert_code_addr = SPARROW_RGF_FW_ASSERT_CODE;
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wil->rgf_ucode_assert_code_addr = SPARROW_RGF_UCODE_ASSERT_CODE;
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break;
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case JTAG_DEV_ID_TALYN:
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wil->hw_name = "Talyn-MA";
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wil->hw_version = HW_VER_TALYN;
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memcpy(fw_mapping, talyn_fw_mapping, sizeof(talyn_fw_mapping));
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wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
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wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
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if (wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1) &
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BIT_NO_FLASH_INDICATION)
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set_bit(hw_capa_no_flash, wil->hw_capa);
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wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
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WIL_FW_NAME_TALYN;
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if (wil_fw_verify_file_exists(wil, wil_fw_name))
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wil->wil_fw_name = wil_fw_name;
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break;
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case JTAG_DEV_ID_TALYN_MB:
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wil->hw_name = "Talyn-MB";
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wil->hw_version = HW_VER_TALYN_MB;
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memcpy(fw_mapping, talyn_mb_fw_mapping,
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sizeof(talyn_mb_fw_mapping));
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wil->rgf_fw_assert_code_addr = TALYN_RGF_FW_ASSERT_CODE;
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wil->rgf_ucode_assert_code_addr = TALYN_RGF_UCODE_ASSERT_CODE;
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set_bit(hw_capa_no_flash, wil->hw_capa);
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wil->use_enhanced_dma_hw = true;
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wil->use_rx_hw_reordering = true;
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wil->use_compressed_rx_status = true;
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wil_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
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WIL_FW_NAME_TALYN;
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if (wil_fw_verify_file_exists(wil, wil_fw_name))
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wil->wil_fw_name = wil_fw_name;
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break;
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default:
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wil_err(wil, "Unknown board hardware, chip_id 0x%08x, chip_revision 0x%08x\n",
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jtag_id, chip_revision);
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wil->hw_name = "Unknown";
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wil->hw_version = HW_VER_UNKNOWN;
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return -EINVAL;
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}
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wil_init_txrx_ops(wil);
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iccm_section = wil_find_fw_mapping("fw_code");
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if (!iccm_section) {
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wil_err(wil, "fw_code section not found in fw_mapping\n");
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return -EINVAL;
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}
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wil->iccm_base = iccm_section->host;
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wil_info(wil, "Board hardware is %s, flash %sexist\n", wil->hw_name,
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test_bit(hw_capa_no_flash, wil->hw_capa) ? "doesn't " : "");
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/* Get platform capabilities */
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if (wil->platform_ops.get_capa) {
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platform_capa =
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wil->platform_ops.get_capa(wil->platform_handle);
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memcpy(wil->platform_capa, &platform_capa,
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min(sizeof(wil->platform_capa), sizeof(platform_capa)));
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}
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wil_info(wil, "platform_capa 0x%lx\n", *wil->platform_capa);
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/* extract FW capabilities from file without loading the FW */
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wil_request_firmware(wil, wil->wil_fw_name, false);
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wil_refresh_fw_capabilities(wil);
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return 0;
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}
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void wil_disable_irq(struct wil6210_priv *wil)
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{
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int irq = wil->pdev->irq;
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disable_irq(irq);
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if (wil->n_msi == 3) {
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disable_irq(irq + 1);
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disable_irq(irq + 2);
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}
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}
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void wil_enable_irq(struct wil6210_priv *wil)
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{
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int irq = wil->pdev->irq;
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enable_irq(irq);
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if (wil->n_msi == 3) {
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enable_irq(irq + 1);
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enable_irq(irq + 2);
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}
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}
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static void wil_remove_all_additional_vifs(struct wil6210_priv *wil)
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{
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struct wil6210_vif *vif;
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int i;
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for (i = 1; i < GET_MAX_VIFS(wil); i++) {
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vif = wil->vifs[i];
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if (vif) {
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wil_vif_prepare_stop(vif);
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wil_vif_remove(wil, vif->mid);
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}
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}
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}
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/* Bus ops */
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static int wil_if_pcie_enable(struct wil6210_priv *wil)
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{
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struct pci_dev *pdev = wil->pdev;
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int rc;
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/* on platforms with buggy ACPI, pdev->msi_enabled may be set to
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* allow pci_enable_device to work. This indicates INTx was not routed
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* and only MSI should be used
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*/
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int msi_only = pdev->msi_enabled;
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wil_dbg_misc(wil, "if_pcie_enable\n");
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pci_set_master(pdev);
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/* how many MSI interrupts to request? */
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switch (n_msi) {
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case 3:
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case 1:
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wil_dbg_misc(wil, "Setup %d MSI interrupts\n", n_msi);
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break;
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case 0:
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wil_dbg_misc(wil, "MSI interrupts disabled, use INTx\n");
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break;
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default:
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wil_err(wil, "Invalid n_msi=%d, default to 1\n", n_msi);
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n_msi = 1;
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}
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if (n_msi == 3 &&
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pci_alloc_irq_vectors(pdev, n_msi, n_msi, PCI_IRQ_MSI) < n_msi) {
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wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
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n_msi = 1;
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}
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if (n_msi == 1 && pci_enable_msi(pdev)) {
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wil_err(wil, "pci_enable_msi failed, use INTx\n");
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n_msi = 0;
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}
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wil->n_msi = n_msi;
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if (wil->n_msi == 0 && msi_only) {
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wil_err(wil, "Interrupt pin not routed, unable to use INTx\n");
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rc = -ENODEV;
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goto stop_master;
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}
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rc = wil6210_init_irq(wil, pdev->irq);
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if (rc)
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goto release_vectors;
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/* need reset here to obtain MAC */
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mutex_lock(&wil->mutex);
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rc = wil_reset(wil, false);
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mutex_unlock(&wil->mutex);
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if (rc)
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goto release_irq;
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return 0;
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release_irq:
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wil6210_fini_irq(wil, pdev->irq);
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release_vectors:
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/* safe to call if no allocation */
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pci_free_irq_vectors(pdev);
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stop_master:
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pci_clear_master(pdev);
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return rc;
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}
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static int wil_if_pcie_disable(struct wil6210_priv *wil)
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{
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struct pci_dev *pdev = wil->pdev;
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wil_dbg_misc(wil, "if_pcie_disable\n");
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pci_clear_master(pdev);
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/* disable and release IRQ */
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wil6210_fini_irq(wil, pdev->irq);
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/* safe to call if no MSI */
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pci_disable_msi(pdev);
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/* TODO: disable HW */
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return 0;
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}
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static int wil_platform_rop_ramdump(void *wil_handle, void *buf, uint32_t size)
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{
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struct wil6210_priv *wil = wil_handle;
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if (!wil)
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return -EINVAL;
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return wil_fw_copy_crash_dump(wil, buf, size);
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}
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static int wil_platform_rop_fw_recovery(void *wil_handle)
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{
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struct wil6210_priv *wil = wil_handle;
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if (!wil)
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return -EINVAL;
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wil_fw_error_recovery(wil);
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return 0;
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}
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static void wil_platform_ops_uninit(struct wil6210_priv *wil)
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{
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if (wil->platform_ops.uninit)
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wil->platform_ops.uninit(wil->platform_handle);
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memset(&wil->platform_ops, 0, sizeof(wil->platform_ops));
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}
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static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct wil6210_priv *wil;
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struct device *dev = &pdev->dev;
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int rc;
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const struct wil_platform_rops rops = {
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.ramdump = wil_platform_rop_ramdump,
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.fw_recovery = wil_platform_rop_fw_recovery,
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};
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u32 bar_size = pci_resource_len(pdev, 0);
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int dma_addr_size[] = {64, 48, 40, 32}; /* keep descending order */
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int i, start_idx;
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/* check HW */
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dev_info(&pdev->dev, WIL_NAME
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" device found [%04x:%04x] (rev %x) bar size 0x%x\n",
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(int)pdev->vendor, (int)pdev->device, (int)pdev->revision,
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bar_size);
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if ((bar_size < WIL6210_MIN_MEM_SIZE) ||
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(bar_size > WIL6210_MAX_MEM_SIZE)) {
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dev_err(&pdev->dev, "Unexpected BAR0 size 0x%x\n",
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bar_size);
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return -ENODEV;
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}
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wil = wil_if_alloc(dev);
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if (IS_ERR(wil)) {
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rc = (int)PTR_ERR(wil);
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dev_err(dev, "wil_if_alloc failed: %d\n", rc);
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return rc;
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}
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wil->pdev = pdev;
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pci_set_drvdata(pdev, wil);
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wil->bar_size = bar_size;
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/* rollback to if_free */
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wil->platform_handle =
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wil_platform_init(&pdev->dev, &wil->platform_ops, &rops, wil);
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if (!wil->platform_handle) {
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rc = -ENODEV;
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wil_err(wil, "wil_platform_init failed\n");
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goto if_free;
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}
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/* rollback to err_plat */
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rc = pci_enable_device(pdev);
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if (rc && pdev->msi_enabled == 0) {
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wil_err(wil,
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"pci_enable_device failed, retry with MSI only\n");
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/* Work around for platforms that can't allocate IRQ:
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* retry with MSI only
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*/
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pdev->msi_enabled = 1;
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rc = pci_enable_device(pdev);
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}
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if (rc) {
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wil_err(wil,
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"pci_enable_device failed, even with MSI only\n");
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goto err_plat;
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}
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/* rollback to err_disable_pdev */
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pci_set_power_state(pdev, PCI_D0);
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rc = pci_request_region(pdev, 0, WIL_NAME);
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if (rc) {
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wil_err(wil, "pci_request_region failed\n");
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goto err_disable_pdev;
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}
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/* rollback to err_release_reg */
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wil->csr = pci_ioremap_bar(pdev, 0);
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if (!wil->csr) {
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wil_err(wil, "pci_ioremap_bar failed\n");
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rc = -ENODEV;
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goto err_release_reg;
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}
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/* rollback to err_iounmap */
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wil_info(wil, "CSR at %pR -> 0x%p\n", &pdev->resource[0], wil->csr);
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rc = wil_set_capabilities(wil);
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if (rc) {
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wil_err(wil, "wil_set_capabilities failed, rc %d\n", rc);
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goto err_iounmap;
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}
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/* device supports >32bit addresses.
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* for legacy DMA start from 48 bit.
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*/
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start_idx = wil->use_enhanced_dma_hw ? 0 : 1;
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for (i = start_idx; i < ARRAY_SIZE(dma_addr_size); i++) {
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rc = dma_set_mask_and_coherent(dev,
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DMA_BIT_MASK(dma_addr_size[i]));
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if (rc) {
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dev_err(dev, "dma_set_mask_and_coherent(%d) failed: %d\n",
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dma_addr_size[i], rc);
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continue;
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}
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dev_info(dev, "using dma mask %d", dma_addr_size[i]);
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wil->dma_addr_size = dma_addr_size[i];
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break;
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}
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if (wil->dma_addr_size == 0)
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goto err_iounmap;
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wil6210_clear_irq(wil);
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/* FW should raise IRQ when ready */
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rc = wil_if_pcie_enable(wil);
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if (rc) {
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wil_err(wil, "Enable device failed\n");
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goto err_iounmap;
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}
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/* rollback to bus_disable */
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wil_clear_fw_log_addr(wil);
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rc = wil_if_add(wil);
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if (rc) {
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wil_err(wil, "wil_if_add failed: %d\n", rc);
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goto bus_disable;
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}
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/* in case of WMI-only FW, perform full reset and FW loading */
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if (test_bit(WMI_FW_CAPABILITY_WMI_ONLY, wil->fw_capabilities)) {
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wil_dbg_misc(wil, "Loading WMI only FW\n");
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mutex_lock(&wil->mutex);
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rc = wil_reset(wil, true);
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mutex_unlock(&wil->mutex);
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if (rc) {
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wil_err(wil, "failed to load WMI only FW\n");
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/* ignore the error to allow debugging */
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}
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}
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if (IS_ENABLED(CONFIG_PM))
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wil->pm_notify.notifier_call = wil6210_pm_notify;
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rc = register_pm_notifier(&wil->pm_notify);
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if (rc)
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/* Do not fail the driver initialization, as suspend can
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* be prevented in a later phase if needed
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*/
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wil_err(wil, "register_pm_notifier failed: %d\n", rc);
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wil6210_debugfs_init(wil);
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wil_pm_runtime_allow(wil);
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return 0;
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bus_disable:
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wil_if_pcie_disable(wil);
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err_iounmap:
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pci_iounmap(pdev, wil->csr);
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err_release_reg:
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pci_release_region(pdev, 0);
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err_disable_pdev:
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pci_disable_device(pdev);
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err_plat:
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wil_platform_ops_uninit(wil);
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if_free:
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wil_if_free(wil);
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return rc;
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}
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static void wil_pcie_remove(struct pci_dev *pdev)
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{
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struct wil6210_priv *wil = pci_get_drvdata(pdev);
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void __iomem *csr = wil->csr;
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wil_dbg_misc(wil, "pcie_remove\n");
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unregister_pm_notifier(&wil->pm_notify);
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wil_pm_runtime_forbid(wil);
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wil6210_debugfs_remove(wil);
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rtnl_lock();
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wiphy_lock(wil->wiphy);
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wil_p2p_wdev_free(wil);
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wil_remove_all_additional_vifs(wil);
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wiphy_unlock(wil->wiphy);
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rtnl_unlock();
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wil_if_remove(wil);
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wil_if_pcie_disable(wil);
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pci_iounmap(pdev, csr);
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pci_release_region(pdev, 0);
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pci_disable_device(pdev);
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wil_platform_ops_uninit(wil);
|
|
wil_if_free(wil);
|
|
}
|
|
|
|
static const struct pci_device_id wil6210_pcie_ids[] = {
|
|
{ PCI_DEVICE(0x1ae9, 0x0310) },
|
|
{ PCI_DEVICE(0x1ae9, 0x0302) }, /* same as above, firmware broken */
|
|
{ PCI_DEVICE(0x17cb, 0x1201) }, /* Talyn */
|
|
{ /* end: all zeroes */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(pci, wil6210_pcie_ids);
|
|
|
|
static int wil6210_suspend(struct device *dev, bool is_runtime)
|
|
{
|
|
int rc = 0;
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct wil6210_priv *wil = pci_get_drvdata(pdev);
|
|
bool keep_radio_on, active_ifaces;
|
|
|
|
wil_dbg_pm(wil, "suspend: %s\n", is_runtime ? "runtime" : "system");
|
|
|
|
mutex_lock(&wil->vif_mutex);
|
|
active_ifaces = wil_has_active_ifaces(wil, true, false);
|
|
mutex_unlock(&wil->vif_mutex);
|
|
keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
|
|
|
|
rc = wil_can_suspend(wil, is_runtime);
|
|
if (rc)
|
|
goto out;
|
|
|
|
rc = wil_suspend(wil, is_runtime, keep_radio_on);
|
|
if (!rc) {
|
|
/* In case radio stays on, platform device will control
|
|
* PCIe master
|
|
*/
|
|
if (!keep_radio_on) {
|
|
/* disable bus mastering */
|
|
pci_clear_master(pdev);
|
|
wil->suspend_stats.r_off.successful_suspends++;
|
|
} else {
|
|
wil->suspend_stats.r_on.successful_suspends++;
|
|
}
|
|
}
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
static int wil6210_resume(struct device *dev, bool is_runtime)
|
|
{
|
|
int rc = 0;
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct wil6210_priv *wil = pci_get_drvdata(pdev);
|
|
bool keep_radio_on, active_ifaces;
|
|
|
|
wil_dbg_pm(wil, "resume: %s\n", is_runtime ? "runtime" : "system");
|
|
|
|
mutex_lock(&wil->vif_mutex);
|
|
active_ifaces = wil_has_active_ifaces(wil, true, false);
|
|
mutex_unlock(&wil->vif_mutex);
|
|
keep_radio_on = active_ifaces && wil->keep_radio_on_during_sleep;
|
|
|
|
/* In case radio stays on, platform device will control
|
|
* PCIe master
|
|
*/
|
|
if (!keep_radio_on)
|
|
/* allow master */
|
|
pci_set_master(pdev);
|
|
rc = wil_resume(wil, is_runtime, keep_radio_on);
|
|
if (rc) {
|
|
wil_err(wil, "device failed to resume (%d)\n", rc);
|
|
if (!keep_radio_on) {
|
|
pci_clear_master(pdev);
|
|
wil->suspend_stats.r_off.failed_resumes++;
|
|
} else {
|
|
wil->suspend_stats.r_on.failed_resumes++;
|
|
}
|
|
} else {
|
|
if (keep_radio_on)
|
|
wil->suspend_stats.r_on.successful_resumes++;
|
|
else
|
|
wil->suspend_stats.r_off.successful_resumes++;
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int wil6210_pm_notify(struct notifier_block *notify_block,
|
|
unsigned long mode, void *unused)
|
|
{
|
|
struct wil6210_priv *wil = container_of(
|
|
notify_block, struct wil6210_priv, pm_notify);
|
|
int rc = 0;
|
|
enum wil_platform_event evt;
|
|
|
|
wil_dbg_pm(wil, "pm_notify: mode (%ld)\n", mode);
|
|
|
|
switch (mode) {
|
|
case PM_HIBERNATION_PREPARE:
|
|
case PM_SUSPEND_PREPARE:
|
|
case PM_RESTORE_PREPARE:
|
|
rc = wil_can_suspend(wil, false);
|
|
if (rc)
|
|
break;
|
|
evt = WIL_PLATFORM_EVT_PRE_SUSPEND;
|
|
if (wil->platform_ops.notify)
|
|
rc = wil->platform_ops.notify(wil->platform_handle,
|
|
evt);
|
|
break;
|
|
case PM_POST_SUSPEND:
|
|
case PM_POST_HIBERNATION:
|
|
case PM_POST_RESTORE:
|
|
evt = WIL_PLATFORM_EVT_POST_SUSPEND;
|
|
if (wil->platform_ops.notify)
|
|
rc = wil->platform_ops.notify(wil->platform_handle,
|
|
evt);
|
|
break;
|
|
default:
|
|
wil_dbg_pm(wil, "unhandled notify mode %ld\n", mode);
|
|
break;
|
|
}
|
|
|
|
wil_dbg_pm(wil, "notification mode %ld: rc (%d)\n", mode, rc);
|
|
return rc;
|
|
}
|
|
|
|
static int __maybe_unused wil6210_pm_suspend(struct device *dev)
|
|
{
|
|
return wil6210_suspend(dev, false);
|
|
}
|
|
|
|
static int __maybe_unused wil6210_pm_resume(struct device *dev)
|
|
{
|
|
return wil6210_resume(dev, false);
|
|
}
|
|
|
|
static int __maybe_unused wil6210_pm_runtime_idle(struct device *dev)
|
|
{
|
|
struct wil6210_priv *wil = dev_get_drvdata(dev);
|
|
|
|
wil_dbg_pm(wil, "Runtime idle\n");
|
|
|
|
return wil_can_suspend(wil, true);
|
|
}
|
|
|
|
static int __maybe_unused wil6210_pm_runtime_resume(struct device *dev)
|
|
{
|
|
return wil6210_resume(dev, true);
|
|
}
|
|
|
|
static int __maybe_unused wil6210_pm_runtime_suspend(struct device *dev)
|
|
{
|
|
struct wil6210_priv *wil = dev_get_drvdata(dev);
|
|
|
|
if (test_bit(wil_status_suspended, wil->status)) {
|
|
wil_dbg_pm(wil, "trying to suspend while suspended\n");
|
|
return 1;
|
|
}
|
|
|
|
return wil6210_suspend(dev, true);
|
|
}
|
|
|
|
static const struct dev_pm_ops wil6210_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(wil6210_pm_suspend, wil6210_pm_resume)
|
|
SET_RUNTIME_PM_OPS(wil6210_pm_runtime_suspend,
|
|
wil6210_pm_runtime_resume,
|
|
wil6210_pm_runtime_idle)
|
|
};
|
|
|
|
static struct pci_driver wil6210_driver = {
|
|
.probe = wil_pcie_probe,
|
|
.remove = wil_pcie_remove,
|
|
.id_table = wil6210_pcie_ids,
|
|
.name = WIL_NAME,
|
|
.driver = {
|
|
.pm = &wil6210_pm_ops,
|
|
},
|
|
};
|
|
|
|
static int __init wil6210_driver_init(void)
|
|
{
|
|
int rc;
|
|
|
|
rc = wil_platform_modinit();
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = pci_register_driver(&wil6210_driver);
|
|
if (rc)
|
|
wil_platform_modexit();
|
|
return rc;
|
|
}
|
|
module_init(wil6210_driver_init);
|
|
|
|
static void __exit wil6210_driver_exit(void)
|
|
{
|
|
pci_unregister_driver(&wil6210_driver);
|
|
wil_platform_modexit();
|
|
}
|
|
module_exit(wil6210_driver_exit);
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
MODULE_AUTHOR("Qualcomm Atheros <wil6210@qca.qualcomm.com>");
|
|
MODULE_DESCRIPTION("Driver for 60g WiFi WIL6210 card");
|