618 lines
16 KiB
C
618 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#define PRISM2_PLX
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/* Host AP driver's support for PC Cards on PCI adapters using PLX9052 is
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* based on:
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* - Host AP driver patch from james@madingley.org
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* - linux-wlan-ng driver, Copyright (C) AbsoluteValue Systems, Inc.
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*/
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#include <linux/module.h>
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#include <linux/if.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <linux/wireless.h>
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#include <net/iw_handler.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include "hostap_wlan.h"
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static char *dev_info = "hostap_plx";
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MODULE_AUTHOR("Jouni Malinen");
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MODULE_DESCRIPTION("Support for Intersil Prism2-based 802.11 wireless LAN "
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"cards (PLX).");
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MODULE_LICENSE("GPL");
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static int ignore_cis;
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module_param(ignore_cis, int, 0444);
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MODULE_PARM_DESC(ignore_cis, "Do not verify manfid information in CIS");
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/* struct local_info::hw_priv */
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struct hostap_plx_priv {
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void __iomem *attr_mem;
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unsigned int cor_offset;
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};
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#define PLX_MIN_ATTR_LEN 512 /* at least 2 x 256 is needed for CIS */
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#define COR_SRESET 0x80
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#define COR_LEVLREQ 0x40
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#define COR_ENABLE_FUNC 0x01
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/* PCI Configuration Registers */
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#define PLX_PCIIPR 0x3d /* PCI Interrupt Pin */
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/* Local Configuration Registers */
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#define PLX_INTCSR 0x4c /* Interrupt Control/Status Register */
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#define PLX_INTCSR_PCI_INTEN BIT(6) /* PCI Interrupt Enable */
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#define PLX_CNTRL 0x50
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#define PLX_CNTRL_SERIAL_EEPROM_PRESENT BIT(28)
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#define PLXDEV(vendor,dev,str) { vendor, dev, PCI_ANY_ID, PCI_ANY_ID }
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static const struct pci_device_id prism2_plx_id_table[] = {
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PLXDEV(0x10b7, 0x7770, "3Com AirConnect PCI 777A"),
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PLXDEV(0x111a, 0x1023, "Siemens SpeedStream SS1023"),
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PLXDEV(0x126c, 0x8030, "Nortel emobility"),
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PLXDEV(0x1562, 0x0001, "Symbol LA-4123"),
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PLXDEV(0x1385, 0x4100, "Netgear MA301"),
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PLXDEV(0x15e8, 0x0130, "National Datacomm NCP130 (PLX9052)"),
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PLXDEV(0x15e8, 0x0131, "National Datacomm NCP130 (TMD7160)"),
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PLXDEV(0x1638, 0x1100, "Eumitcom WL11000"),
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PLXDEV(0x16ab, 0x1100, "Global Sun Tech GL24110P"),
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PLXDEV(0x16ab, 0x1101, "Global Sun Tech GL24110P (?)"),
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PLXDEV(0x16ab, 0x1102, "Linksys WPC11 with WDT11"),
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PLXDEV(0x16ab, 0x1103, "Longshine 8031"),
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PLXDEV(0x16ec, 0x3685, "US Robotics USR2415"),
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PLXDEV(0xec80, 0xec00, "Belkin F5D6000"),
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{ 0 }
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};
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/* Array of known Prism2/2.5 PC Card manufactured ids. If your card's manfid
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* is not listed here, you will need to add it here to get the driver
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* initialized. */
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static struct prism2_plx_manfid {
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u16 manfid1, manfid2;
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} prism2_plx_known_manfids[] = {
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{ 0x000b, 0x7110 } /* D-Link DWL-650 Rev. P1 */,
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{ 0x000b, 0x7300 } /* Philips 802.11b WLAN PCMCIA */,
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{ 0x0101, 0x0777 } /* 3Com AirConnect PCI 777A */,
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{ 0x0126, 0x8000 } /* Proxim RangeLAN */,
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{ 0x0138, 0x0002 } /* Compaq WL100 */,
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{ 0x0156, 0x0002 } /* Intersil Prism II Ref. Design (and others) */,
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{ 0x026f, 0x030b } /* Buffalo WLI-CF-S11G */,
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{ 0x0274, 0x1612 } /* Linksys WPC11 Ver 2.5 */,
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{ 0x0274, 0x1613 } /* Linksys WPC11 Ver 3 */,
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{ 0x028a, 0x0002 } /* D-Link DRC-650 */,
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{ 0x0250, 0x0002 } /* Samsung SWL2000-N */,
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{ 0xc250, 0x0002 } /* EMTAC A2424i */,
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{ 0xd601, 0x0002 } /* Z-Com XI300 */,
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{ 0xd601, 0x0005 } /* Zcomax XI-325H 200mW */,
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{ 0, 0}
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};
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#ifdef PRISM2_IO_DEBUG
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static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v);
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outb(v, dev->base_addr + a);
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spin_unlock_irqrestore(&local->lock, flags);
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}
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static inline u8 hfa384x_inb_debug(struct net_device *dev, int a)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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u8 v;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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v = inb(dev->base_addr + a);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v);
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spin_unlock_irqrestore(&local->lock, flags);
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return v;
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}
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static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v);
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outw(v, dev->base_addr + a);
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spin_unlock_irqrestore(&local->lock, flags);
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}
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static inline u16 hfa384x_inw_debug(struct net_device *dev, int a)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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u16 v;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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v = inw(dev->base_addr + a);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v);
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spin_unlock_irqrestore(&local->lock, flags);
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return v;
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}
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static inline void hfa384x_outsw_debug(struct net_device *dev, int a,
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u8 *buf, int wc)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTSW, a, wc);
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outsw(dev->base_addr + a, buf, wc);
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spin_unlock_irqrestore(&local->lock, flags);
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}
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static inline void hfa384x_insw_debug(struct net_device *dev, int a,
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u8 *buf, int wc)
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{
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struct hostap_interface *iface;
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local_info_t *local;
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unsigned long flags;
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iface = netdev_priv(dev);
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local = iface->local;
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spin_lock_irqsave(&local->lock, flags);
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prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INSW, a, wc);
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insw(dev->base_addr + a, buf, wc);
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spin_unlock_irqrestore(&local->lock, flags);
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}
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#define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v))
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#define HFA384X_INB(a) hfa384x_inb_debug(dev, (a))
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#define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v))
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#define HFA384X_INW(a) hfa384x_inw_debug(dev, (a))
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#define HFA384X_OUTSW(a, buf, wc) hfa384x_outsw_debug(dev, (a), (buf), (wc))
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#define HFA384X_INSW(a, buf, wc) hfa384x_insw_debug(dev, (a), (buf), (wc))
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#else /* PRISM2_IO_DEBUG */
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#define HFA384X_OUTB(v,a) outb((v), dev->base_addr + (a))
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#define HFA384X_INB(a) inb(dev->base_addr + (a))
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#define HFA384X_OUTW(v,a) outw((v), dev->base_addr + (a))
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#define HFA384X_INW(a) inw(dev->base_addr + (a))
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#define HFA384X_INSW(a, buf, wc) insw(dev->base_addr + (a), buf, wc)
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#define HFA384X_OUTSW(a, buf, wc) outsw(dev->base_addr + (a), buf, wc)
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#endif /* PRISM2_IO_DEBUG */
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static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf,
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int len)
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{
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u16 d_off;
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u16 *pos;
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d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
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pos = (u16 *) buf;
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if (len / 2)
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HFA384X_INSW(d_off, buf, len / 2);
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pos += len / 2;
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if (len & 1)
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*((char *) pos) = HFA384X_INB(d_off);
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return 0;
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}
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static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len)
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{
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u16 d_off;
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u16 *pos;
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d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
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pos = (u16 *) buf;
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if (len / 2)
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HFA384X_OUTSW(d_off, buf, len / 2);
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pos += len / 2;
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if (len & 1)
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HFA384X_OUTB(*((char *) pos), d_off);
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return 0;
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}
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/* FIX: This might change at some point.. */
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#include "hostap_hw.c"
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static void prism2_plx_cor_sreset(local_info_t *local)
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{
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unsigned char corsave;
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struct hostap_plx_priv *hw_priv = local->hw_priv;
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printk(KERN_DEBUG "%s: Doing reset via direct COR access.\n",
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dev_info);
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/* Set sreset bit of COR and clear it after hold time */
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if (hw_priv->attr_mem == NULL) {
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/* TMD7160 - COR at card's first I/O addr */
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corsave = inb(hw_priv->cor_offset);
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outb(corsave | COR_SRESET, hw_priv->cor_offset);
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mdelay(2);
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outb(corsave & ~COR_SRESET, hw_priv->cor_offset);
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mdelay(2);
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} else {
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/* PLX9052 */
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corsave = readb(hw_priv->attr_mem + hw_priv->cor_offset);
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writeb(corsave | COR_SRESET,
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hw_priv->attr_mem + hw_priv->cor_offset);
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mdelay(2);
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writeb(corsave & ~COR_SRESET,
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hw_priv->attr_mem + hw_priv->cor_offset);
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mdelay(2);
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}
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}
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static void prism2_plx_genesis_reset(local_info_t *local, int hcr)
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{
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unsigned char corsave;
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struct hostap_plx_priv *hw_priv = local->hw_priv;
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if (hw_priv->attr_mem == NULL) {
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/* TMD7160 - COR at card's first I/O addr */
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corsave = inb(hw_priv->cor_offset);
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outb(corsave | COR_SRESET, hw_priv->cor_offset);
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mdelay(10);
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outb(hcr, hw_priv->cor_offset + 2);
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mdelay(10);
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outb(corsave & ~COR_SRESET, hw_priv->cor_offset);
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mdelay(10);
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} else {
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/* PLX9052 */
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corsave = readb(hw_priv->attr_mem + hw_priv->cor_offset);
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writeb(corsave | COR_SRESET,
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hw_priv->attr_mem + hw_priv->cor_offset);
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mdelay(10);
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writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2);
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mdelay(10);
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writeb(corsave & ~COR_SRESET,
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hw_priv->attr_mem + hw_priv->cor_offset);
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mdelay(10);
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}
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}
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static struct prism2_helper_functions prism2_plx_funcs =
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{
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.card_present = NULL,
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.cor_sreset = prism2_plx_cor_sreset,
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.genesis_reset = prism2_plx_genesis_reset,
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.hw_type = HOSTAP_HW_PLX,
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};
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static int prism2_plx_check_cis(void __iomem *attr_mem, int attr_len,
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unsigned int *cor_offset,
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unsigned int *cor_index)
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{
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#define CISTPL_CONFIG 0x1A
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#define CISTPL_MANFID 0x20
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#define CISTPL_END 0xFF
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#define CIS_MAX_LEN 256
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u8 *cis;
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int i, pos;
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unsigned int rmsz, rasz, manfid1, manfid2;
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struct prism2_plx_manfid *manfid;
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cis = kmalloc(CIS_MAX_LEN, GFP_KERNEL);
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if (cis == NULL)
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return -ENOMEM;
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/* read CIS; it is in even offsets in the beginning of attr_mem */
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for (i = 0; i < CIS_MAX_LEN; i++)
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cis[i] = readb(attr_mem + 2 * i);
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printk(KERN_DEBUG "%s: CIS: %6ph ...\n", dev_info, cis);
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/* set reasonable defaults for Prism2 cards just in case CIS parsing
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* fails */
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*cor_offset = 0x3e0;
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*cor_index = 0x01;
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manfid1 = manfid2 = 0;
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pos = 0;
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while (pos < CIS_MAX_LEN - 1 && cis[pos] != CISTPL_END) {
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if (pos + 2 + cis[pos + 1] > CIS_MAX_LEN)
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goto cis_error;
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switch (cis[pos]) {
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case CISTPL_CONFIG:
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if (cis[pos + 1] < 2)
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goto cis_error;
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rmsz = (cis[pos + 2] & 0x3c) >> 2;
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rasz = cis[pos + 2] & 0x03;
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if (4 + rasz + rmsz > cis[pos + 1])
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goto cis_error;
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*cor_index = cis[pos + 3] & 0x3F;
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*cor_offset = 0;
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for (i = 0; i <= rasz; i++)
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*cor_offset += cis[pos + 4 + i] << (8 * i);
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printk(KERN_DEBUG "%s: cor_index=0x%x "
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"cor_offset=0x%x\n", dev_info,
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*cor_index, *cor_offset);
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if (*cor_offset > attr_len) {
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printk(KERN_ERR "%s: COR offset not within "
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"attr_mem\n", dev_info);
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kfree(cis);
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return -1;
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}
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break;
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case CISTPL_MANFID:
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if (cis[pos + 1] < 4)
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goto cis_error;
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manfid1 = cis[pos + 2] + (cis[pos + 3] << 8);
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manfid2 = cis[pos + 4] + (cis[pos + 5] << 8);
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printk(KERN_DEBUG "%s: manfid=0x%04x, 0x%04x\n",
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dev_info, manfid1, manfid2);
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break;
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}
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pos += cis[pos + 1] + 2;
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}
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if (pos >= CIS_MAX_LEN || cis[pos] != CISTPL_END)
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goto cis_error;
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for (manfid = prism2_plx_known_manfids; manfid->manfid1 != 0; manfid++)
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if (manfid1 == manfid->manfid1 && manfid2 == manfid->manfid2) {
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kfree(cis);
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return 0;
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}
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printk(KERN_INFO "%s: unknown manfid 0x%04x, 0x%04x - assuming this is"
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" not supported card\n", dev_info, manfid1, manfid2);
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goto fail;
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cis_error:
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printk(KERN_WARNING "%s: invalid CIS data\n", dev_info);
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fail:
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kfree(cis);
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if (ignore_cis) {
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printk(KERN_INFO "%s: ignore_cis parameter set - ignoring "
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"errors during CIS verification\n", dev_info);
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return 0;
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}
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return -1;
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}
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static int prism2_plx_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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unsigned int pccard_ioaddr, plx_ioaddr;
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unsigned long pccard_attr_mem;
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unsigned int pccard_attr_len;
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void __iomem *attr_mem = NULL;
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unsigned int cor_offset = 0, cor_index = 0;
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u32 reg;
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local_info_t *local = NULL;
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struct net_device *dev = NULL;
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struct hostap_interface *iface;
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static int cards_found /* = 0 */;
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int irq_registered = 0;
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int tmd7160;
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struct hostap_plx_priv *hw_priv;
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hw_priv = kzalloc(sizeof(*hw_priv), GFP_KERNEL);
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if (hw_priv == NULL)
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return -ENOMEM;
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if (pci_enable_device(pdev))
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goto err_out_free;
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/* National Datacomm NCP130 based on TMD7160, not PLX9052. */
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tmd7160 = (pdev->vendor == 0x15e8) && (pdev->device == 0x0131);
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plx_ioaddr = pci_resource_start(pdev, 1);
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pccard_ioaddr = pci_resource_start(pdev, tmd7160 ? 2 : 3);
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if (tmd7160) {
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/* TMD7160 */
|
|
attr_mem = NULL; /* no access to PC Card attribute memory */
|
|
|
|
printk(KERN_INFO "TMD7160 PCI/PCMCIA adapter: io=0x%x, "
|
|
"irq=%d, pccard_io=0x%x\n",
|
|
plx_ioaddr, pdev->irq, pccard_ioaddr);
|
|
|
|
cor_offset = plx_ioaddr;
|
|
cor_index = 0x04;
|
|
|
|
outb(cor_index | COR_LEVLREQ | COR_ENABLE_FUNC, plx_ioaddr);
|
|
mdelay(1);
|
|
reg = inb(plx_ioaddr);
|
|
if (reg != (cor_index | COR_LEVLREQ | COR_ENABLE_FUNC)) {
|
|
printk(KERN_ERR "%s: Error setting COR (expected="
|
|
"0x%02x, was=0x%02x)\n", dev_info,
|
|
cor_index | COR_LEVLREQ | COR_ENABLE_FUNC, reg);
|
|
goto fail;
|
|
}
|
|
} else {
|
|
/* PLX9052 */
|
|
pccard_attr_mem = pci_resource_start(pdev, 2);
|
|
pccard_attr_len = pci_resource_len(pdev, 2);
|
|
if (pccard_attr_len < PLX_MIN_ATTR_LEN)
|
|
goto fail;
|
|
|
|
|
|
attr_mem = ioremap(pccard_attr_mem, pccard_attr_len);
|
|
if (attr_mem == NULL) {
|
|
printk(KERN_ERR "%s: cannot remap attr_mem\n",
|
|
dev_info);
|
|
goto fail;
|
|
}
|
|
|
|
printk(KERN_INFO "PLX9052 PCI/PCMCIA adapter: "
|
|
"mem=0x%lx, plx_io=0x%x, irq=%d, pccard_io=0x%x\n",
|
|
pccard_attr_mem, plx_ioaddr, pdev->irq, pccard_ioaddr);
|
|
|
|
if (prism2_plx_check_cis(attr_mem, pccard_attr_len,
|
|
&cor_offset, &cor_index)) {
|
|
printk(KERN_INFO "Unknown PC Card CIS - not a "
|
|
"Prism2/2.5 card?\n");
|
|
goto fail;
|
|
}
|
|
|
|
printk(KERN_DEBUG "Prism2/2.5 PC Card detected in PLX9052 "
|
|
"adapter\n");
|
|
|
|
/* Write COR to enable PC Card */
|
|
writeb(cor_index | COR_LEVLREQ | COR_ENABLE_FUNC,
|
|
attr_mem + cor_offset);
|
|
|
|
/* Enable PCI interrupts if they are not already enabled */
|
|
reg = inl(plx_ioaddr + PLX_INTCSR);
|
|
printk(KERN_DEBUG "PLX_INTCSR=0x%x\n", reg);
|
|
if (!(reg & PLX_INTCSR_PCI_INTEN)) {
|
|
outl(reg | PLX_INTCSR_PCI_INTEN,
|
|
plx_ioaddr + PLX_INTCSR);
|
|
if (!(inl(plx_ioaddr + PLX_INTCSR) &
|
|
PLX_INTCSR_PCI_INTEN)) {
|
|
printk(KERN_WARNING "%s: Could not enable "
|
|
"Local Interrupts\n", dev_info);
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
reg = inl(plx_ioaddr + PLX_CNTRL);
|
|
printk(KERN_DEBUG "PLX_CNTRL=0x%x (Serial EEPROM "
|
|
"present=%d)\n",
|
|
reg, (reg & PLX_CNTRL_SERIAL_EEPROM_PRESENT) != 0);
|
|
/* should set PLX_PCIIPR to 0x01 (INTA#) if Serial EEPROM is
|
|
* not present; but are there really such cards in use(?) */
|
|
}
|
|
|
|
dev = prism2_init_local_data(&prism2_plx_funcs, cards_found,
|
|
&pdev->dev);
|
|
if (dev == NULL)
|
|
goto fail;
|
|
iface = netdev_priv(dev);
|
|
local = iface->local;
|
|
local->hw_priv = hw_priv;
|
|
cards_found++;
|
|
|
|
dev->irq = pdev->irq;
|
|
dev->base_addr = pccard_ioaddr;
|
|
hw_priv->attr_mem = attr_mem;
|
|
hw_priv->cor_offset = cor_offset;
|
|
|
|
pci_set_drvdata(pdev, dev);
|
|
|
|
if (request_irq(dev->irq, prism2_interrupt, IRQF_SHARED, dev->name,
|
|
dev)) {
|
|
printk(KERN_WARNING "%s: request_irq failed\n", dev->name);
|
|
goto fail;
|
|
} else
|
|
irq_registered = 1;
|
|
|
|
if (prism2_hw_config(dev, 1)) {
|
|
printk(KERN_DEBUG "%s: hardware initialization failed\n",
|
|
dev_info);
|
|
goto fail;
|
|
}
|
|
|
|
return hostap_hw_ready(dev);
|
|
|
|
fail:
|
|
if (irq_registered && dev)
|
|
free_irq(dev->irq, dev);
|
|
|
|
if (attr_mem)
|
|
iounmap(attr_mem);
|
|
|
|
pci_disable_device(pdev);
|
|
prism2_free_local_data(dev);
|
|
|
|
err_out_free:
|
|
kfree(hw_priv);
|
|
|
|
return -ENODEV;
|
|
}
|
|
|
|
|
|
static void prism2_plx_remove(struct pci_dev *pdev)
|
|
{
|
|
struct net_device *dev;
|
|
struct hostap_interface *iface;
|
|
struct hostap_plx_priv *hw_priv;
|
|
|
|
dev = pci_get_drvdata(pdev);
|
|
iface = netdev_priv(dev);
|
|
hw_priv = iface->local->hw_priv;
|
|
|
|
/* Reset the hardware, and ensure interrupts are disabled. */
|
|
prism2_plx_cor_sreset(iface->local);
|
|
hfa384x_disable_interrupts(dev);
|
|
|
|
if (hw_priv->attr_mem)
|
|
iounmap(hw_priv->attr_mem);
|
|
if (dev->irq)
|
|
free_irq(dev->irq, dev);
|
|
|
|
prism2_free_local_data(dev);
|
|
kfree(hw_priv);
|
|
pci_disable_device(pdev);
|
|
}
|
|
|
|
|
|
MODULE_DEVICE_TABLE(pci, prism2_plx_id_table);
|
|
|
|
static struct pci_driver prism2_plx_driver = {
|
|
.name = "hostap_plx",
|
|
.id_table = prism2_plx_id_table,
|
|
.probe = prism2_plx_probe,
|
|
.remove = prism2_plx_remove,
|
|
};
|
|
|
|
module_pci_driver(prism2_plx_driver);
|