844 lines
22 KiB
C
844 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Purpose: PCI Express Port Bus Driver
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*
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* Copyright (C) 2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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#include <linux/dmi.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/aer.h>
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#include "../pci.h"
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#include "portdrv.h"
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/*
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* The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
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* be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
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* supports a maximum of 32 vectors per function.
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*/
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#define PCIE_PORT_MAX_MSI_ENTRIES 32
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#define get_descriptor_id(type, service) (((type - 4) << 8) | service)
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struct portdrv_service_data {
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struct pcie_port_service_driver *drv;
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struct device *dev;
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u32 service;
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};
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/**
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* release_pcie_device - free PCI Express port service device structure
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* @dev: Port service device to release
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*
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* Invoked automatically when device is being removed in response to
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* device_unregister(dev). Release all resources being claimed.
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*/
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static void release_pcie_device(struct device *dev)
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{
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kfree(to_pcie_device(dev));
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}
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/*
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* Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if
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* services are enabled in "mask". Return the number of MSI/MSI-X vectors
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* required to accommodate the largest Message Number.
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*/
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static int pcie_message_numbers(struct pci_dev *dev, int mask,
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u32 *pme, u32 *aer, u32 *dpc)
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{
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u32 nvec = 0, pos;
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u16 reg16;
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/*
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* The Interrupt Message Number indicates which vector is used, i.e.,
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* the MSI-X table entry or the MSI offset between the base Message
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* Data and the generated interrupt message. See PCIe r3.1, sec
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* 7.8.2, 7.10.10, 7.31.2.
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*/
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if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP |
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PCIE_PORT_SERVICE_BWNOTIF)) {
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pcie_capability_read_word(dev, PCI_EXP_FLAGS, ®16);
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*pme = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
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nvec = *pme + 1;
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}
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#ifdef CONFIG_PCIEAER
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if (mask & PCIE_PORT_SERVICE_AER) {
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u32 reg32;
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pos = dev->aer_cap;
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if (pos) {
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pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS,
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®32);
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*aer = (reg32 & PCI_ERR_ROOT_AER_IRQ) >> 27;
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nvec = max(nvec, *aer + 1);
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}
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}
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#endif
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if (mask & PCIE_PORT_SERVICE_DPC) {
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pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC);
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if (pos) {
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pci_read_config_word(dev, pos + PCI_EXP_DPC_CAP,
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®16);
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*dpc = reg16 & PCI_EXP_DPC_IRQ;
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nvec = max(nvec, *dpc + 1);
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}
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}
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return nvec;
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}
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/**
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* pcie_port_enable_irq_vec - try to set up MSI-X or MSI as interrupt mode
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* for given port
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* @dev: PCI Express port to handle
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* @irqs: Array of interrupt vectors to populate
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* @mask: Bitmask of port capabilities returned by get_port_device_capability()
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*
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* Return value: 0 on success, error code on failure
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*/
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static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
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{
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int nr_entries, nvec, pcie_irq;
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u32 pme = 0, aer = 0, dpc = 0;
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/* Allocate the maximum possible number of MSI/MSI-X vectors */
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nr_entries = pci_alloc_irq_vectors(dev, 1, PCIE_PORT_MAX_MSI_ENTRIES,
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PCI_IRQ_MSIX | PCI_IRQ_MSI);
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if (nr_entries < 0)
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return nr_entries;
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/* See how many and which Interrupt Message Numbers we actually use */
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nvec = pcie_message_numbers(dev, mask, &pme, &aer, &dpc);
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if (nvec > nr_entries) {
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pci_free_irq_vectors(dev);
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return -EIO;
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}
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/*
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* If we allocated more than we need, free them and reallocate fewer.
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*
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* Reallocating may change the specific vectors we get, so
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* pci_irq_vector() must be done *after* the reallocation.
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*
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* If we're using MSI, hardware is *allowed* to change the Interrupt
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* Message Numbers when we free and reallocate the vectors, but we
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* assume it won't because we allocate enough vectors for the
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* biggest Message Number we found.
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*/
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if (nvec != nr_entries) {
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pci_free_irq_vectors(dev);
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nr_entries = pci_alloc_irq_vectors(dev, nvec, nvec,
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PCI_IRQ_MSIX | PCI_IRQ_MSI);
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if (nr_entries < 0)
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return nr_entries;
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}
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/* PME, hotplug and bandwidth notification share an MSI/MSI-X vector */
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if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP |
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PCIE_PORT_SERVICE_BWNOTIF)) {
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pcie_irq = pci_irq_vector(dev, pme);
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irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pcie_irq;
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irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pcie_irq;
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irqs[PCIE_PORT_SERVICE_BWNOTIF_SHIFT] = pcie_irq;
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}
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if (mask & PCIE_PORT_SERVICE_AER)
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irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, aer);
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if (mask & PCIE_PORT_SERVICE_DPC)
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irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc);
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return 0;
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}
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/**
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* pcie_init_service_irqs - initialize irqs for PCI Express port services
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* @dev: PCI Express port to handle
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* @irqs: Array of irqs to populate
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* @mask: Bitmask of port capabilities returned by get_port_device_capability()
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*
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* Return value: Interrupt mode associated with the port
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*/
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static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
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{
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int ret, i;
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for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
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irqs[i] = -1;
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/*
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* If we support PME but can't use MSI/MSI-X for it, we have to
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* fall back to INTx or other interrupts, e.g., a system shared
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* interrupt.
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*/
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if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi())
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goto legacy_irq;
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/* Try to use MSI-X or MSI if supported */
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if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0)
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return 0;
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legacy_irq:
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/* fall back to legacy IRQ */
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ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_LEGACY);
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if (ret < 0)
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return -ENODEV;
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for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
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irqs[i] = pci_irq_vector(dev, 0);
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return 0;
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}
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/**
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* get_port_device_capability - discover capabilities of a PCI Express port
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* @dev: PCI Express port to examine
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*
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* The capabilities are read from the port's PCI Express configuration registers
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* as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
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* 7.9 - 7.11.
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*
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* Return value: Bitmask of discovered port capabilities
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*/
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static int get_port_device_capability(struct pci_dev *dev)
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{
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struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
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int services = 0;
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if (dev->is_hotplug_bridge &&
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(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) &&
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(pcie_ports_native || host->native_pcie_hotplug)) {
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services |= PCIE_PORT_SERVICE_HP;
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/*
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* Disable hot-plug interrupts in case they have been enabled
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* by the BIOS and the hot-plug service driver is not loaded.
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*/
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pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
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PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
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}
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#ifdef CONFIG_PCIEAER
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if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) &&
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dev->aer_cap && pci_aer_available() &&
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(pcie_ports_native || host->native_aer))
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services |= PCIE_PORT_SERVICE_AER;
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#endif
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/* Root Ports and Root Complex Event Collectors may generate PMEs */
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if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) &&
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(pcie_ports_native || host->native_pme)) {
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services |= PCIE_PORT_SERVICE_PME;
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/*
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* Disable PME interrupt on this port in case it's been enabled
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* by the BIOS (the PME service driver will enable it when
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* necessary).
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*/
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pcie_pme_interrupt_enable(dev, false);
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}
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/*
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* With dpc-native, allow Linux to use DPC even if it doesn't have
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* permission to use AER.
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*/
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if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
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pci_aer_available() &&
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(pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
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services |= PCIE_PORT_SERVICE_DPC;
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
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u32 linkcap;
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pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap);
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if (linkcap & PCI_EXP_LNKCAP_LBNC)
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services |= PCIE_PORT_SERVICE_BWNOTIF;
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}
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return services;
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}
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/**
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* pcie_device_init - allocate and initialize PCI Express port service device
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* @pdev: PCI Express port to associate the service device with
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* @service: Type of service to associate with the service device
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* @irq: Interrupt vector to associate with the service device
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*/
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static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
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{
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int retval;
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struct pcie_device *pcie;
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struct device *device;
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pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
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if (!pcie)
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return -ENOMEM;
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pcie->port = pdev;
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pcie->irq = irq;
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pcie->service = service;
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/* Initialize generic device interface */
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device = &pcie->device;
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device->bus = &pcie_port_bus_type;
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device->release = release_pcie_device; /* callback to free pcie dev */
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dev_set_name(device, "%s:pcie%03x",
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pci_name(pdev),
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get_descriptor_id(pci_pcie_type(pdev), service));
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device->parent = &pdev->dev;
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device_enable_async_suspend(device);
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retval = device_register(device);
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if (retval) {
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put_device(device);
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return retval;
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}
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pm_runtime_no_callbacks(device);
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return 0;
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}
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/**
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* pcie_port_device_register - register PCI Express port
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* @dev: PCI Express port to register
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*
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* Allocate the port extension structure and register services associated with
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* the port.
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*/
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static int pcie_port_device_register(struct pci_dev *dev)
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{
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int status, capabilities, i, nr_service;
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int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
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/* Enable PCI Express port device */
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status = pci_enable_device(dev);
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if (status)
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return status;
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/* Get and check PCI Express port services */
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capabilities = get_port_device_capability(dev);
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if (!capabilities)
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return 0;
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pci_set_master(dev);
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/*
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* Initialize service irqs. Don't use service devices that
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* require interrupts if there is no way to generate them.
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* However, some drivers may have a polling mode (e.g. pciehp_poll_mode)
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* that can be used in the absence of irqs. Allow them to determine
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* if that is to be used.
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*/
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status = pcie_init_service_irqs(dev, irqs, capabilities);
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if (status) {
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capabilities &= PCIE_PORT_SERVICE_HP;
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if (!capabilities)
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goto error_disable;
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}
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/* Allocate child services if any */
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status = -ENODEV;
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nr_service = 0;
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for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
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int service = 1 << i;
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if (!(capabilities & service))
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continue;
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if (!pcie_device_init(dev, service, irqs[i]))
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nr_service++;
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}
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if (!nr_service)
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goto error_cleanup_irqs;
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return 0;
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error_cleanup_irqs:
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pci_free_irq_vectors(dev);
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error_disable:
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pci_disable_device(dev);
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return status;
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}
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typedef int (*pcie_callback_t)(struct pcie_device *);
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static int pcie_port_device_iter(struct device *dev, void *data)
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{
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struct pcie_port_service_driver *service_driver;
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size_t offset = *(size_t *)data;
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pcie_callback_t cb;
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if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
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service_driver = to_service_driver(dev->driver);
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cb = *(pcie_callback_t *)((void *)service_driver + offset);
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if (cb)
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return cb(to_pcie_device(dev));
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}
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return 0;
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}
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#ifdef CONFIG_PM
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/**
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* pcie_port_device_suspend - suspend port services associated with a PCIe port
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* @dev: PCI Express port to handle
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*/
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static int pcie_port_device_suspend(struct device *dev)
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{
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size_t off = offsetof(struct pcie_port_service_driver, suspend);
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return device_for_each_child(dev, &off, pcie_port_device_iter);
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}
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static int pcie_port_device_resume_noirq(struct device *dev)
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{
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size_t off = offsetof(struct pcie_port_service_driver, resume_noirq);
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return device_for_each_child(dev, &off, pcie_port_device_iter);
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}
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/**
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* pcie_port_device_resume - resume port services associated with a PCIe port
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* @dev: PCI Express port to handle
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*/
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static int pcie_port_device_resume(struct device *dev)
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{
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size_t off = offsetof(struct pcie_port_service_driver, resume);
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return device_for_each_child(dev, &off, pcie_port_device_iter);
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}
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/**
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* pcie_port_device_runtime_suspend - runtime suspend port services
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* @dev: PCI Express port to handle
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*/
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static int pcie_port_device_runtime_suspend(struct device *dev)
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{
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size_t off = offsetof(struct pcie_port_service_driver, runtime_suspend);
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return device_for_each_child(dev, &off, pcie_port_device_iter);
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}
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/**
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* pcie_port_device_runtime_resume - runtime resume port services
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* @dev: PCI Express port to handle
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*/
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static int pcie_port_device_runtime_resume(struct device *dev)
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{
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size_t off = offsetof(struct pcie_port_service_driver, runtime_resume);
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return device_for_each_child(dev, &off, pcie_port_device_iter);
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}
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#endif /* PM */
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static int remove_iter(struct device *dev, void *data)
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{
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if (dev->bus == &pcie_port_bus_type)
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device_unregister(dev);
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return 0;
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}
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static int find_service_iter(struct device *device, void *data)
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{
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struct pcie_port_service_driver *service_driver;
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struct portdrv_service_data *pdrvs;
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u32 service;
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pdrvs = (struct portdrv_service_data *) data;
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service = pdrvs->service;
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if (device->bus == &pcie_port_bus_type && device->driver) {
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service_driver = to_service_driver(device->driver);
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if (service_driver->service == service) {
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pdrvs->drv = service_driver;
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pdrvs->dev = device;
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return 1;
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}
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}
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return 0;
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}
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/**
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* pcie_port_find_device - find the struct device
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* @dev: PCI Express port the service is associated with
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* @service: For the service to find
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*
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* Find the struct device associated with given service on a pci_dev
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*/
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struct device *pcie_port_find_device(struct pci_dev *dev,
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u32 service)
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{
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struct device *device;
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struct portdrv_service_data pdrvs;
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pdrvs.dev = NULL;
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pdrvs.service = service;
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device_for_each_child(&dev->dev, &pdrvs, find_service_iter);
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device = pdrvs.dev;
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return device;
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}
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EXPORT_SYMBOL_GPL(pcie_port_find_device);
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/**
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* pcie_port_device_remove - unregister PCI Express port service devices
|
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* @dev: PCI Express port the service devices to unregister are associated with
|
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*
|
|
* Remove PCI Express port service devices associated with given port and
|
|
* disable MSI-X or MSI for the port.
|
|
*/
|
|
static void pcie_port_device_remove(struct pci_dev *dev)
|
|
{
|
|
device_for_each_child(&dev->dev, NULL, remove_iter);
|
|
pci_free_irq_vectors(dev);
|
|
}
|
|
|
|
/**
|
|
* pcie_port_probe_service - probe driver for given PCI Express port service
|
|
* @dev: PCI Express port service device to probe against
|
|
*
|
|
* If PCI Express port service driver is registered with
|
|
* pcie_port_service_register(), this function will be called by the driver core
|
|
* whenever match is found between the driver and a port service device.
|
|
*/
|
|
static int pcie_port_probe_service(struct device *dev)
|
|
{
|
|
struct pcie_device *pciedev;
|
|
struct pcie_port_service_driver *driver;
|
|
int status;
|
|
|
|
if (!dev || !dev->driver)
|
|
return -ENODEV;
|
|
|
|
driver = to_service_driver(dev->driver);
|
|
if (!driver || !driver->probe)
|
|
return -ENODEV;
|
|
|
|
pciedev = to_pcie_device(dev);
|
|
status = driver->probe(pciedev);
|
|
if (status)
|
|
return status;
|
|
|
|
get_device(dev);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* pcie_port_remove_service - detach driver from given PCI Express port service
|
|
* @dev: PCI Express port service device to handle
|
|
*
|
|
* If PCI Express port service driver is registered with
|
|
* pcie_port_service_register(), this function will be called by the driver core
|
|
* when device_unregister() is called for the port service device associated
|
|
* with the driver.
|
|
*/
|
|
static int pcie_port_remove_service(struct device *dev)
|
|
{
|
|
struct pcie_device *pciedev;
|
|
struct pcie_port_service_driver *driver;
|
|
|
|
if (!dev || !dev->driver)
|
|
return 0;
|
|
|
|
pciedev = to_pcie_device(dev);
|
|
driver = to_service_driver(dev->driver);
|
|
if (driver && driver->remove) {
|
|
driver->remove(pciedev);
|
|
put_device(dev);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* pcie_port_shutdown_service - shut down given PCI Express port service
|
|
* @dev: PCI Express port service device to handle
|
|
*
|
|
* If PCI Express port service driver is registered with
|
|
* pcie_port_service_register(), this function will be called by the driver core
|
|
* when device_shutdown() is called for the port service device associated
|
|
* with the driver.
|
|
*/
|
|
static void pcie_port_shutdown_service(struct device *dev) {}
|
|
|
|
/**
|
|
* pcie_port_service_register - register PCI Express port service driver
|
|
* @new: PCI Express port service driver to register
|
|
*/
|
|
int pcie_port_service_register(struct pcie_port_service_driver *new)
|
|
{
|
|
if (pcie_ports_disabled)
|
|
return -ENODEV;
|
|
|
|
new->driver.name = new->name;
|
|
new->driver.bus = &pcie_port_bus_type;
|
|
new->driver.probe = pcie_port_probe_service;
|
|
new->driver.remove = pcie_port_remove_service;
|
|
new->driver.shutdown = pcie_port_shutdown_service;
|
|
|
|
return driver_register(&new->driver);
|
|
}
|
|
|
|
/**
|
|
* pcie_port_service_unregister - unregister PCI Express port service driver
|
|
* @drv: PCI Express port service driver to unregister
|
|
*/
|
|
void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
|
|
{
|
|
driver_unregister(&drv->driver);
|
|
}
|
|
|
|
/* If this switch is set, PCIe port native services should not be enabled. */
|
|
bool pcie_ports_disabled;
|
|
|
|
/*
|
|
* If the user specified "pcie_ports=native", use the PCIe services regardless
|
|
* of whether the platform has given us permission. On ACPI systems, this
|
|
* means we ignore _OSC.
|
|
*/
|
|
bool pcie_ports_native;
|
|
|
|
/*
|
|
* If the user specified "pcie_ports=dpc-native", use the Linux DPC PCIe
|
|
* service even if the platform hasn't given us permission.
|
|
*/
|
|
bool pcie_ports_dpc_native;
|
|
|
|
static int __init pcie_port_setup(char *str)
|
|
{
|
|
if (!strncmp(str, "compat", 6))
|
|
pcie_ports_disabled = true;
|
|
else if (!strncmp(str, "native", 6))
|
|
pcie_ports_native = true;
|
|
else if (!strncmp(str, "dpc-native", 10))
|
|
pcie_ports_dpc_native = true;
|
|
|
|
return 1;
|
|
}
|
|
__setup("pcie_ports=", pcie_port_setup);
|
|
|
|
/* global data */
|
|
|
|
#ifdef CONFIG_PM
|
|
static int pcie_port_runtime_suspend(struct device *dev)
|
|
{
|
|
if (!to_pci_dev(dev)->bridge_d3)
|
|
return -EBUSY;
|
|
|
|
return pcie_port_device_runtime_suspend(dev);
|
|
}
|
|
|
|
static int pcie_port_runtime_idle(struct device *dev)
|
|
{
|
|
/*
|
|
* Assume the PCI core has set bridge_d3 whenever it thinks the port
|
|
* should be good to go to D3. Everything else, including moving
|
|
* the port to D3, is handled by the PCI core.
|
|
*/
|
|
return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
|
|
}
|
|
|
|
static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
|
.suspend = pcie_port_device_suspend,
|
|
.resume_noirq = pcie_port_device_resume_noirq,
|
|
.resume = pcie_port_device_resume,
|
|
.freeze = pcie_port_device_suspend,
|
|
.thaw = pcie_port_device_resume,
|
|
.poweroff = pcie_port_device_suspend,
|
|
.restore_noirq = pcie_port_device_resume_noirq,
|
|
.restore = pcie_port_device_resume,
|
|
.runtime_suspend = pcie_port_runtime_suspend,
|
|
.runtime_resume = pcie_port_device_runtime_resume,
|
|
.runtime_idle = pcie_port_runtime_idle,
|
|
};
|
|
|
|
#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
|
|
|
|
#else /* !PM */
|
|
|
|
#define PCIE_PORTDRV_PM_OPS NULL
|
|
#endif /* !PM */
|
|
|
|
/*
|
|
* pcie_portdrv_probe - Probe PCI-Express port devices
|
|
* @dev: PCI-Express port device being probed
|
|
*
|
|
* If detected invokes the pcie_port_device_register() method for
|
|
* this port device.
|
|
*
|
|
*/
|
|
static int pcie_portdrv_probe(struct pci_dev *dev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
int type = pci_pcie_type(dev);
|
|
int status;
|
|
|
|
if (!pci_is_pcie(dev) ||
|
|
((type != PCI_EXP_TYPE_ROOT_PORT) &&
|
|
(type != PCI_EXP_TYPE_UPSTREAM) &&
|
|
(type != PCI_EXP_TYPE_DOWNSTREAM) &&
|
|
(type != PCI_EXP_TYPE_RC_EC)))
|
|
return -ENODEV;
|
|
|
|
if (type == PCI_EXP_TYPE_RC_EC)
|
|
pcie_link_rcec(dev);
|
|
|
|
status = pcie_port_device_register(dev);
|
|
if (status)
|
|
return status;
|
|
|
|
pci_save_state(dev);
|
|
|
|
dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE |
|
|
DPM_FLAG_SMART_SUSPEND);
|
|
|
|
if (pci_bridge_d3_possible(dev)) {
|
|
/*
|
|
* Keep the port resumed 100ms to make sure things like
|
|
* config space accesses from userspace (lspci) will not
|
|
* cause the port to repeatedly suspend and resume.
|
|
*/
|
|
pm_runtime_set_autosuspend_delay(&dev->dev, 100);
|
|
pm_runtime_use_autosuspend(&dev->dev);
|
|
pm_runtime_mark_last_busy(&dev->dev);
|
|
pm_runtime_put_autosuspend(&dev->dev);
|
|
pm_runtime_allow(&dev->dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void pcie_portdrv_remove(struct pci_dev *dev)
|
|
{
|
|
if (pci_bridge_d3_possible(dev)) {
|
|
pm_runtime_forbid(&dev->dev);
|
|
pm_runtime_get_noresume(&dev->dev);
|
|
pm_runtime_dont_use_autosuspend(&dev->dev);
|
|
}
|
|
|
|
pcie_port_device_remove(dev);
|
|
|
|
pci_disable_device(dev);
|
|
}
|
|
|
|
static void pcie_portdrv_shutdown(struct pci_dev *dev)
|
|
{
|
|
if (pci_bridge_d3_possible(dev)) {
|
|
pm_runtime_forbid(&dev->dev);
|
|
pm_runtime_get_noresume(&dev->dev);
|
|
pm_runtime_dont_use_autosuspend(&dev->dev);
|
|
}
|
|
|
|
pcie_port_device_remove(dev);
|
|
}
|
|
|
|
static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
|
|
pci_channel_state_t error)
|
|
{
|
|
if (error == pci_channel_io_frozen)
|
|
return PCI_ERS_RESULT_NEED_RESET;
|
|
return PCI_ERS_RESULT_CAN_RECOVER;
|
|
}
|
|
|
|
static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
|
|
{
|
|
size_t off = offsetof(struct pcie_port_service_driver, slot_reset);
|
|
device_for_each_child(&dev->dev, &off, pcie_port_device_iter);
|
|
|
|
pci_restore_state(dev);
|
|
pci_save_state(dev);
|
|
return PCI_ERS_RESULT_RECOVERED;
|
|
}
|
|
|
|
static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
|
|
{
|
|
return PCI_ERS_RESULT_RECOVERED;
|
|
}
|
|
|
|
/*
|
|
* LINUX Device Driver Model
|
|
*/
|
|
static const struct pci_device_id port_pci_ids[] = {
|
|
/* handle any PCI-Express port */
|
|
{ PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_NORMAL, ~0) },
|
|
/* subtractive decode PCI-to-PCI bridge, class type is 060401h */
|
|
{ PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE, ~0) },
|
|
/* handle any Root Complex Event Collector */
|
|
{ PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) },
|
|
{ },
|
|
};
|
|
|
|
static const struct pci_error_handlers pcie_portdrv_err_handler = {
|
|
.error_detected = pcie_portdrv_error_detected,
|
|
.slot_reset = pcie_portdrv_slot_reset,
|
|
.mmio_enabled = pcie_portdrv_mmio_enabled,
|
|
};
|
|
|
|
static struct pci_driver pcie_portdriver = {
|
|
.name = "pcieport",
|
|
.id_table = &port_pci_ids[0],
|
|
|
|
.probe = pcie_portdrv_probe,
|
|
.remove = pcie_portdrv_remove,
|
|
.shutdown = pcie_portdrv_shutdown,
|
|
|
|
.err_handler = &pcie_portdrv_err_handler,
|
|
|
|
.driver_managed_dma = true,
|
|
|
|
.driver.pm = PCIE_PORTDRV_PM_OPS,
|
|
};
|
|
|
|
static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
|
|
{
|
|
pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
|
|
d->ident);
|
|
pcie_pme_disable_msi();
|
|
return 0;
|
|
}
|
|
|
|
static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
|
|
/*
|
|
* Boxes that should not use MSI for PCIe PME signaling.
|
|
*/
|
|
{
|
|
.callback = dmi_pcie_pme_disable_msi,
|
|
.ident = "MSI Wind U-100",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR,
|
|
"MICRO-STAR INTERNATIONAL CO., LTD"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
|
|
},
|
|
},
|
|
{}
|
|
};
|
|
|
|
static void __init pcie_init_services(void)
|
|
{
|
|
pcie_aer_init();
|
|
pcie_pme_init();
|
|
pcie_dpc_init();
|
|
pcie_hp_init();
|
|
}
|
|
|
|
static int __init pcie_portdrv_init(void)
|
|
{
|
|
if (pcie_ports_disabled)
|
|
return -EACCES;
|
|
|
|
pcie_init_services();
|
|
dmi_check_system(pcie_portdrv_dmi_table);
|
|
|
|
return pci_register_driver(&pcie_portdriver);
|
|
}
|
|
device_initcall(pcie_portdrv_init);
|