511 lines
12 KiB
C
511 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for BCM6368 GPIO unit (pinctrl + GPIO)
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*
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* Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
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* Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
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*/
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#include <linux/bits.h>
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#include <linux/gpio/driver.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "../pinctrl-utils.h"
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#include "pinctrl-bcm63xx.h"
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#define BCM6368_NUM_GPIOS 38
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#define BCM6368_MODE_REG 0x18
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#define BCM6368_BASEMODE_REG 0x38
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#define BCM6368_BASEMODE_MASK 0x7
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#define BCM6368_BASEMODE_GPIO 0x0
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#define BCM6368_BASEMODE_UART1 0x1
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struct bcm6368_function {
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const char *name;
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const char * const *groups;
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const unsigned num_groups;
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unsigned dir_out:16;
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unsigned basemode:3;
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};
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struct bcm6368_priv {
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struct regmap_field *overlays;
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};
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#define BCM6368_BASEMODE_PIN(a, b) \
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{ \
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.number = a, \
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.name = b, \
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.drv_data = (void *)true \
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}
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static const struct pinctrl_pin_desc bcm6368_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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PINCTRL_PIN(2, "gpio2"),
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PINCTRL_PIN(3, "gpio3"),
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PINCTRL_PIN(4, "gpio4"),
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PINCTRL_PIN(5, "gpio5"),
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PINCTRL_PIN(6, "gpio6"),
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PINCTRL_PIN(7, "gpio7"),
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PINCTRL_PIN(8, "gpio8"),
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PINCTRL_PIN(9, "gpio9"),
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PINCTRL_PIN(10, "gpio10"),
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PINCTRL_PIN(11, "gpio11"),
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PINCTRL_PIN(12, "gpio12"),
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PINCTRL_PIN(13, "gpio13"),
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PINCTRL_PIN(14, "gpio14"),
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PINCTRL_PIN(15, "gpio15"),
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PINCTRL_PIN(16, "gpio16"),
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PINCTRL_PIN(17, "gpio17"),
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PINCTRL_PIN(18, "gpio18"),
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PINCTRL_PIN(19, "gpio19"),
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PINCTRL_PIN(20, "gpio20"),
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PINCTRL_PIN(21, "gpio21"),
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PINCTRL_PIN(22, "gpio22"),
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PINCTRL_PIN(23, "gpio23"),
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PINCTRL_PIN(24, "gpio24"),
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PINCTRL_PIN(25, "gpio25"),
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PINCTRL_PIN(26, "gpio26"),
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PINCTRL_PIN(27, "gpio27"),
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PINCTRL_PIN(28, "gpio28"),
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PINCTRL_PIN(29, "gpio29"),
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BCM6368_BASEMODE_PIN(30, "gpio30"),
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BCM6368_BASEMODE_PIN(31, "gpio31"),
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BCM6368_BASEMODE_PIN(32, "gpio32"),
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BCM6368_BASEMODE_PIN(33, "gpio33"),
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PINCTRL_PIN(34, "gpio34"),
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PINCTRL_PIN(35, "gpio35"),
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PINCTRL_PIN(36, "gpio36"),
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PINCTRL_PIN(37, "gpio37"),
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};
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static unsigned gpio0_pins[] = { 0 };
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static unsigned gpio1_pins[] = { 1 };
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static unsigned gpio2_pins[] = { 2 };
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static unsigned gpio3_pins[] = { 3 };
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static unsigned gpio4_pins[] = { 4 };
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static unsigned gpio5_pins[] = { 5 };
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static unsigned gpio6_pins[] = { 6 };
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static unsigned gpio7_pins[] = { 7 };
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static unsigned gpio8_pins[] = { 8 };
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static unsigned gpio9_pins[] = { 9 };
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static unsigned gpio10_pins[] = { 10 };
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static unsigned gpio11_pins[] = { 11 };
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static unsigned gpio12_pins[] = { 12 };
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static unsigned gpio13_pins[] = { 13 };
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static unsigned gpio14_pins[] = { 14 };
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static unsigned gpio15_pins[] = { 15 };
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static unsigned gpio16_pins[] = { 16 };
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static unsigned gpio17_pins[] = { 17 };
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static unsigned gpio18_pins[] = { 18 };
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static unsigned gpio19_pins[] = { 19 };
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static unsigned gpio20_pins[] = { 20 };
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static unsigned gpio21_pins[] = { 21 };
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static unsigned gpio22_pins[] = { 22 };
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static unsigned gpio23_pins[] = { 23 };
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static unsigned gpio24_pins[] = { 24 };
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static unsigned gpio25_pins[] = { 25 };
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static unsigned gpio26_pins[] = { 26 };
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static unsigned gpio27_pins[] = { 27 };
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static unsigned gpio28_pins[] = { 28 };
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static unsigned gpio29_pins[] = { 29 };
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static unsigned gpio30_pins[] = { 30 };
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static unsigned gpio31_pins[] = { 31 };
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static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
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static struct pingroup bcm6368_groups[] = {
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BCM_PIN_GROUP(gpio0),
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BCM_PIN_GROUP(gpio1),
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BCM_PIN_GROUP(gpio2),
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BCM_PIN_GROUP(gpio3),
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BCM_PIN_GROUP(gpio4),
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BCM_PIN_GROUP(gpio5),
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BCM_PIN_GROUP(gpio6),
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BCM_PIN_GROUP(gpio7),
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BCM_PIN_GROUP(gpio8),
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BCM_PIN_GROUP(gpio9),
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BCM_PIN_GROUP(gpio10),
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BCM_PIN_GROUP(gpio11),
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BCM_PIN_GROUP(gpio12),
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BCM_PIN_GROUP(gpio13),
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BCM_PIN_GROUP(gpio14),
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BCM_PIN_GROUP(gpio15),
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BCM_PIN_GROUP(gpio16),
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BCM_PIN_GROUP(gpio17),
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BCM_PIN_GROUP(gpio18),
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BCM_PIN_GROUP(gpio19),
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BCM_PIN_GROUP(gpio20),
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BCM_PIN_GROUP(gpio21),
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BCM_PIN_GROUP(gpio22),
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BCM_PIN_GROUP(gpio23),
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BCM_PIN_GROUP(gpio24),
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BCM_PIN_GROUP(gpio25),
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BCM_PIN_GROUP(gpio26),
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BCM_PIN_GROUP(gpio27),
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BCM_PIN_GROUP(gpio28),
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BCM_PIN_GROUP(gpio29),
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BCM_PIN_GROUP(gpio30),
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BCM_PIN_GROUP(gpio31),
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BCM_PIN_GROUP(uart1_grp),
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};
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static const char * const analog_afe_0_groups[] = {
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"gpio0",
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};
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static const char * const analog_afe_1_groups[] = {
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"gpio1",
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};
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static const char * const sys_irq_groups[] = {
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"gpio2",
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};
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static const char * const serial_led_data_groups[] = {
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"gpio3",
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};
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static const char * const serial_led_clk_groups[] = {
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"gpio4",
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};
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static const char * const inet_led_groups[] = {
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"gpio5",
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};
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static const char * const ephy0_led_groups[] = {
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"gpio6",
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};
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static const char * const ephy1_led_groups[] = {
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"gpio7",
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};
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static const char * const ephy2_led_groups[] = {
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"gpio8",
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};
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static const char * const ephy3_led_groups[] = {
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"gpio9",
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};
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static const char * const robosw_led_data_groups[] = {
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"gpio10",
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};
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static const char * const robosw_led_clk_groups[] = {
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"gpio11",
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};
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static const char * const robosw_led0_groups[] = {
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"gpio12",
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};
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static const char * const robosw_led1_groups[] = {
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"gpio13",
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};
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static const char * const usb_device_led_groups[] = {
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"gpio14",
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};
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static const char * const pci_req1_groups[] = {
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"gpio16",
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};
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static const char * const pci_gnt1_groups[] = {
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"gpio17",
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};
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static const char * const pci_intb_groups[] = {
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"gpio18",
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};
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static const char * const pci_req0_groups[] = {
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"gpio19",
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};
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static const char * const pci_gnt0_groups[] = {
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"gpio20",
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};
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static const char * const pcmcia_cd1_groups[] = {
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"gpio22",
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};
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static const char * const pcmcia_cd2_groups[] = {
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"gpio23",
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};
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static const char * const pcmcia_vs1_groups[] = {
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"gpio24",
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};
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static const char * const pcmcia_vs2_groups[] = {
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"gpio25",
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};
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static const char * const ebi_cs2_groups[] = {
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"gpio26",
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};
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static const char * const ebi_cs3_groups[] = {
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"gpio27",
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};
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static const char * const spi_cs2_groups[] = {
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"gpio28",
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};
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static const char * const spi_cs3_groups[] = {
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"gpio29",
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};
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static const char * const spi_cs4_groups[] = {
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"gpio30",
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};
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static const char * const spi_cs5_groups[] = {
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"gpio31",
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};
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static const char * const uart1_groups[] = {
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"uart1_grp",
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};
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#define BCM6368_FUN(n, out) \
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{ \
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.name = #n, \
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.groups = n##_groups, \
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.num_groups = ARRAY_SIZE(n##_groups), \
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.dir_out = out, \
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}
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#define BCM6368_BASEMODE_FUN(n, val, out) \
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{ \
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.name = #n, \
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.groups = n##_groups, \
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.num_groups = ARRAY_SIZE(n##_groups), \
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.basemode = BCM6368_BASEMODE_##val, \
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.dir_out = out, \
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}
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static const struct bcm6368_function bcm6368_funcs[] = {
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BCM6368_FUN(analog_afe_0, 1),
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BCM6368_FUN(analog_afe_1, 1),
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BCM6368_FUN(sys_irq, 1),
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BCM6368_FUN(serial_led_data, 1),
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BCM6368_FUN(serial_led_clk, 1),
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BCM6368_FUN(inet_led, 1),
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BCM6368_FUN(ephy0_led, 1),
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BCM6368_FUN(ephy1_led, 1),
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BCM6368_FUN(ephy2_led, 1),
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BCM6368_FUN(ephy3_led, 1),
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BCM6368_FUN(robosw_led_data, 1),
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BCM6368_FUN(robosw_led_clk, 1),
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BCM6368_FUN(robosw_led0, 1),
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BCM6368_FUN(robosw_led1, 1),
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BCM6368_FUN(usb_device_led, 1),
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BCM6368_FUN(pci_req1, 0),
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BCM6368_FUN(pci_gnt1, 0),
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BCM6368_FUN(pci_intb, 0),
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BCM6368_FUN(pci_req0, 0),
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BCM6368_FUN(pci_gnt0, 0),
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BCM6368_FUN(pcmcia_cd1, 0),
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BCM6368_FUN(pcmcia_cd2, 0),
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BCM6368_FUN(pcmcia_vs1, 0),
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BCM6368_FUN(pcmcia_vs2, 0),
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BCM6368_FUN(ebi_cs2, 1),
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BCM6368_FUN(ebi_cs3, 1),
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BCM6368_FUN(spi_cs2, 1),
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BCM6368_FUN(spi_cs3, 1),
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BCM6368_FUN(spi_cs4, 1),
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BCM6368_FUN(spi_cs5, 1),
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BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
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};
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static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(bcm6368_groups);
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}
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static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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return bcm6368_groups[group].name;
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}
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static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned group, const unsigned **pins,
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unsigned *npins)
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{
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*pins = bcm6368_groups[group].pins;
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*npins = bcm6368_groups[group].npins;
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return 0;
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}
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static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(bcm6368_funcs);
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}
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static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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return bcm6368_funcs[selector].name;
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}
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static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
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unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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*groups = bcm6368_funcs[selector].groups;
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*num_groups = bcm6368_funcs[selector].num_groups;
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return 0;
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}
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static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
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unsigned selector, unsigned group)
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{
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struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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struct bcm6368_priv *priv = pc->driver_data;
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const struct pingroup *pg = &bcm6368_groups[group];
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const struct bcm6368_function *fun = &bcm6368_funcs[selector];
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int i, pin;
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if (fun->basemode) {
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unsigned int mask = 0;
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for (i = 0; i < pg->npins; i++) {
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pin = pg->pins[i];
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if (pin < BCM63XX_BANK_GPIOS)
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mask |= BIT(pin);
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}
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regmap_update_bits(pc->regs, BCM6368_MODE_REG, mask, 0);
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regmap_field_write(priv->overlays, fun->basemode);
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} else {
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pin = pg->pins[0];
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if (bcm6368_pins[pin].drv_data)
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regmap_field_write(priv->overlays,
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BCM6368_BASEMODE_GPIO);
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regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin),
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BIT(pin));
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}
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for (pin = 0; pin < pg->npins; pin++) {
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struct pinctrl_gpio_range *range;
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int hw_gpio = bcm6368_pins[pin].number;
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range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
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if (range) {
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struct gpio_chip *gc = range->gc;
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if (fun->dir_out & BIT(pin))
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gc->direction_output(gc, hw_gpio, 0);
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else
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gc->direction_input(gc, hw_gpio);
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}
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}
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return 0;
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}
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static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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struct bcm6368_priv *priv = pc->driver_data;
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if (offset >= BCM63XX_BANK_GPIOS && !bcm6368_pins[offset].drv_data)
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return 0;
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/* disable all functions using this pin */
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if (offset < BCM63XX_BANK_GPIOS)
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regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(offset), 0);
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if (bcm6368_pins[offset].drv_data)
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regmap_field_write(priv->overlays, BCM6368_BASEMODE_GPIO);
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return 0;
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}
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static const struct pinctrl_ops bcm6368_pctl_ops = {
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.dt_free_map = pinctrl_utils_free_map,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.get_group_name = bcm6368_pinctrl_get_group_name,
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.get_group_pins = bcm6368_pinctrl_get_group_pins,
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.get_groups_count = bcm6368_pinctrl_get_group_count,
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};
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static const struct pinmux_ops bcm6368_pmx_ops = {
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.get_function_groups = bcm6368_pinctrl_get_groups,
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.get_function_name = bcm6368_pinctrl_get_func_name,
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.get_functions_count = bcm6368_pinctrl_get_func_count,
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.gpio_request_enable = bcm6368_gpio_request_enable,
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.set_mux = bcm6368_pinctrl_set_mux,
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.strict = true,
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};
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static const struct bcm63xx_pinctrl_soc bcm6368_soc = {
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.ngpios = BCM6368_NUM_GPIOS,
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.npins = ARRAY_SIZE(bcm6368_pins),
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.pctl_ops = &bcm6368_pctl_ops,
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.pins = bcm6368_pins,
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.pmx_ops = &bcm6368_pmx_ops,
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};
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static int bcm6368_pinctrl_probe(struct platform_device *pdev)
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{
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struct reg_field overlays = REG_FIELD(BCM6368_BASEMODE_REG, 0, 15);
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struct device *dev = &pdev->dev;
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struct bcm63xx_pinctrl *pc;
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struct bcm6368_priv *priv;
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int err;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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err = bcm63xx_pinctrl_probe(pdev, &bcm6368_soc, (void *) priv);
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if (err)
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return err;
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pc = platform_get_drvdata(pdev);
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priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
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if (IS_ERR(priv->overlays))
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return PTR_ERR(priv->overlays);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id bcm6368_pinctrl_match[] = {
|
|
{ .compatible = "brcm,bcm6368-pinctrl", },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static struct platform_driver bcm6368_pinctrl_driver = {
|
|
.probe = bcm6368_pinctrl_probe,
|
|
.driver = {
|
|
.name = "bcm6368-pinctrl",
|
|
.of_match_table = bcm6368_pinctrl_match,
|
|
},
|
|
};
|
|
|
|
builtin_platform_driver(bcm6368_pinctrl_driver);
|