644 lines
17 KiB
C
644 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* RTC Driver for X-Powers AC100
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*
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* Copyright (c) 2016 Chen-Yu Tsai
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*
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* Chen-Yu Tsai <wens@csie.org>
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*/
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#include <linux/bcd.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mfd/ac100.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/types.h>
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/* Control register */
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#define AC100_RTC_CTRL_24HOUR BIT(0)
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/* Clock output register bits */
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#define AC100_CLKOUT_PRE_DIV_SHIFT 5
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#define AC100_CLKOUT_PRE_DIV_WIDTH 3
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#define AC100_CLKOUT_MUX_SHIFT 4
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#define AC100_CLKOUT_MUX_WIDTH 1
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#define AC100_CLKOUT_DIV_SHIFT 1
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#define AC100_CLKOUT_DIV_WIDTH 3
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#define AC100_CLKOUT_EN BIT(0)
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/* RTC */
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#define AC100_RTC_SEC_MASK GENMASK(6, 0)
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#define AC100_RTC_MIN_MASK GENMASK(6, 0)
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#define AC100_RTC_HOU_MASK GENMASK(5, 0)
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#define AC100_RTC_WEE_MASK GENMASK(2, 0)
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#define AC100_RTC_DAY_MASK GENMASK(5, 0)
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#define AC100_RTC_MON_MASK GENMASK(4, 0)
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#define AC100_RTC_YEA_MASK GENMASK(7, 0)
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#define AC100_RTC_YEA_LEAP BIT(15)
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#define AC100_RTC_UPD_TRIGGER BIT(15)
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/* Alarm (wall clock) */
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#define AC100_ALM_INT_ENABLE BIT(0)
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#define AC100_ALM_SEC_MASK GENMASK(6, 0)
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#define AC100_ALM_MIN_MASK GENMASK(6, 0)
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#define AC100_ALM_HOU_MASK GENMASK(5, 0)
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#define AC100_ALM_WEE_MASK GENMASK(2, 0)
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#define AC100_ALM_DAY_MASK GENMASK(5, 0)
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#define AC100_ALM_MON_MASK GENMASK(4, 0)
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#define AC100_ALM_YEA_MASK GENMASK(7, 0)
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#define AC100_ALM_ENABLE_FLAG BIT(15)
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#define AC100_ALM_UPD_TRIGGER BIT(15)
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/*
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* The year parameter passed to the driver is usually an offset relative to
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* the year 1900. This macro is used to convert this offset to another one
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* relative to the minimum year allowed by the hardware.
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*
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* The year range is 1970 - 2069. This range is selected to match Allwinner's
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* driver.
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*/
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#define AC100_YEAR_MIN 1970
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#define AC100_YEAR_MAX 2069
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#define AC100_YEAR_OFF (AC100_YEAR_MIN - 1900)
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struct ac100_clkout {
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struct clk_hw hw;
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struct regmap *regmap;
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u8 offset;
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};
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#define to_ac100_clkout(_hw) container_of(_hw, struct ac100_clkout, hw)
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#define AC100_RTC_32K_NAME "ac100-rtc-32k"
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#define AC100_RTC_32K_RATE 32768
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#define AC100_CLKOUT_NUM 3
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static const char * const ac100_clkout_names[AC100_CLKOUT_NUM] = {
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"ac100-cko1-rtc",
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"ac100-cko2-rtc",
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"ac100-cko3-rtc",
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};
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struct ac100_rtc_dev {
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struct rtc_device *rtc;
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struct device *dev;
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struct regmap *regmap;
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int irq;
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unsigned long alarm;
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struct clk_hw *rtc_32k_clk;
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struct ac100_clkout clks[AC100_CLKOUT_NUM];
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struct clk_hw_onecell_data *clk_data;
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};
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/**
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* Clock controls for 3 clock output pins
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*/
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static const struct clk_div_table ac100_clkout_prediv[] = {
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{ .val = 0, .div = 1 },
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{ .val = 1, .div = 2 },
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{ .val = 2, .div = 4 },
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{ .val = 3, .div = 8 },
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{ .val = 4, .div = 16 },
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{ .val = 5, .div = 32 },
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{ .val = 6, .div = 64 },
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{ .val = 7, .div = 122 },
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{ },
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};
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/* Abuse the fact that one parent is 32768 Hz, and the other is 4 MHz */
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static unsigned long ac100_clkout_recalc_rate(struct clk_hw *hw,
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unsigned long prate)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg, div;
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regmap_read(clk->regmap, clk->offset, ®);
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/* Handle pre-divider first */
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if (prate != AC100_RTC_32K_RATE) {
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div = (reg >> AC100_CLKOUT_PRE_DIV_SHIFT) &
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((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1);
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prate = divider_recalc_rate(hw, prate, div,
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ac100_clkout_prediv, 0,
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AC100_CLKOUT_PRE_DIV_WIDTH);
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}
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div = (reg >> AC100_CLKOUT_DIV_SHIFT) &
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(BIT(AC100_CLKOUT_DIV_WIDTH) - 1);
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return divider_recalc_rate(hw, prate, div, NULL,
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CLK_DIVIDER_POWER_OF_TWO,
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AC100_CLKOUT_DIV_WIDTH);
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}
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static long ac100_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long prate)
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{
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unsigned long best_rate = 0, tmp_rate, tmp_prate;
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int i;
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if (prate == AC100_RTC_32K_RATE)
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return divider_round_rate(hw, rate, &prate, NULL,
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AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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for (i = 0; ac100_clkout_prediv[i].div; i++) {
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tmp_prate = DIV_ROUND_UP(prate, ac100_clkout_prediv[i].val);
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tmp_rate = divider_round_rate(hw, rate, &tmp_prate, NULL,
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AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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if (tmp_rate > rate)
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continue;
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if (rate - tmp_rate < best_rate - tmp_rate)
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best_rate = tmp_rate;
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}
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return best_rate;
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}
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static int ac100_clkout_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct clk_hw *best_parent;
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unsigned long best = 0;
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int i, num_parents = clk_hw_get_num_parents(hw);
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for (i = 0; i < num_parents; i++) {
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struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i);
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unsigned long tmp, prate;
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/*
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* The clock has two parents, one is a fixed clock which is
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* internally registered by the ac100 driver. The other parent
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* is a clock from the codec side of the chip, which we
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* properly declare and reference in the devicetree and is
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* not implemented in any driver right now.
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* If the clock core looks for the parent of that second
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* missing clock, it can't find one that is registered and
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* returns NULL.
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* So we end up in a situation where clk_hw_get_num_parents
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* returns the amount of clocks we can be parented to, but
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* clk_hw_get_parent_by_index will not return the orphan
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* clocks.
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* Thus we need to check if the parent exists before
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* we get the parent rate, so we could use the RTC
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* without waiting for the codec to be supported.
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*/
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if (!parent)
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continue;
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prate = clk_hw_get_rate(parent);
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tmp = ac100_clkout_round_rate(hw, req->rate, prate);
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if (tmp > req->rate)
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continue;
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if (req->rate - tmp < req->rate - best) {
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best = tmp;
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best_parent = parent;
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}
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}
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if (!best)
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return -EINVAL;
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req->best_parent_hw = best_parent;
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req->best_parent_rate = best;
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req->rate = best;
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return 0;
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}
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static int ac100_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long prate)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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int div = 0, pre_div = 0;
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do {
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div = divider_get_val(rate * ac100_clkout_prediv[pre_div].div,
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prate, NULL, AC100_CLKOUT_DIV_WIDTH,
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CLK_DIVIDER_POWER_OF_TWO);
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if (div >= 0)
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break;
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} while (prate != AC100_RTC_32K_RATE &&
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ac100_clkout_prediv[++pre_div].div);
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if (div < 0)
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return div;
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pre_div = ac100_clkout_prediv[pre_div].val;
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regmap_update_bits(clk->regmap, clk->offset,
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((1 << AC100_CLKOUT_DIV_WIDTH) - 1) << AC100_CLKOUT_DIV_SHIFT |
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((1 << AC100_CLKOUT_PRE_DIV_WIDTH) - 1) << AC100_CLKOUT_PRE_DIV_SHIFT,
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(div - 1) << AC100_CLKOUT_DIV_SHIFT |
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(pre_div - 1) << AC100_CLKOUT_PRE_DIV_SHIFT);
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return 0;
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}
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static int ac100_clkout_prepare(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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return regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN,
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AC100_CLKOUT_EN);
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}
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static void ac100_clkout_unprepare(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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regmap_update_bits(clk->regmap, clk->offset, AC100_CLKOUT_EN, 0);
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}
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static int ac100_clkout_is_prepared(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg;
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regmap_read(clk->regmap, clk->offset, ®);
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return reg & AC100_CLKOUT_EN;
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}
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static u8 ac100_clkout_get_parent(struct clk_hw *hw)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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unsigned int reg;
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regmap_read(clk->regmap, clk->offset, ®);
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return (reg >> AC100_CLKOUT_MUX_SHIFT) & 0x1;
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}
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static int ac100_clkout_set_parent(struct clk_hw *hw, u8 index)
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{
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struct ac100_clkout *clk = to_ac100_clkout(hw);
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return regmap_update_bits(clk->regmap, clk->offset,
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BIT(AC100_CLKOUT_MUX_SHIFT),
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index ? BIT(AC100_CLKOUT_MUX_SHIFT) : 0);
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}
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static const struct clk_ops ac100_clkout_ops = {
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.prepare = ac100_clkout_prepare,
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.unprepare = ac100_clkout_unprepare,
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.is_prepared = ac100_clkout_is_prepared,
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.recalc_rate = ac100_clkout_recalc_rate,
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.determine_rate = ac100_clkout_determine_rate,
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.get_parent = ac100_clkout_get_parent,
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.set_parent = ac100_clkout_set_parent,
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.set_rate = ac100_clkout_set_rate,
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};
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static int ac100_rtc_register_clks(struct ac100_rtc_dev *chip)
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{
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struct device_node *np = chip->dev->of_node;
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const char *parents[2] = {AC100_RTC_32K_NAME};
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int i, ret;
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chip->clk_data = devm_kzalloc(chip->dev,
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struct_size(chip->clk_data, hws,
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AC100_CLKOUT_NUM),
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GFP_KERNEL);
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if (!chip->clk_data)
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return -ENOMEM;
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chip->rtc_32k_clk = clk_hw_register_fixed_rate(chip->dev,
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AC100_RTC_32K_NAME,
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NULL, 0,
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AC100_RTC_32K_RATE);
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if (IS_ERR(chip->rtc_32k_clk)) {
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ret = PTR_ERR(chip->rtc_32k_clk);
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dev_err(chip->dev, "Failed to register RTC-32k clock: %d\n",
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ret);
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return ret;
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}
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parents[1] = of_clk_get_parent_name(np, 0);
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if (!parents[1]) {
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dev_err(chip->dev, "Failed to get ADDA 4M clock\n");
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return -EINVAL;
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}
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for (i = 0; i < AC100_CLKOUT_NUM; i++) {
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struct ac100_clkout *clk = &chip->clks[i];
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struct clk_init_data init = {
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.name = ac100_clkout_names[i],
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.ops = &ac100_clkout_ops,
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.parent_names = parents,
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.num_parents = ARRAY_SIZE(parents),
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.flags = 0,
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};
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of_property_read_string_index(np, "clock-output-names",
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i, &init.name);
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clk->regmap = chip->regmap;
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clk->offset = AC100_CLKOUT_CTRL1 + i;
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clk->hw.init = &init;
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ret = devm_clk_hw_register(chip->dev, &clk->hw);
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if (ret) {
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dev_err(chip->dev, "Failed to register clk '%s': %d\n",
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init.name, ret);
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goto err_unregister_rtc_32k;
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}
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chip->clk_data->hws[i] = &clk->hw;
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}
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chip->clk_data->num = i;
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ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, chip->clk_data);
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if (ret)
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goto err_unregister_rtc_32k;
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return 0;
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err_unregister_rtc_32k:
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clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);
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return ret;
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}
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static void ac100_rtc_unregister_clks(struct ac100_rtc_dev *chip)
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{
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of_clk_del_provider(chip->dev->of_node);
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clk_unregister_fixed_rate(chip->rtc_32k_clk->clk);
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}
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/**
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* RTC related bits
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*/
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static int ac100_rtc_get_time(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
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struct regmap *regmap = chip->regmap;
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u16 reg[7];
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int ret;
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ret = regmap_bulk_read(regmap, AC100_RTC_SEC, reg, 7);
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if (ret)
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return ret;
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rtc_tm->tm_sec = bcd2bin(reg[0] & AC100_RTC_SEC_MASK);
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rtc_tm->tm_min = bcd2bin(reg[1] & AC100_RTC_MIN_MASK);
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rtc_tm->tm_hour = bcd2bin(reg[2] & AC100_RTC_HOU_MASK);
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rtc_tm->tm_wday = bcd2bin(reg[3] & AC100_RTC_WEE_MASK);
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rtc_tm->tm_mday = bcd2bin(reg[4] & AC100_RTC_DAY_MASK);
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rtc_tm->tm_mon = bcd2bin(reg[5] & AC100_RTC_MON_MASK) - 1;
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rtc_tm->tm_year = bcd2bin(reg[6] & AC100_RTC_YEA_MASK) +
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AC100_YEAR_OFF;
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return 0;
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}
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static int ac100_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
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struct regmap *regmap = chip->regmap;
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int year;
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u16 reg[8];
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/* our RTC has a limited year range... */
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year = rtc_tm->tm_year - AC100_YEAR_OFF;
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if (year < 0 || year > (AC100_YEAR_MAX - 1900)) {
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dev_err(dev, "rtc only supports year in range %d - %d\n",
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AC100_YEAR_MIN, AC100_YEAR_MAX);
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return -EINVAL;
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}
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/* convert to BCD */
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reg[0] = bin2bcd(rtc_tm->tm_sec) & AC100_RTC_SEC_MASK;
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reg[1] = bin2bcd(rtc_tm->tm_min) & AC100_RTC_MIN_MASK;
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reg[2] = bin2bcd(rtc_tm->tm_hour) & AC100_RTC_HOU_MASK;
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reg[3] = bin2bcd(rtc_tm->tm_wday) & AC100_RTC_WEE_MASK;
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reg[4] = bin2bcd(rtc_tm->tm_mday) & AC100_RTC_DAY_MASK;
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reg[5] = bin2bcd(rtc_tm->tm_mon + 1) & AC100_RTC_MON_MASK;
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reg[6] = bin2bcd(year) & AC100_RTC_YEA_MASK;
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/* trigger write */
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reg[7] = AC100_RTC_UPD_TRIGGER;
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/* Is it a leap year? */
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if (is_leap_year(year + AC100_YEAR_OFF + 1900))
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reg[6] |= AC100_RTC_YEA_LEAP;
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return regmap_bulk_write(regmap, AC100_RTC_SEC, reg, 8);
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}
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static int ac100_rtc_alarm_irq_enable(struct device *dev, unsigned int en)
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{
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struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
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struct regmap *regmap = chip->regmap;
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unsigned int val;
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val = en ? AC100_ALM_INT_ENABLE : 0;
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return regmap_write(regmap, AC100_ALM_INT_ENA, val);
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}
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static int ac100_rtc_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
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struct regmap *regmap = chip->regmap;
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struct rtc_time *alrm_tm = &alrm->time;
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u16 reg[7];
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unsigned int val;
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int ret;
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ret = regmap_read(regmap, AC100_ALM_INT_ENA, &val);
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if (ret)
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return ret;
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alrm->enabled = !!(val & AC100_ALM_INT_ENABLE);
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ret = regmap_bulk_read(regmap, AC100_ALM_SEC, reg, 7);
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if (ret)
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return ret;
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alrm_tm->tm_sec = bcd2bin(reg[0] & AC100_ALM_SEC_MASK);
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alrm_tm->tm_min = bcd2bin(reg[1] & AC100_ALM_MIN_MASK);
|
|
alrm_tm->tm_hour = bcd2bin(reg[2] & AC100_ALM_HOU_MASK);
|
|
alrm_tm->tm_wday = bcd2bin(reg[3] & AC100_ALM_WEE_MASK);
|
|
alrm_tm->tm_mday = bcd2bin(reg[4] & AC100_ALM_DAY_MASK);
|
|
alrm_tm->tm_mon = bcd2bin(reg[5] & AC100_ALM_MON_MASK) - 1;
|
|
alrm_tm->tm_year = bcd2bin(reg[6] & AC100_ALM_YEA_MASK) +
|
|
AC100_YEAR_OFF;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ac100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
|
{
|
|
struct ac100_rtc_dev *chip = dev_get_drvdata(dev);
|
|
struct regmap *regmap = chip->regmap;
|
|
struct rtc_time *alrm_tm = &alrm->time;
|
|
u16 reg[8];
|
|
int year;
|
|
int ret;
|
|
|
|
/* our alarm has a limited year range... */
|
|
year = alrm_tm->tm_year - AC100_YEAR_OFF;
|
|
if (year < 0 || year > (AC100_YEAR_MAX - 1900)) {
|
|
dev_err(dev, "alarm only supports year in range %d - %d\n",
|
|
AC100_YEAR_MIN, AC100_YEAR_MAX);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* convert to BCD */
|
|
reg[0] = (bin2bcd(alrm_tm->tm_sec) & AC100_ALM_SEC_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
reg[1] = (bin2bcd(alrm_tm->tm_min) & AC100_ALM_MIN_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
reg[2] = (bin2bcd(alrm_tm->tm_hour) & AC100_ALM_HOU_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
/* Do not enable weekday alarm */
|
|
reg[3] = bin2bcd(alrm_tm->tm_wday) & AC100_ALM_WEE_MASK;
|
|
reg[4] = (bin2bcd(alrm_tm->tm_mday) & AC100_ALM_DAY_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
reg[5] = (bin2bcd(alrm_tm->tm_mon + 1) & AC100_ALM_MON_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
reg[6] = (bin2bcd(year) & AC100_ALM_YEA_MASK) |
|
|
AC100_ALM_ENABLE_FLAG;
|
|
/* trigger write */
|
|
reg[7] = AC100_ALM_UPD_TRIGGER;
|
|
|
|
ret = regmap_bulk_write(regmap, AC100_ALM_SEC, reg, 8);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return ac100_rtc_alarm_irq_enable(dev, alrm->enabled);
|
|
}
|
|
|
|
static irqreturn_t ac100_rtc_irq(int irq, void *data)
|
|
{
|
|
struct ac100_rtc_dev *chip = data;
|
|
struct regmap *regmap = chip->regmap;
|
|
unsigned int val = 0;
|
|
int ret;
|
|
|
|
rtc_lock(chip->rtc);
|
|
|
|
/* read status */
|
|
ret = regmap_read(regmap, AC100_ALM_INT_STA, &val);
|
|
if (ret)
|
|
goto out;
|
|
|
|
if (val & AC100_ALM_INT_ENABLE) {
|
|
/* signal rtc framework */
|
|
rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
|
|
|
|
/* clear status */
|
|
ret = regmap_write(regmap, AC100_ALM_INT_STA, val);
|
|
if (ret)
|
|
goto out;
|
|
|
|
/* disable interrupt */
|
|
ret = ac100_rtc_alarm_irq_enable(chip->dev, 0);
|
|
if (ret)
|
|
goto out;
|
|
}
|
|
|
|
out:
|
|
rtc_unlock(chip->rtc);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static const struct rtc_class_ops ac100_rtc_ops = {
|
|
.read_time = ac100_rtc_get_time,
|
|
.set_time = ac100_rtc_set_time,
|
|
.read_alarm = ac100_rtc_get_alarm,
|
|
.set_alarm = ac100_rtc_set_alarm,
|
|
.alarm_irq_enable = ac100_rtc_alarm_irq_enable,
|
|
};
|
|
|
|
static int ac100_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct ac100_dev *ac100 = dev_get_drvdata(pdev->dev.parent);
|
|
struct ac100_rtc_dev *chip;
|
|
int ret;
|
|
|
|
chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
|
|
if (!chip)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, chip);
|
|
chip->dev = &pdev->dev;
|
|
chip->regmap = ac100->regmap;
|
|
|
|
chip->irq = platform_get_irq(pdev, 0);
|
|
if (chip->irq < 0)
|
|
return chip->irq;
|
|
|
|
chip->rtc = devm_rtc_allocate_device(&pdev->dev);
|
|
if (IS_ERR(chip->rtc))
|
|
return PTR_ERR(chip->rtc);
|
|
|
|
chip->rtc->ops = &ac100_rtc_ops;
|
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, chip->irq, NULL,
|
|
ac100_rtc_irq,
|
|
IRQF_SHARED | IRQF_ONESHOT,
|
|
dev_name(&pdev->dev), chip);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Could not request IRQ\n");
|
|
return ret;
|
|
}
|
|
|
|
/* always use 24 hour mode */
|
|
regmap_write_bits(chip->regmap, AC100_RTC_CTRL, AC100_RTC_CTRL_24HOUR,
|
|
AC100_RTC_CTRL_24HOUR);
|
|
|
|
/* disable counter alarm interrupt */
|
|
regmap_write(chip->regmap, AC100_ALM_INT_ENA, 0);
|
|
|
|
/* clear counter alarm pending interrupts */
|
|
regmap_write(chip->regmap, AC100_ALM_INT_STA, AC100_ALM_INT_ENABLE);
|
|
|
|
ret = ac100_rtc_register_clks(chip);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return devm_rtc_register_device(chip->rtc);
|
|
}
|
|
|
|
static int ac100_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct ac100_rtc_dev *chip = platform_get_drvdata(pdev);
|
|
|
|
ac100_rtc_unregister_clks(chip);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id ac100_rtc_match[] = {
|
|
{ .compatible = "x-powers,ac100-rtc" },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ac100_rtc_match);
|
|
|
|
static struct platform_driver ac100_rtc_driver = {
|
|
.probe = ac100_rtc_probe,
|
|
.remove = ac100_rtc_remove,
|
|
.driver = {
|
|
.name = "ac100-rtc",
|
|
.of_match_table = of_match_ptr(ac100_rtc_match),
|
|
},
|
|
};
|
|
module_platform_driver(ac100_rtc_driver);
|
|
|
|
MODULE_DESCRIPTION("X-Powers AC100 RTC driver");
|
|
MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
|
|
MODULE_LICENSE("GPL v2");
|