302 lines
8.0 KiB
C
302 lines
8.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
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*
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* Copyright (C) 2011 NXP Semiconductors
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* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/rtc.h>
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/* LPC24xx RTC register offsets and bits */
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#define LPC24XX_ILR 0x00
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#define LPC24XX_RTCCIF BIT(0)
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#define LPC24XX_RTCALF BIT(1)
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#define LPC24XX_CTC 0x04
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#define LPC24XX_CCR 0x08
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#define LPC24XX_CLKEN BIT(0)
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#define LPC178X_CCALEN BIT(4)
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#define LPC24XX_CIIR 0x0c
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#define LPC24XX_AMR 0x10
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#define LPC24XX_ALARM_DISABLE 0xff
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#define LPC24XX_CTIME0 0x14
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#define LPC24XX_CTIME1 0x18
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#define LPC24XX_CTIME2 0x1c
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#define LPC24XX_SEC 0x20
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#define LPC24XX_MIN 0x24
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#define LPC24XX_HOUR 0x28
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#define LPC24XX_DOM 0x2c
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#define LPC24XX_DOW 0x30
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#define LPC24XX_DOY 0x34
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#define LPC24XX_MONTH 0x38
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#define LPC24XX_YEAR 0x3c
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#define LPC24XX_ALSEC 0x60
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#define LPC24XX_ALMIN 0x64
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#define LPC24XX_ALHOUR 0x68
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#define LPC24XX_ALDOM 0x6c
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#define LPC24XX_ALDOW 0x70
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#define LPC24XX_ALDOY 0x74
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#define LPC24XX_ALMON 0x78
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#define LPC24XX_ALYEAR 0x7c
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/* Macros to read fields in consolidated time (CT) registers */
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#define CT0_SECS(x) (((x) >> 0) & 0x3f)
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#define CT0_MINS(x) (((x) >> 8) & 0x3f)
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#define CT0_HOURS(x) (((x) >> 16) & 0x1f)
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#define CT0_DOW(x) (((x) >> 24) & 0x07)
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#define CT1_DOM(x) (((x) >> 0) & 0x1f)
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#define CT1_MONTH(x) (((x) >> 8) & 0x0f)
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#define CT1_YEAR(x) (((x) >> 16) & 0xfff)
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#define CT2_DOY(x) (((x) >> 0) & 0xfff)
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#define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
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#define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
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struct lpc24xx_rtc {
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void __iomem *rtc_base;
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struct rtc_device *rtc;
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struct clk *clk_rtc;
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struct clk *clk_reg;
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};
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static int lpc24xx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
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/* Disable RTC during update */
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rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
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rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec);
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rtc_writel(rtc, LPC24XX_MIN, tm->tm_min);
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rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour);
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rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday);
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rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday);
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rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday);
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rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon);
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rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year);
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rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
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return 0;
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}
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static int lpc24xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
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u32 ct0, ct1, ct2;
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ct0 = rtc_readl(rtc, LPC24XX_CTIME0);
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ct1 = rtc_readl(rtc, LPC24XX_CTIME1);
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ct2 = rtc_readl(rtc, LPC24XX_CTIME2);
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tm->tm_sec = CT0_SECS(ct0);
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tm->tm_min = CT0_MINS(ct0);
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tm->tm_hour = CT0_HOURS(ct0);
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tm->tm_wday = CT0_DOW(ct0);
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tm->tm_mon = CT1_MONTH(ct1);
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tm->tm_mday = CT1_DOM(ct1);
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tm->tm_year = CT1_YEAR(ct1);
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tm->tm_yday = CT2_DOY(ct2);
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return 0;
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}
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static int lpc24xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
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struct rtc_time *tm = &wkalrm->time;
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tm->tm_sec = rtc_readl(rtc, LPC24XX_ALSEC);
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tm->tm_min = rtc_readl(rtc, LPC24XX_ALMIN);
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tm->tm_hour = rtc_readl(rtc, LPC24XX_ALHOUR);
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tm->tm_mday = rtc_readl(rtc, LPC24XX_ALDOM);
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tm->tm_wday = rtc_readl(rtc, LPC24XX_ALDOW);
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tm->tm_yday = rtc_readl(rtc, LPC24XX_ALDOY);
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tm->tm_mon = rtc_readl(rtc, LPC24XX_ALMON);
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tm->tm_year = rtc_readl(rtc, LPC24XX_ALYEAR);
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wkalrm->enabled = rtc_readl(rtc, LPC24XX_AMR) == 0;
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wkalrm->pending = !!(rtc_readl(rtc, LPC24XX_ILR) & LPC24XX_RTCCIF);
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return rtc_valid_tm(&wkalrm->time);
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}
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static int lpc24xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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{
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struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
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struct rtc_time *tm = &wkalrm->time;
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/* Disable alarm irq during update */
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rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
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rtc_writel(rtc, LPC24XX_ALSEC, tm->tm_sec);
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rtc_writel(rtc, LPC24XX_ALMIN, tm->tm_min);
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rtc_writel(rtc, LPC24XX_ALHOUR, tm->tm_hour);
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rtc_writel(rtc, LPC24XX_ALDOM, tm->tm_mday);
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rtc_writel(rtc, LPC24XX_ALDOW, tm->tm_wday);
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rtc_writel(rtc, LPC24XX_ALDOY, tm->tm_yday);
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rtc_writel(rtc, LPC24XX_ALMON, tm->tm_mon);
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rtc_writel(rtc, LPC24XX_ALYEAR, tm->tm_year);
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if (wkalrm->enabled)
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rtc_writel(rtc, LPC24XX_AMR, 0);
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return 0;
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}
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static int lpc24xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
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{
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struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
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if (enable)
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rtc_writel(rtc, LPC24XX_AMR, 0);
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else
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rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
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return 0;
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}
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static irqreturn_t lpc24xx_rtc_interrupt(int irq, void *data)
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{
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unsigned long events = RTC_IRQF;
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struct lpc24xx_rtc *rtc = data;
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u32 rtc_iir;
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/* Check interrupt cause */
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rtc_iir = rtc_readl(rtc, LPC24XX_ILR);
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if (rtc_iir & LPC24XX_RTCALF) {
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events |= RTC_AF;
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rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
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}
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/* Clear interrupt status and report event */
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rtc_writel(rtc, LPC24XX_ILR, rtc_iir);
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rtc_update_irq(rtc->rtc, 1, events);
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return IRQ_HANDLED;
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}
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static const struct rtc_class_ops lpc24xx_rtc_ops = {
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.read_time = lpc24xx_rtc_read_time,
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.set_time = lpc24xx_rtc_set_time,
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.read_alarm = lpc24xx_rtc_read_alarm,
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.set_alarm = lpc24xx_rtc_set_alarm,
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.alarm_irq_enable = lpc24xx_rtc_alarm_irq_enable,
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};
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static int lpc24xx_rtc_probe(struct platform_device *pdev)
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{
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struct lpc24xx_rtc *rtc;
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int irq, ret;
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rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
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if (!rtc)
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return -ENOMEM;
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rtc->rtc_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(rtc->rtc_base))
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return PTR_ERR(rtc->rtc_base);
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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rtc->clk_rtc = devm_clk_get(&pdev->dev, "rtc");
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if (IS_ERR(rtc->clk_rtc)) {
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dev_err(&pdev->dev, "error getting rtc clock\n");
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return PTR_ERR(rtc->clk_rtc);
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}
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rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
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if (IS_ERR(rtc->clk_reg)) {
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dev_err(&pdev->dev, "error getting reg clock\n");
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return PTR_ERR(rtc->clk_reg);
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}
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ret = clk_prepare_enable(rtc->clk_rtc);
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if (ret) {
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dev_err(&pdev->dev, "unable to enable rtc clock\n");
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return ret;
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}
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ret = clk_prepare_enable(rtc->clk_reg);
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if (ret) {
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dev_err(&pdev->dev, "unable to enable reg clock\n");
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goto disable_rtc_clk;
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}
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platform_set_drvdata(pdev, rtc);
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/* Clear any pending interrupts */
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rtc_writel(rtc, LPC24XX_ILR, LPC24XX_RTCCIF | LPC24XX_RTCALF);
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/* Enable RTC count */
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rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
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ret = devm_request_irq(&pdev->dev, irq, lpc24xx_rtc_interrupt, 0,
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pdev->name, rtc);
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if (ret < 0) {
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dev_warn(&pdev->dev, "can't request interrupt\n");
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goto disable_clks;
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}
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rtc->rtc = devm_rtc_device_register(&pdev->dev, "lpc24xx-rtc",
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&lpc24xx_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc->rtc)) {
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dev_err(&pdev->dev, "can't register rtc device\n");
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ret = PTR_ERR(rtc->rtc);
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goto disable_clks;
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}
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return 0;
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disable_clks:
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clk_disable_unprepare(rtc->clk_reg);
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disable_rtc_clk:
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clk_disable_unprepare(rtc->clk_rtc);
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return ret;
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}
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static int lpc24xx_rtc_remove(struct platform_device *pdev)
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{
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struct lpc24xx_rtc *rtc = platform_get_drvdata(pdev);
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/* Ensure all interrupt sources are masked */
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rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
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rtc_writel(rtc, LPC24XX_CIIR, 0);
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rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
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clk_disable_unprepare(rtc->clk_rtc);
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clk_disable_unprepare(rtc->clk_reg);
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return 0;
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}
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static const struct of_device_id lpc24xx_rtc_match[] = {
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{ .compatible = "nxp,lpc1788-rtc" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, lpc24xx_rtc_match);
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static struct platform_driver lpc24xx_rtc_driver = {
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.probe = lpc24xx_rtc_probe,
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.remove = lpc24xx_rtc_remove,
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.driver = {
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.name = "lpc24xx-rtc",
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.of_match_table = lpc24xx_rtc_match,
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},
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};
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module_platform_driver(lpc24xx_rtc_driver);
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MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com>");
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MODULE_DESCRIPTION("RTC driver for the LPC178x/18xx/408x/43xx SoCs");
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MODULE_LICENSE("GPL");
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