318 lines
7.5 KiB
C
318 lines
7.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 MediaTek Inc.
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#define VIO_MOD_TO_REG_IND(m) ((m) / 32)
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#define VIO_MOD_TO_REG_OFF(m) ((m) % 32)
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struct mtk_devapc_vio_dbgs {
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union {
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u32 vio_dbg0;
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struct {
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u32 mstid:16;
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u32 dmnid:6;
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u32 vio_w:1;
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u32 vio_r:1;
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u32 addr_h:4;
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u32 resv:4;
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} dbg0_bits;
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};
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u32 vio_dbg1;
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};
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struct mtk_devapc_regs_ofs {
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/* reg offset */
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u32 vio_mask_offset;
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u32 vio_sta_offset;
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u32 vio_dbg0_offset;
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u32 vio_dbg1_offset;
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u32 apc_con_offset;
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u32 vio_shift_sta_offset;
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u32 vio_shift_sel_offset;
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u32 vio_shift_con_offset;
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};
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struct mtk_devapc_data {
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/* numbers of violation index */
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u32 vio_idx_num;
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const struct mtk_devapc_regs_ofs *regs_ofs;
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};
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struct mtk_devapc_context {
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struct device *dev;
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void __iomem *infra_base;
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struct clk *infra_clk;
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const struct mtk_devapc_data *data;
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};
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static void clear_vio_status(struct mtk_devapc_context *ctx)
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{
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void __iomem *reg;
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int i;
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reg = ctx->infra_base + ctx->data->regs_ofs->vio_sta_offset;
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for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++)
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writel(GENMASK(31, 0), reg + 4 * i);
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writel(GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1, 0),
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reg + 4 * i);
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}
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static void mask_module_irq(struct mtk_devapc_context *ctx, bool mask)
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{
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void __iomem *reg;
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u32 val;
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int i;
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reg = ctx->infra_base + ctx->data->regs_ofs->vio_mask_offset;
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if (mask)
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val = GENMASK(31, 0);
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else
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val = 0;
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for (i = 0; i < VIO_MOD_TO_REG_IND(ctx->data->vio_idx_num) - 1; i++)
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writel(val, reg + 4 * i);
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val = readl(reg + 4 * i);
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if (mask)
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val |= GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1,
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0);
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else
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val &= ~GENMASK(VIO_MOD_TO_REG_OFF(ctx->data->vio_idx_num) - 1,
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0);
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writel(val, reg + 4 * i);
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}
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#define PHY_DEVAPC_TIMEOUT 0x10000
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/*
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* devapc_sync_vio_dbg - do "shift" mechansim" to get full violation information.
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* shift mechanism is depends on devapc hardware design.
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* Mediatek devapc set multiple slaves as a group.
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* When violation is triggered, violation info is kept
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* inside devapc hardware.
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* Driver should do shift mechansim to sync full violation
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* info to VIO_DBGs registers.
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*
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*/
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static int devapc_sync_vio_dbg(struct mtk_devapc_context *ctx)
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{
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void __iomem *pd_vio_shift_sta_reg;
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void __iomem *pd_vio_shift_sel_reg;
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void __iomem *pd_vio_shift_con_reg;
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int min_shift_group;
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int ret;
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u32 val;
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pd_vio_shift_sta_reg = ctx->infra_base +
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ctx->data->regs_ofs->vio_shift_sta_offset;
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pd_vio_shift_sel_reg = ctx->infra_base +
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ctx->data->regs_ofs->vio_shift_sel_offset;
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pd_vio_shift_con_reg = ctx->infra_base +
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ctx->data->regs_ofs->vio_shift_con_offset;
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/* Find the minimum shift group which has violation */
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val = readl(pd_vio_shift_sta_reg);
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if (!val)
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return false;
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min_shift_group = __ffs(val);
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/* Assign the group to sync */
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writel(0x1 << min_shift_group, pd_vio_shift_sel_reg);
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/* Start syncing */
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writel(0x1, pd_vio_shift_con_reg);
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ret = readl_poll_timeout(pd_vio_shift_con_reg, val, val == 0x3, 0,
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PHY_DEVAPC_TIMEOUT);
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if (ret) {
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dev_err(ctx->dev, "%s: Shift violation info failed\n", __func__);
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return false;
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}
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/* Stop syncing */
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writel(0x0, pd_vio_shift_con_reg);
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/* Write clear */
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writel(0x1 << min_shift_group, pd_vio_shift_sta_reg);
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return true;
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}
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/*
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* devapc_extract_vio_dbg - extract full violation information after doing
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* shift mechanism.
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*/
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static void devapc_extract_vio_dbg(struct mtk_devapc_context *ctx)
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{
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struct mtk_devapc_vio_dbgs vio_dbgs;
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void __iomem *vio_dbg0_reg;
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void __iomem *vio_dbg1_reg;
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vio_dbg0_reg = ctx->infra_base + ctx->data->regs_ofs->vio_dbg0_offset;
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vio_dbg1_reg = ctx->infra_base + ctx->data->regs_ofs->vio_dbg1_offset;
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vio_dbgs.vio_dbg0 = readl(vio_dbg0_reg);
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vio_dbgs.vio_dbg1 = readl(vio_dbg1_reg);
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/* Print violation information */
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if (vio_dbgs.dbg0_bits.vio_w)
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dev_info(ctx->dev, "Write Violation\n");
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else if (vio_dbgs.dbg0_bits.vio_r)
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dev_info(ctx->dev, "Read Violation\n");
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dev_info(ctx->dev, "Bus ID:0x%x, Dom ID:0x%x, Vio Addr:0x%x\n",
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vio_dbgs.dbg0_bits.mstid, vio_dbgs.dbg0_bits.dmnid,
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vio_dbgs.vio_dbg1);
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}
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/*
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* devapc_violation_irq - the devapc Interrupt Service Routine (ISR) will dump
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* violation information including which master violates
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* access slave.
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*/
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static irqreturn_t devapc_violation_irq(int irq_number, void *data)
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{
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struct mtk_devapc_context *ctx = data;
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while (devapc_sync_vio_dbg(ctx))
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devapc_extract_vio_dbg(ctx);
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clear_vio_status(ctx);
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return IRQ_HANDLED;
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}
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/*
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* start_devapc - unmask slave's irq to start receiving devapc violation.
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*/
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static void start_devapc(struct mtk_devapc_context *ctx)
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{
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writel(BIT(31), ctx->infra_base + ctx->data->regs_ofs->apc_con_offset);
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mask_module_irq(ctx, false);
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}
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/*
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* stop_devapc - mask slave's irq to stop service.
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*/
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static void stop_devapc(struct mtk_devapc_context *ctx)
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{
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mask_module_irq(ctx, true);
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writel(BIT(2), ctx->infra_base + ctx->data->regs_ofs->apc_con_offset);
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}
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static const struct mtk_devapc_regs_ofs devapc_regs_ofs_mt6779 = {
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.vio_mask_offset = 0x0,
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.vio_sta_offset = 0x400,
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.vio_dbg0_offset = 0x900,
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.vio_dbg1_offset = 0x904,
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.apc_con_offset = 0xF00,
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.vio_shift_sta_offset = 0xF10,
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.vio_shift_sel_offset = 0xF14,
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.vio_shift_con_offset = 0xF20,
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};
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static const struct mtk_devapc_data devapc_mt6779 = {
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.vio_idx_num = 511,
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.regs_ofs = &devapc_regs_ofs_mt6779,
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};
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static const struct mtk_devapc_data devapc_mt8186 = {
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.vio_idx_num = 519,
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.regs_ofs = &devapc_regs_ofs_mt6779,
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};
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static const struct of_device_id mtk_devapc_dt_match[] = {
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{
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.compatible = "mediatek,mt6779-devapc",
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.data = &devapc_mt6779,
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}, {
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.compatible = "mediatek,mt8186-devapc",
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.data = &devapc_mt8186,
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}, {
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},
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};
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MODULE_DEVICE_TABLE(of, mtk_devapc_dt_match);
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static int mtk_devapc_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct mtk_devapc_context *ctx;
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u32 devapc_irq;
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int ret;
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if (IS_ERR(node))
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return -ENODEV;
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ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ctx->data = of_device_get_match_data(&pdev->dev);
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ctx->dev = &pdev->dev;
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ctx->infra_base = of_iomap(node, 0);
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if (!ctx->infra_base)
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return -EINVAL;
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devapc_irq = irq_of_parse_and_map(node, 0);
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if (!devapc_irq)
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return -EINVAL;
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ctx->infra_clk = devm_clk_get_enabled(&pdev->dev, "devapc-infra-clock");
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if (IS_ERR(ctx->infra_clk))
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return -EINVAL;
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ret = devm_request_irq(&pdev->dev, devapc_irq, devapc_violation_irq,
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IRQF_TRIGGER_NONE, "devapc", ctx);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, ctx);
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start_devapc(ctx);
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return 0;
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}
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static int mtk_devapc_remove(struct platform_device *pdev)
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{
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struct mtk_devapc_context *ctx = platform_get_drvdata(pdev);
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stop_devapc(ctx);
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return 0;
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}
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static struct platform_driver mtk_devapc_driver = {
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.probe = mtk_devapc_probe,
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.remove = mtk_devapc_remove,
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.driver = {
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.name = "mtk-devapc",
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.of_match_table = mtk_devapc_dt_match,
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},
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};
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module_platform_driver(mtk_devapc_driver);
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MODULE_DESCRIPTION("Mediatek Device APC Driver");
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MODULE_AUTHOR("Neal Liu <neal.liu@mediatek.com>");
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MODULE_LICENSE("GPL");
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