365 lines
8.3 KiB
C
365 lines
8.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#include <linux/bitfield.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/platform_device.h>
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#include "tsens.h"
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/* ----- SROT ------ */
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#define SROT_CTRL_OFF 0x0000
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/* ----- TM ------ */
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#define TM_INT_EN_OFF 0x0000
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#define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004
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#define TM_Sn_STATUS_OFF 0x0030
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#define TM_TRDY_OFF 0x005c
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/* extra data for 8974 */
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#define BKP_SEL 0x3
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#define BKP_REDUN_SEL 0xe0000000
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#define BIT_APPEND 0x3
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struct tsens_legacy_calibration_format tsens_8916_nvmem = {
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.base_len = 7,
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.base_shift = 3,
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.sp_len = 5,
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.mode = { 0, 29, 1 },
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.invalid = { 0, 31, 1 },
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.base = { { 0, 0 }, { 1, 25 } },
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.sp = {
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{ { 0, 7 }, { 0, 12 } },
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{ { 0, 17 }, { 0, 22 } },
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{ { 0, 27 }, { 1, 0 } },
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{ { 1, 5 }, { 1, 10 } },
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{ { 1, 15 }, { 1, 20 } },
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},
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};
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struct tsens_legacy_calibration_format tsens_8939_nvmem = {
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.base_len = 8,
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.base_shift = 2,
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.sp_len = 6,
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.mode = { 12, 0 },
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.invalid = { 12, 2 },
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.base = { { 0, 0 }, { 1, 24 } },
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.sp = {
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{ { 12, 3 }, { 12, 9 } },
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{ { 12, 15 }, { 12, 21 } },
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{ { 12, 27 }, { 13, 1 } },
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{ { 13, 7 }, { 13, 13 } },
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{ { 13, 19 }, { 13, 25 } },
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{ { 0, 8 }, { 0, 14 } },
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{ { 0, 20 }, { 0, 26 } },
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{ { 1, 0 }, { 1, 6 } },
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{ { 1, 12 }, { 1, 18 } },
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},
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};
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struct tsens_legacy_calibration_format tsens_8974_nvmem = {
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.base_len = 8,
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.base_shift = 2,
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.sp_len = 6,
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.mode = { 1, 30 },
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.invalid = { 3, 30 },
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.base = { { 0, 0 }, { 2, 12 } },
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.sp = {
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{ { 0, 8 }, { 2, 20 } },
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{ { 0, 14 }, { 2, 26 } },
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{ { 0, 20 }, { 3, 0 } },
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{ { 0, 26 }, { 3, 6 } },
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{ { 1, 0 }, { 3, 12 } },
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{ { 1, 6 }, { 3, 18 } },
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{ { 1, 12 }, { 3, 24 } },
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{ { 1, 18 }, { 4, 0 } },
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{ { 1, 24 }, { 4, 6 } },
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{ { 2, 0 }, { 4, 12 } },
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{ { 2, 6 }, { 4, 18 } },
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},
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};
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struct tsens_legacy_calibration_format tsens_8974_backup_nvmem = {
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.base_len = 8,
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.base_shift = 2,
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.sp_len = 6,
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.mode = { 4, 30, 1 },
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.invalid = { 5, 30, 1 },
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.base = { { 0, 0 }, { 2, 18 } },
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.sp = {
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{ { 0, 8 }, { 2, 26 } },
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{ { 0, 14 }, { 3, 0 } },
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{ { 0, 20 }, { 3, 6 } },
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{ { 0, 26 }, { 3, 12 } },
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{ { 1, 0 }, { 3, 18 } },
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{ { 1, 6 }, { 3, 24, 1 } },
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{ { 1, 12 }, { 4, 0, 1 } },
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{ { 1, 18 }, { 4, 6, 1 } },
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{ { 2, 0 }, { 4, 12, 1 } },
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{ { 2, 6 }, { 4, 18, 1 } },
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{ { 2, 12 }, { 4, 24, 1 } },
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},
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};
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struct tsens_legacy_calibration_format tsens_9607_nvmem = {
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.base_len = 8,
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.base_shift = 2,
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.sp_len = 6,
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.mode = { 2, 20 },
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.invalid = { 2, 22 },
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.base = { { 0, 0 }, { 2, 12 } },
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.sp = {
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{ { 0, 8 }, { 0, 14 } },
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{ { 0, 20 }, { 0, 26 } },
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{ { 1, 0 }, { 1, 6 } },
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{ { 1, 12 }, { 1, 18 } },
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{ { 2, 0 }, { 2, 6 } },
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},
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};
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static int calibrate_8916(struct tsens_priv *priv)
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{
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u32 p1[5], p2[5];
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u32 *qfprom_cdata, *qfprom_csel;
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int mode, ret;
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ret = tsens_calibrate_nvmem(priv, 3);
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if (!ret)
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return 0;
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qfprom_cdata = (u32 *)qfprom_read(priv->dev, "calib");
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if (IS_ERR(qfprom_cdata))
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return PTR_ERR(qfprom_cdata);
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qfprom_csel = (u32 *)qfprom_read(priv->dev, "calib_sel");
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if (IS_ERR(qfprom_csel)) {
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kfree(qfprom_cdata);
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return PTR_ERR(qfprom_csel);
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}
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mode = tsens_read_calibration_legacy(priv, &tsens_8916_nvmem,
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p1, p2,
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qfprom_cdata, qfprom_csel);
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compute_intercept_slope(priv, p1, p2, mode);
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kfree(qfprom_cdata);
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kfree(qfprom_csel);
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return 0;
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}
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static void fixup_8974_points(int mode, u32 *p1, u32 *p2)
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{
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int i;
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if (mode == NO_PT_CALIB) {
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p1[0] += 2;
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p1[1] += 9;
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p1[2] += 3;
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p1[3] += 9;
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p1[4] += 5;
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p1[5] += 9;
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p1[6] += 7;
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p1[7] += 10;
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p1[8] += 8;
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p1[9] += 9;
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p1[10] += 8;
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} else {
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for (i = 0; i < 11; i++) {
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/*
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* ONE_PT_CALIB requires using addition here instead of
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* using OR operation.
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*/
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p1[i] += BIT_APPEND;
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p2[i] += BIT_APPEND;
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}
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}
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}
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static int calibrate_8974_nvmem(struct tsens_priv *priv)
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{
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u32 p1[11], p2[11];
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u32 backup;
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int ret, mode;
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ret = nvmem_cell_read_variable_le_u32(priv->dev, "use_backup", &backup);
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if (ret == -ENOENT)
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dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n");
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if (ret < 0)
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return ret;
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mode = tsens_read_calibration(priv, 2, p1, p2, backup == BKP_SEL);
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if (mode < 0)
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return mode;
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fixup_8974_points(mode, p1, p2);
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compute_intercept_slope(priv, p1, p2, mode);
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return 0;
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}
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static int calibrate_8974(struct tsens_priv *priv)
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{
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u32 p1[11], p2[11];
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u32 *calib, *bkp;
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u32 calib_redun_sel;
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int mode, ret;
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ret = calibrate_8974_nvmem(priv);
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if (ret == 0)
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return 0;
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calib = (u32 *)qfprom_read(priv->dev, "calib");
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if (IS_ERR(calib))
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return PTR_ERR(calib);
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bkp = (u32 *)qfprom_read(priv->dev, "calib_backup");
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if (IS_ERR(bkp)) {
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kfree(calib);
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return PTR_ERR(bkp);
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}
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calib_redun_sel = FIELD_GET(BKP_REDUN_SEL, bkp[1]);
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if (calib_redun_sel == BKP_SEL)
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mode = tsens_read_calibration_legacy(priv, &tsens_8974_backup_nvmem,
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p1, p2,
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bkp, calib);
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else
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mode = tsens_read_calibration_legacy(priv, &tsens_8974_nvmem,
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p1, p2,
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calib, NULL);
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fixup_8974_points(mode, p1, p2);
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compute_intercept_slope(priv, p1, p2, mode);
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kfree(calib);
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kfree(bkp);
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return 0;
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}
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static int __init init_8939(struct tsens_priv *priv) {
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priv->sensor[0].slope = 2911;
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priv->sensor[1].slope = 2789;
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priv->sensor[2].slope = 2906;
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priv->sensor[3].slope = 2763;
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priv->sensor[4].slope = 2922;
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priv->sensor[5].slope = 2867;
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priv->sensor[6].slope = 2833;
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priv->sensor[7].slope = 2838;
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priv->sensor[8].slope = 2840;
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/* priv->sensor[9].slope = 2852; */
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return init_common(priv);
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}
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/* v0.1: 8916, 8939, 8974, 9607 */
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static struct tsens_features tsens_v0_1_feat = {
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.ver_major = VER_0_1,
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.crit_int = 0,
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.combo_int = 0,
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.adc = 1,
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.srot_split = 1,
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.max_sensors = 11,
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.trip_min_temp = -40000,
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.trip_max_temp = 120000,
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};
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static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] = {
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/* ----- SROT ------ */
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/* No VERSION information */
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/* CTRL_OFFSET */
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[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
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[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
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/* ----- TM ------ */
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/* INTERRUPT ENABLE */
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[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 0),
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/* UPPER/LOWER TEMPERATURE THRESHOLDS */
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REG_FIELD_FOR_EACH_SENSOR11(LOW_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 0, 9),
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REG_FIELD_FOR_EACH_SENSOR11(UP_THRESH, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 10, 19),
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/* UPPER/LOWER INTERRUPTS [CLEAR/STATUS] */
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REG_FIELD_FOR_EACH_SENSOR11(LOW_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 20, 20),
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REG_FIELD_FOR_EACH_SENSOR11(UP_INT_CLEAR, TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF, 21, 21),
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/* NO CRITICAL INTERRUPT SUPPORT on v0.1 */
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/* Sn_STATUS */
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REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9),
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/* No VALID field on v0.1 */
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/* xxx_STATUS bits: 1 == threshold violated */
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REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10),
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REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11),
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REG_FIELD_FOR_EACH_SENSOR11(UPPER_STATUS, TM_Sn_STATUS_OFF, 12, 12),
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/* No CRITICAL field on v0.1 */
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REG_FIELD_FOR_EACH_SENSOR11(MAX_STATUS, TM_Sn_STATUS_OFF, 13, 13),
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/* TRDY: 1=ready, 0=in progress */
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[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
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};
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static const struct tsens_ops ops_v0_1 = {
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.init = init_common,
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.calibrate = tsens_calibrate_common,
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.get_temp = get_temp_common,
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};
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static const struct tsens_ops ops_8916 = {
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.init = init_common,
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.calibrate = calibrate_8916,
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.get_temp = get_temp_common,
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};
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struct tsens_plat_data data_8916 = {
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.num_sensors = 5,
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.ops = &ops_8916,
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.hw_ids = (unsigned int []){0, 1, 2, 4, 5 },
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.feat = &tsens_v0_1_feat,
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.fields = tsens_v0_1_regfields,
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};
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static const struct tsens_ops ops_8939 = {
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.init = init_8939,
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.calibrate = tsens_calibrate_common,
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.get_temp = get_temp_common,
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};
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struct tsens_plat_data data_8939 = {
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.num_sensors = 9,
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.ops = &ops_8939,
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.hw_ids = (unsigned int []){ 0, 1, 2, 3, 5, 6, 7, 8, 9, /* 10 */ },
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.feat = &tsens_v0_1_feat,
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.fields = tsens_v0_1_regfields,
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};
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static const struct tsens_ops ops_8974 = {
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.init = init_common,
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.calibrate = calibrate_8974,
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.get_temp = get_temp_common,
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};
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struct tsens_plat_data data_8974 = {
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.num_sensors = 11,
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.ops = &ops_8974,
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.feat = &tsens_v0_1_feat,
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.fields = tsens_v0_1_regfields,
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};
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struct tsens_plat_data data_9607 = {
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.num_sensors = 5,
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.ops = &ops_v0_1,
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.feat = &tsens_v0_1_feat,
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.fields = tsens_v0_1_regfields,
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};
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