294 lines
7.0 KiB
C
294 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* intel_pt_insn_decoder.c: Intel Processor Trace support
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* Copyright (c) 2013-2014, Intel Corporation.
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*/
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#include <linux/kernel.h>
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#include <stdio.h>
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#include <string.h>
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#include <endian.h>
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#include <byteswap.h>
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#include "../../../arch/x86/include/asm/insn.h"
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#include "../../../arch/x86/lib/inat.c"
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#include "../../../arch/x86/lib/insn.c"
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#include "event.h"
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#include "intel-pt-insn-decoder.h"
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#include "dump-insn.h"
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#include "util/sample.h"
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#if INTEL_PT_INSN_BUF_SZ < MAX_INSN_SIZE || INTEL_PT_INSN_BUF_SZ > MAX_INSN
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#error Instruction buffer size too small
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#endif
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/* Based on branch_type() from arch/x86/events/intel/lbr.c */
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static void intel_pt_insn_decoder(struct insn *insn,
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struct intel_pt_insn *intel_pt_insn)
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{
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enum intel_pt_insn_op op = INTEL_PT_OP_OTHER;
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enum intel_pt_insn_branch branch = INTEL_PT_BR_NO_BRANCH;
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int ext;
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intel_pt_insn->rel = 0;
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intel_pt_insn->emulated_ptwrite = false;
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if (insn_is_avx(insn)) {
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intel_pt_insn->op = INTEL_PT_OP_OTHER;
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intel_pt_insn->branch = INTEL_PT_BR_NO_BRANCH;
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intel_pt_insn->length = insn->length;
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return;
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}
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switch (insn->opcode.bytes[0]) {
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case 0xf:
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switch (insn->opcode.bytes[1]) {
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case 0x01:
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switch (insn->modrm.bytes[0]) {
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case 0xc2: /* vmlaunch */
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case 0xc3: /* vmresume */
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op = INTEL_PT_OP_VMENTRY;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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default:
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break;
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}
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break;
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case 0x05: /* syscall */
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case 0x34: /* sysenter */
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op = INTEL_PT_OP_SYSCALL;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0x07: /* sysret */
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case 0x35: /* sysexit */
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op = INTEL_PT_OP_SYSRET;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0x80 ... 0x8f: /* jcc */
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op = INTEL_PT_OP_JCC;
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branch = INTEL_PT_BR_CONDITIONAL;
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break;
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default:
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break;
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}
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break;
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case 0x70 ... 0x7f: /* jcc */
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op = INTEL_PT_OP_JCC;
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branch = INTEL_PT_BR_CONDITIONAL;
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break;
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case 0xc2: /* near ret */
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case 0xc3: /* near ret */
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case 0xca: /* far ret */
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case 0xcb: /* far ret */
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op = INTEL_PT_OP_RET;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0xcf: /* iret */
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op = INTEL_PT_OP_IRET;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0xcc ... 0xce: /* int */
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op = INTEL_PT_OP_INT;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0xe8: /* call near rel */
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op = INTEL_PT_OP_CALL;
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branch = INTEL_PT_BR_UNCONDITIONAL;
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break;
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case 0x9a: /* call far absolute */
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op = INTEL_PT_OP_CALL;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0xe0 ... 0xe2: /* loop */
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op = INTEL_PT_OP_LOOP;
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branch = INTEL_PT_BR_CONDITIONAL;
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break;
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case 0xe3: /* jcc */
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op = INTEL_PT_OP_JCC;
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branch = INTEL_PT_BR_CONDITIONAL;
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break;
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case 0xe9: /* jmp */
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case 0xeb: /* jmp */
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op = INTEL_PT_OP_JMP;
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branch = INTEL_PT_BR_UNCONDITIONAL;
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break;
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case 0xea: /* far jmp */
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op = INTEL_PT_OP_JMP;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 0xff: /* call near absolute, call far absolute ind */
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ext = (insn->modrm.bytes[0] >> 3) & 0x7;
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switch (ext) {
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case 2: /* near ind call */
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case 3: /* far ind call */
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op = INTEL_PT_OP_CALL;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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case 4:
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case 5:
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op = INTEL_PT_OP_JMP;
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branch = INTEL_PT_BR_INDIRECT;
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break;
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default:
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break;
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}
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break;
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default:
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break;
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}
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intel_pt_insn->op = op;
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intel_pt_insn->branch = branch;
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intel_pt_insn->length = insn->length;
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if (branch == INTEL_PT_BR_CONDITIONAL ||
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branch == INTEL_PT_BR_UNCONDITIONAL) {
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#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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switch (insn->immediate.nbytes) {
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case 1:
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intel_pt_insn->rel = insn->immediate.value;
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break;
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case 2:
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intel_pt_insn->rel =
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bswap_16((short)insn->immediate.value);
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break;
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case 4:
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intel_pt_insn->rel = bswap_32(insn->immediate.value);
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break;
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default:
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intel_pt_insn->rel = 0;
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break;
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}
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#else
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intel_pt_insn->rel = insn->immediate.value;
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#endif
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}
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}
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int intel_pt_get_insn(const unsigned char *buf, size_t len, int x86_64,
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struct intel_pt_insn *intel_pt_insn)
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{
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struct insn insn;
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int ret;
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ret = insn_decode(&insn, buf, len,
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x86_64 ? INSN_MODE_64 : INSN_MODE_32);
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if (ret < 0 || insn.length > len)
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return -1;
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intel_pt_insn_decoder(&insn, intel_pt_insn);
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if (insn.length < INTEL_PT_INSN_BUF_SZ)
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memcpy(intel_pt_insn->buf, buf, insn.length);
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else
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memcpy(intel_pt_insn->buf, buf, INTEL_PT_INSN_BUF_SZ);
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return 0;
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}
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int arch_is_branch(const unsigned char *buf, size_t len, int x86_64)
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{
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struct intel_pt_insn in;
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if (intel_pt_get_insn(buf, len, x86_64, &in) < 0)
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return -1;
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return in.branch != INTEL_PT_BR_NO_BRANCH;
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}
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const char *dump_insn(struct perf_insn *x, uint64_t ip __maybe_unused,
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u8 *inbuf, int inlen, int *lenp)
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{
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struct insn insn;
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int n, i, ret;
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int left;
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ret = insn_decode(&insn, inbuf, inlen,
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x->is64bit ? INSN_MODE_64 : INSN_MODE_32);
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if (ret < 0 || insn.length > inlen)
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return "<bad>";
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if (lenp)
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*lenp = insn.length;
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left = sizeof(x->out);
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n = snprintf(x->out, left, "insn: ");
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left -= n;
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for (i = 0; i < insn.length; i++) {
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n += snprintf(x->out + n, left, "%02x ", inbuf[i]);
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left -= n;
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}
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return x->out;
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}
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const char *branch_name[] = {
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[INTEL_PT_OP_OTHER] = "Other",
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[INTEL_PT_OP_CALL] = "Call",
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[INTEL_PT_OP_RET] = "Ret",
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[INTEL_PT_OP_JCC] = "Jcc",
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[INTEL_PT_OP_JMP] = "Jmp",
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[INTEL_PT_OP_LOOP] = "Loop",
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[INTEL_PT_OP_IRET] = "IRet",
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[INTEL_PT_OP_INT] = "Int",
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[INTEL_PT_OP_SYSCALL] = "Syscall",
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[INTEL_PT_OP_SYSRET] = "Sysret",
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[INTEL_PT_OP_VMENTRY] = "VMentry",
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};
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const char *intel_pt_insn_name(enum intel_pt_insn_op op)
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{
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return branch_name[op];
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}
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int intel_pt_insn_desc(const struct intel_pt_insn *intel_pt_insn, char *buf,
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size_t buf_len)
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{
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switch (intel_pt_insn->branch) {
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case INTEL_PT_BR_CONDITIONAL:
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case INTEL_PT_BR_UNCONDITIONAL:
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return snprintf(buf, buf_len, "%s %s%d",
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intel_pt_insn_name(intel_pt_insn->op),
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intel_pt_insn->rel > 0 ? "+" : "",
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intel_pt_insn->rel);
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case INTEL_PT_BR_NO_BRANCH:
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case INTEL_PT_BR_INDIRECT:
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return snprintf(buf, buf_len, "%s",
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intel_pt_insn_name(intel_pt_insn->op));
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default:
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break;
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}
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return 0;
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}
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int intel_pt_insn_type(enum intel_pt_insn_op op)
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{
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switch (op) {
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case INTEL_PT_OP_OTHER:
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return 0;
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case INTEL_PT_OP_CALL:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL;
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case INTEL_PT_OP_RET:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN;
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case INTEL_PT_OP_JCC:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL;
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case INTEL_PT_OP_JMP:
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return PERF_IP_FLAG_BRANCH;
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case INTEL_PT_OP_LOOP:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL;
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case INTEL_PT_OP_IRET:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN |
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PERF_IP_FLAG_INTERRUPT;
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case INTEL_PT_OP_INT:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
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PERF_IP_FLAG_INTERRUPT;
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case INTEL_PT_OP_SYSCALL:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
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PERF_IP_FLAG_SYSCALLRET;
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case INTEL_PT_OP_SYSRET:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN |
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PERF_IP_FLAG_SYSCALLRET;
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case INTEL_PT_OP_VMENTRY:
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return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
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PERF_IP_FLAG_VMENTRY;
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default:
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return 0;
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}
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}
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