132 lines
4.1 KiB
C
132 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* VMX control MSR test
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*
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* Copyright (C) 2022 Google LLC.
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*
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* Tests for KVM ownership of bits in the VMX entry/exit control MSRs. Checks
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* that KVM will set owned bits where appropriate, and will not if
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* KVM_X86_QUIRK_TWEAK_VMX_CTRL_MSRS is disabled.
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*/
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#include <linux/bitmap.h>
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#include "kvm_util.h"
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#include "vmx.h"
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static void vmx_fixed1_msr_test(struct kvm_vcpu *vcpu, uint32_t msr_index,
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uint64_t mask)
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{
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uint64_t val = vcpu_get_msr(vcpu, msr_index);
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uint64_t bit;
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mask &= val;
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for_each_set_bit(bit, &mask, 64) {
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vcpu_set_msr(vcpu, msr_index, val & ~BIT_ULL(bit));
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vcpu_set_msr(vcpu, msr_index, val);
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}
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}
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static void vmx_fixed0_msr_test(struct kvm_vcpu *vcpu, uint32_t msr_index,
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uint64_t mask)
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{
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uint64_t val = vcpu_get_msr(vcpu, msr_index);
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uint64_t bit;
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mask = ~mask | val;
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for_each_clear_bit(bit, &mask, 64) {
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vcpu_set_msr(vcpu, msr_index, val | BIT_ULL(bit));
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vcpu_set_msr(vcpu, msr_index, val);
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}
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}
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static void vmx_fixed0and1_msr_test(struct kvm_vcpu *vcpu, uint32_t msr_index)
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{
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vmx_fixed0_msr_test(vcpu, msr_index, GENMASK_ULL(31, 0));
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vmx_fixed1_msr_test(vcpu, msr_index, GENMASK_ULL(63, 32));
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}
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static void vmx_save_restore_msrs_test(struct kvm_vcpu *vcpu)
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{
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vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, 0);
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vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, -1ull);
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vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_BASIC,
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BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55));
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vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_MISC,
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BIT_ULL(5) | GENMASK_ULL(8, 6) | BIT_ULL(14) |
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BIT_ULL(15) | BIT_ULL(28) | BIT_ULL(29) | BIT_ULL(30));
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vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_PROCBASED_CTLS2);
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vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_EPT_VPID_CAP, -1ull);
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vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_PINBASED_CTLS);
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vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_PROCBASED_CTLS);
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vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_EXIT_CTLS);
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vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_ENTRY_CTLS);
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vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_VMFUNC, -1ull);
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}
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static void __ia32_feature_control_msr_test(struct kvm_vcpu *vcpu,
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uint64_t msr_bit,
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struct kvm_x86_cpu_feature feature)
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{
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uint64_t val;
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vcpu_clear_cpuid_feature(vcpu, feature);
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val = vcpu_get_msr(vcpu, MSR_IA32_FEAT_CTL);
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vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
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vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED);
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vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
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vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED);
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vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val);
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if (!kvm_cpu_has(feature))
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return;
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vcpu_set_cpuid_feature(vcpu, feature);
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}
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static void ia32_feature_control_msr_test(struct kvm_vcpu *vcpu)
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{
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uint64_t supported_bits = FEAT_CTL_LOCKED |
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FEAT_CTL_VMX_ENABLED_INSIDE_SMX |
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FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX |
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FEAT_CTL_SGX_LC_ENABLED |
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FEAT_CTL_SGX_ENABLED |
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FEAT_CTL_LMCE_ENABLED;
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int bit, r;
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_INSIDE_SMX, X86_FEATURE_SMX);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_INSIDE_SMX, X86_FEATURE_VMX);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX, X86_FEATURE_VMX);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_LC_ENABLED, X86_FEATURE_SGX_LC);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_LC_ENABLED, X86_FEATURE_SGX);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_ENABLED, X86_FEATURE_SGX);
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__ia32_feature_control_msr_test(vcpu, FEAT_CTL_LMCE_ENABLED, X86_FEATURE_MCE);
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for_each_clear_bit(bit, &supported_bits, 64) {
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r = _vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, BIT(bit));
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TEST_ASSERT(r == 0,
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"Setting reserved bit %d in IA32_FEATURE_CONTROL should fail", bit);
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}
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}
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int main(void)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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TEST_REQUIRE(kvm_has_cap(KVM_CAP_DISABLE_QUIRKS2));
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX));
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/* No need to actually do KVM_RUN, thus no guest code. */
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vm = vm_create_with_one_vcpu(&vcpu, NULL);
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vmx_save_restore_msrs_test(vcpu);
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ia32_feature_control_msr_test(vcpu);
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kvm_vm_free(vm);
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}
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